Abstract: A silicon carbide crystal and a silicon carbide wafer, wherein a monocrystalline proportion of the silicon carbide crystal and the silicon carbide wafer is 100%, the resistivity thereof is in a range of 15 m?·cm to 20 m?·cm, and a deviation of an uniformity of the resistivity thereof is less than 0.4%.

Abstract: A method of growing the silicon carbide crystal includes the following steps. A raw material containing a carbon element and a silicon element, and a seed crystal located above the raw material are provided in a reactor. A growth process of the silicon carbide crystal is performed, wherein the growth process includes heating the reactor and the raw material to form silicon carbide crystal on the seed crystal. In the growth process, a ratio difference (?Tz/?Tx) between an axial temperature gradient (?Tz) and a radial temperature gradient (?Tx) of the silicon carbide crystal is adjusted so that the ratio difference is controlled in the range of 0.5 to 3 to form the silicon carbide crystal. The silicon carbide crystal formed by the above growth method can have a uniform resistivity distribution and excellent geometric performance.

Abstract: A crystal growth method, including providing a seed crystal in a crystal growth furnace, and forming a crystal on the seed crystal along a first direction after multiple time points, is provided. The crystal includes multiple sub-crystals stacked along the first direction, a corresponding one of the sub-crystals is formed at each of the time points, and the sub-crystals include multiple end surfaces away from the seed crystal, so that a difference value of maximum temperatures of any two of the end surfaces is less than or equal to 20 degrees. A wafer is also provided.

Abstract: A crystal growth furnace system, including an external heating module, a furnace, a first driven device, a second driven device, and a control device, is provided. The furnace is movably disposed in the external heating module. The first driven device drives the furnace to move along an axis. The second driven device drives the furnace to rotate around the axis. The control device is electrically connected to the first driven device, the second driven device, and the external heating module.

Abstract: A method for doping a single crystal silicon ingot pulled includes heating a vaporization cup. The method also includes maintaining a pressure of an interior of the housing at a first pressure. The method further includes injecting liquid dopant into the dopant injection tube and the vaporization cup. A pressure of the liquid dopant is maintained at a second pressure greater than the first pressure prior to injection into the dopant injection tube and the vaporization cup. The method also includes vaporizing the liquid dopant into vaporized dopant within the housing. The liquid dopant is vaporized by flash evaporation by heating the liquid dopant with the vaporization cup and reducing the pressure of the liquid dopant from the second pressure to the first pressure by injecting the liquid dopant into the housing. The method further includes channeling the vaporized dopant into the housing using the dopant injection tube.

Abstract: Methods for growing single crystal silicon ingots that involve silicon feed tube inert gas control are disclosed. Ingot puller apparatus that include a flange that extends radially from a silicon funnel or from a silicon feed tube to reduce backflow of gases from the silicon feed tube into the growth chamber are also disclosed.

Abstract: A manufacturing method of a silicon carbide ingot includes the following. A raw material containing carbon and silicon and a seed located above the raw material are provided in a reactor. A first surface of the seed faces the raw material. The reactor and the raw material are heated, where part of the raw material is vaporized and transferred to the first surface of the seed and a sidewall of the seed and forms a silicon carbide material on the seed, to form a growing body containing the seed and the silicon carbide material. The growing body grows along a radial direction of the seed, and the growing body grows along a direction perpendicular to the first surface of the seed. The reactor and the raw material are cooled to obtain a silicon carbide ingot. A diameter of the silicon carbide ingot is greater than a diameter of the seed.

Abstract: A material analysis method is provided. A plurality of wafers processed from a plurality of ingots are measured by a measuring instrument to obtain an average of a bow of each of the wafers processed from the ingots and a plurality of full widths at half maximum (FWHM) of each of the wafers. Key factors respectively corresponding to the ingots are calculated according to the FWHM of the wafers. A regression equation is obtained according to the key factors and the average of the bows.

Abstract: The disclosure provides a wafer inspection method and wafer inspection apparatus. The method includes: receive scanning information of at least one wafer, wherein the scanning information includes a plurality of haze values; the scanning information is divided into a plurality of information blocks according to the unit block, and the feature value of each of the plurality of information blocks is calculated according to the plurality of haze values included in each of the plurality of information blocks; and converting the feature value into a color value according to the haze upper threshold and the haze lower threshold, generating the color value corresponding to the at least one wafer according to the converted color value according to the feature value, whereby the color graph displays the texture content of the at least one wafer.

Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a step of high pressure bonding.

Abstract: A computer device includes at least one processor in communication with at least one memory device. The at least one processor is programmed to store, in the at least one memory device, a model for simulating a portion of an assembly line and receive scan data of a first inspection of a product being assembled, execute the model using the scan data as inputs to generate a final profile of the product, compare the final profile to one or more thresholds, determine if the final profile exceeds at least one of the one or more thresholds, and adjust the first device if the determination is that the final profile exceeds at least one of the one or more thresholds.

Abstract: A dust collecting system for single crystal growth system includes an air compressor, a dust collecting device, a first inert gas source, a rotary pump and a scrubber. The air compressor is fluidly connected to an exit pipe of the single crystal growth system. The exit pipe is used to exhaust unstable dust from the single crystal growth system. The dust collecting device is fluidly connecting to the exit pipe to collect the dust oxide. The first inert gas source is fluidly connected to the exit pipe to blow a first inert gas into the exit pipe to compel the dust oxide toward the dust collecting device. The rotary pump is fluidly connected to the dust collecting device. The scrubber is fluidly connected to the rotary pump. The rotary pump transports the residual dust oxide toward the scrubber. The present disclosure further provides a method for collecting dust.

Abstract: Provided is a wafer including a ring part and a processed part. The processed part is connected to the ring part. The processed part has a top surface which has been grounded and a bottom surface opposite to the top surface. The processed part is surrounded by the ring part. A region where the top surface connects to the ring part is a curved surface curved upwards.

Abstract: A heterostructure, includes: a substrate; and a buffer layer that includes a plurality of layers having a composition AlxInyGa1-x-yN, where x?1 and 0?y?1; wherein the buffer layer has a first region that includes at least two layers, a second region that includes at least two layers, and a third region that includes at least two layers. The aluminum content varies continuously throughout a thickness of at least one of the layers.

Abstract: The disclosure provides a silicon carbide seed crystal and a method of manufacturing a silicon carbide ingot. The silicon carbide seed crystal has a silicon surface and a carbon surface opposite to the silicon surface. A difference D between a basal plane dislocation density BPD1 of the silicon surface and a basal plane dislocation density BPD2 of the carbon surface satisfies the following formula (1), a local thickness variation (LTV) of the silicon carbide seed crystal is 2.5 ?m or less, and a stacking fault (SF) density of the silicon carbide seed crystal is 10 EA/cm2 or less: D=(BPD1?BPD2)/BPD1?25%??(1).

Abstract: A method of manufacturing a high electron mobility transistor (HEMT) structure is disclosed. By controlling a passivation layer and a barrier layer to uninterruptedly grow in the same growth chamber, defects of the passivation layer generated in the growth process due to a drastic change in temperature, pressure, or atmosphere or degrading a quality of an interface between the passivation layer and the barrier layer could be avoided, thereby providing the passivation layer with a good quality and the interface between the passivation layer and the barrier layer with a good quality, so that the objective of improving the performance of the HEMT structure could be achieved.

Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face having an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer having a thickness less than 50 nm on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer. Through the method of manufacturing the epitaxial structure, when the silicon face of the silicon carbide substrate has the off-angle, the problem of a poor epitaxial quality of the first group III nitride layer and a poor epitaxial quality of the second group III nitride layer could be effectively relieved.

Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon carbide (SiC) substrate, wherein a silicon face (Si-face) of the SiC substrate is taken as a growth face, and the growth face has an off-angle relative to the Si-face of the SiC substrate; B: deposit a nitride angle adjustment layer on the growth face of the SiC substrate through physical vapor deposition (PVD); C: deposit a first group III nitride layer on the nitride angle adjustment layer; and D: deposit a second group III nitride layer on the first group III nitride layer. Through the method of manufacturing the epitaxial structure, when the silicon face of the silicon carbide substrate has the off-angle, the problem of a poor epitaxial quality of the first group III nitride layer and a poor epitaxial quality of the second group III nitride layer could be effectively relieved.

Abstract: A method of manufacturing an epitaxial structure includes steps of: A: provide a silicon nitride (SiC) substrate having a carbon face (C-face) without an off-angle; B: form an amorphous structure layer on the C-face of the SiC substrate; C: deposit a first group III nitride layer on the amorphous structure layer; and D: deposit a second group III nitride layer on the first group III nitride layer. By forming the amorphous structure layer, a top surface of the second group III nitride layer could be made to be in a flat and smooth state.

Abstract: A semiconductor structure includes a silicon carbide (SiC) substrate, a nucleation layer and a gallium nitride (GaN) layer. The silicon carbide layer has a first thickness T1. The nucleation layer is located on the silicon carbide layer and has a second thickness T2. The nucleation layer is made of AlGaN (AlGaN), and the second thickness T2 fulfills a thickness range of T1*0.002% to T1*0.006%. The gallium nitride layer is located on the nucleation layer and is separated from the silicon carbide substrate.