Patents Assigned to GLOBALWAFERS CO., LTD.
  • Patent number: 11211308
    Abstract: A semiconductor device and a manufacturing method thereof are provided. The semiconductor device includes a substrate, a transistor and a heat dissipation structure. The substrate includes first and second semiconductor layers, and includes an insulating layer disposed between the first and second semiconductor layers. The substrate has a recess extending into the insulating layer from a surface of the first semiconductor layer. The transistor includes a hetero-junction structure, a gate electrode, a drain electrode and a source electrode. The hetero-junction structure is disposed on the second semiconductor layer. The gate, drain and source electrodes are disposed over the hetero-junction structure. The gate electrode is located between the drain electrode and the source electrode, and an active area of the hetero-junction structure located between the drain electrode and the source electrode is overlapped with the recess of the substrate.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: December 28, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Hsien-Chin Chiu, Ying-Ru Shih
  • Patent number: 11201080
    Abstract: An epitaxy substrate and a method of manufacturing the same are provided. The epitaxy substrate includes a device substrate and a handle substrate. The device substrate has a first surface and a second surface opposite to each other, and a bevel disposed between the first and the second surfaces. The handle substrate is bonded to the second surface of the device substrate, wherein the oxygen content of the device substrate is less than the oxygen content of the handle substrate, and a bonding angle greater than 90° is between the bevel of the device substrate and the handle substrate.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: December 14, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Ying-Ru Shih, Chih-Yuan Chuang, Chi-Tse Lee, Chun-I Fan, Wen-Ching Hsu
  • Publication number: 20210363656
    Abstract: A method for producing Si ingot single crystal by NOC growth method including a Si ingot single crystal growing step and a continuous growing step is provided. The growing step includes providing a low temperature region in the Si melt where the Si ingot single crystal is grown along the surface of the Si melt or toward the inside of the Si melt, and the Si ingot single crystal has distribution of a vacancy concentration and an interstitial concentration in which respectively a vacancy concentration and an interstitial concentration vary with a distance from the growth interface; and adjusting a temperature gradient and a growth rate in the Si melt, so that along with the increasing of the distance from the growth interface, the vacancy concentration and the interstitial concentration in the Si ingot single crystal respectively decrease come near to each other.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 25, 2021
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Kazuo Nakajima, Masami Nakanishi, Yu Sheng Su, Wen-Ching Hsu
  • Patent number: 11183420
    Abstract: A multilayer composite structure and a method of preparing a multilayer composite structure are provided. The multilayer composite structure comprises a semiconductor handle substrate having a minimum bulk region resistivity of at least about 500 ohm-cm; a Group IVA nitride layer in contact with the semiconductor handle substrate, the Group IVA nitride layer selected from the group consisting of carbon nitride, silicon carbon nitride, and a combination thereof; a dielectric layer in contact with the Group IVA nitride layer; and a semiconductor device layer in contact with the dielectric layer.
    Type: Grant
    Filed: May 6, 2020
    Date of Patent: November 23, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventor: Qingmin Liu
  • Patent number: 11173697
    Abstract: A method is disclosed for promoting the formation of uniform platelets in a monocrystalline semiconductor donor substrate by irradiating the monocrystalline semiconductor donor substrate with light. The photon-absorption assisted platelet formation process leads to uniformly distributed platelets with minimum built-in stress that promote the formation a well-defined cleave-plane in the subsequent layer transfer process.
    Type: Grant
    Filed: April 9, 2019
    Date of Patent: November 16, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Gang Wang, Charles Lottes
  • Publication number: 20210343583
    Abstract: A method of manufacturing an epitaxy substrate is provided. A handle substrate is provided. A beveling treatment is performed on an edge of a device substrate such that a bevel is formed at the edge of the device substrate, wherein a thickness of the device substrate is greater than 100 ?m and less than 200 ?m. An ion implantation process is performed on a first surface of the device substrate to form an implantation region within the first surface. A second surface of the device substrate is bonded to the handle substrate for forming the epitaxy substrate, wherein a bonding angle greater than 90° is provided between the bevel of the device substrate and the handle substrate, and a projection length of the bevel toward the handle substrate is between 600 ?m and 800 ?m.
    Type: Application
    Filed: July 14, 2021
    Publication date: November 4, 2021
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Ying-Ru Shih, Chih-Yuan Chuang, Chi-Tse Lee, Chun-I Fan, Wen-Ching Hsu
  • Patent number: 11142844
    Abstract: A method for preparing a single crystal silicon ingot and a wafer sliced therefrom are provided. The ingots and wafers comprise nitrogen at a concentration of at least about 1×1014 atoms/cm3 and/or germanium at a concentration of at least about 1×1019 atoms/cm3, interstitial oxygen at a concentration of less than about 6 ppma, and a resistivity of at least about 1000 ohm cm.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: October 12, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Soubir Basak, Igor Peidous, Carissima Marie Hudson, HyungMin Lee, ByungChun Kim, Robert J. Falster
  • Patent number: 11145538
    Abstract: A multilayer structure is provided, the multilayer structure comprising a semiconductor on insulator structure comprises an insulating layer that enhances the stability of the underlying charge trapping layer.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: October 12, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Jeffery L. Libbert, Qingmin Liu, Gang Wang, Andrew M. Jones
  • Patent number: 11136691
    Abstract: A method for producing a silicon ingot includes withdrawing a seed crystal from a melt that includes melted silicon in a crucible that is enclosed in a vacuum chamber containing a cusped magnetic field. At least one process parameter is regulated in at least two stages, including a first stage corresponding to formation of the silicon ingot up to an intermediate ingot length, and a second stage corresponding to formation of the silicon ingot from the intermediate ingot length to the total ingot length. During the second stage process parameter regulation may include reducing a crystal rotation rate, reducing a crucible rotation rate, and/or increasing a magnetic field strength relative to the first stage.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: October 5, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Gaurab Samanta, Parthiv Daggolu, Sumeet Bhagavat, Soubir Basak, Nan Zhang
  • Patent number: 11139198
    Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: October 5, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Peidous, Lu Fei, Jeffrey L. Libbert, Andrew M. Jones, Alex Usenko, Gang Wang, Shawn George Thomas, Srikanth Kommu
  • Patent number: 11124893
    Abstract: A method is disclosed for reducing the size and density of defects in a single crystal silicon wafer. The method involves subjected a single crystal silicon ingot to an anneal prior to wafer slicing.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: September 21, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: WonJin Choi, JunHwan Ji, UiSung Jung, JungHan Kim, YoungJung Lee, ChanRae Cho
  • Patent number: 11111596
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Patent number: 11114332
    Abstract: A method is provided for preparing a semiconductor-on-insulator structure comprising a silicon nitride layer deposited by plasma deposition.
    Type: Grant
    Filed: March 3, 2017
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventor: Sasha Joseph Kweskin
  • Patent number: 11111602
    Abstract: Nitrogen-doped CZ silicon crystal ingots and wafers sliced therefrom are disclosed that provide for post epitaxial thermally treated wafers having oxygen precipitate density and size that are substantially uniformly distributed radially and exhibit the lack of a significant edge effect. Methods for producing such CZ silicon crystal ingots are also provided by controlling the pull rate from molten silicon, the temperature gradient and the nitrogen concentration. Methods for simulating the radial bulk micro defect size distribution, radial bulk micro defect density distribution and oxygen precipitation density distribution of post epitaxial thermally treated wafers sliced from nitrogen-doped CZ silicon crystals are also provided.
    Type: Grant
    Filed: July 29, 2015
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Zheng Lu, Gaurab Samanta, Tse-Wei Lu, Feng-Chien Tsai
  • Patent number: 11111597
    Abstract: A method for growing a single crystal silicon ingot by the continuous Czochralski method is disclosed. The melt depth and thermal conditions are constant during growth because the silicon melt is continuously replenished as it is consumed, and the crucible location is fixed. The critical v/G is determined by the hot zone configuration, and the continuous replenishment of silicon to the melt during growth enables growth of the ingot at a constant pull rate consistent with the critical v/G during growth of a substantial portion of the main body of the ingot. The continuous replenishment of silicon is accompanied by periodic or continuous nitrogen addition to the melt to result in a nitrogen doped ingot.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: September 7, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Carissima Marie Hudson, Jae-Woo Ryu
  • Patent number: 11094052
    Abstract: A method of counting sheet materials applied to a pile of sheet materials, comprising the steps of: receiving an image of the pile of sheet materials; obtaining a grayscale value of a plurality of pixels along a first image axis direction of the image to form an one dimensional first array; performing binarization of the first elements of the first array with a first threshold value to form an one dimensional second array; obtaining the number of the second elements of a first value appearing between two second elements of a second value in the second array to form a third array; dividing the elements of the third array into a first cluster and a second cluster with a second threshold value; counting the number of the third elements belonging to the first cluster and defining said number as the number of the first sheet materials.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 17, 2021
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Wei-Cheng Chang, Chia-Yeh Lee, Han-Zong Wu
  • Patent number: 11085127
    Abstract: A method of growing a doped monocrystalline ingot using a crystal growing system is provided. The crystal growing system includes a growth chamber, a dopant feeding device, and a feed tube. The method includes preparing a melt of semiconductor or solar-grade material in a crucible disposed within the growth chamber, introducing a solid dopant into the feed tube with the dopant feeding device, melting the solid dopant within the feed tube to a form a liquid dopant, introducing the liquid dopant into the melt below a surface of the melt, and growing a monocrystalline ingot from the melt by contacting the melt with a seed crystal and pulling the seed crystal away from the melt.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: August 10, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Stephan Haringer, Marco D'Angella, Mauro Diodà
  • Patent number: 11085128
    Abstract: Methods for producing single crystal silicon ingots in which the dopant concentration in the silicon melt is controlled are disclosed. The control of the dopant concentration enhances ingot quality by the reduction or elimination of dislocations in the neck, crown, and main body portions of the single crystal silicon ingot.
    Type: Grant
    Filed: September 10, 2019
    Date of Patent: August 10, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventor: Maria Porrini
  • Patent number: 11085126
    Abstract: A feed assembly supplies polysilicon to a growth chamber for growing a crystal ingot from a melt. An example system includes a housing having support rails for receiving one of a granular tray and a chunk tray and a feed material reservoir positioned above the support rails to selectively feed one of either the granular tray or the chunk tray. A valve mechanism and pulse vibrator are also disclosed.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: August 10, 2021
    Assignees: GlobalWafers Co., Ltd., Daevac International Co., Ltd.
    Inventors: Seok Min Yun, Seong Su Park, Jun Hwan Ji, Won-Jin Choi, UiSung Jung, Young Jung Lee, Tae Su Koo, Sung-Jin Kim
  • Patent number: 11081407
    Abstract: Methods for assessing the quality of a semiconductor structure having a charge trapping layer to, for example, determine if the structure is suitable for use as a radiofrequency device are disclosed. Embodiments of the assessing method may involve measuring an electrostatic parameter at an initial state and at an excited state in which charge carriers are generated.
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: August 3, 2021
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Igor Rapoport, Srikanth Kommu, Igor Peidous, Gang Wang, Jeffrey L. Libbert