Abstract: A 4 KHz channel is used for communication between a processing unit associated with a satellite telephone office and a processing unit associated with a connected class 5 telephone office. A data link circuit is connected to the processing unit of the satellite office and operates to transmit data communications between the processing unit of the satellite office and the class 5 telephone office via the 4 KHz channel.

Abstract: An electromagnetic device utilizing a Hall effect switch for detecting the presence or absence of an electrical current. The device includes a flux generator for generating a field of magnetic flux and an adjustable magnetic circuit for varying the amount of flux delivered to the Hall switch.

Abstract: This fault recovery system determines the integrity of a duplex digital PCM switching network. The two copies of the switching network operate in synchronization and comparison of the outputs of each copy of the switching network takes place in order to detect network faults. The fault recovery mechanism is chiefly provided by inserting PCM samples from maintenance registers into the PCM data stream, through the digital switching network and trapping said PCM sample for analysis by the program. Subsequently, the logical unit corresponding to each fault is determined and a count is recorded corresponding to each unit.

Abstract: A circuit board positioning arrangement for multiple of circuit boards. Support apparatus maintains the circuit boards in a spaced parallel relationship while permitting movement of one board relative to another. Sequencing apparatus fixed to one of the boards engages receiving apparatus on another, positioning one of the boards forward of another. When force is applied to the least advanced board, the most advanced board engages an associated connector. Continued application of force then causes the sequencing apparatus to release allowing the next most advanced board to engage its connector.

Abstract: A clock synchronization system for use in a digital switching system including multiple clock circuits. This circuit includes multiple synchronization circuits connected in a master-slave arrangement. Each synchronization circuit includes a counter chain which provides a periodic system framing pulse and a trigger circuit which insures that its slave system framing pulse is in synchronization with the master system framing pulse.

Abstract: A control circuit, for use in a telephone switching system, which monitors, controls and transfers data to and from memory, input-output devices and external circuits. A microprocessor operates under control of read-only and random-access memories. It communicates with the external telephone system via bus transceivers and a programmable interrupt controller. The integrity of this circuit is monitored by high reliability data and address parity circuits.

Abstract: A tool for extracting a printed circuit card from a holder the latter having top and bottom guide tracks and a rear wall having contacts engageable by terminal tabs on the card, comprised of a long tubular shaft having a mounting body rotatably connected on one end and a U-shaped linkage assembly pivotally mounted along the lower portion of the shaft. The mounting body includes a pair of magnets and a retainer clip disposed to mount on the top guide track and a pair of spring guides mounted below the magnets which stradle the circuit card to be extracted. The U-shaped linkage includes a notched area in each arm arranged to interlockingly engage similar notches on a circuit card stiffener or handle. A pulling force applied to the shaft extracts the card from the holder and its associated contacts.

Abstract: A centrally located digital multiplexer distributes T1 digital signals between a digital central office and a plurality of subscriber service circuits each located at a corresponding subscriber's premises. The subscriber service circuits provide digital signaling and analog line supervision. Analog power supplies and signal generators are connected to the subscriber service units under control of a centrally located microprocessor which communicates with the central office via a dedicated channel in the digital multiplexer.

Abstract: A simplex time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the originating time switching stage but remain segregated throughout the space switching stage and the terminating time switching stage.

Abstract: A tool for extracting a printed circuit card from a holder the latter having top and bottom guide tracks and a rear wall having contacts engageable by terminal tabs on the card, comprised of a long tubular shaft having a mounting body rotatably connected on one end and a linkage assembly pivotally mounted on opposite end. The mounting body includes a pair of magnets and a retainer clip disposed to mount on the top guide track and a pair of spring guides mounted below the magnets which stradle the circuit card to be extracted. The linkage includes a notched area arranged to interlockingly engage a similar notch on a circuit card stiffener or handle. A pulling force applied to the shaft extracts the card from the holder and its associated contacts.

Abstract: A duplex time-space-time switching network is shown in which there is a multiple crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the originating and terminating time switching stages but remain segregated throughout the space switching stage.

Abstract: A circuit which performs loop supervision, transmit, receive, and transmit and receive regulation and sidetone balance. A loading circuit shunts excess current from the transmit and receive circuits under short loop conditions. The loading circuit also controls regulation of the transmit and receive circuits. Use of constant current power supplies external to the transmit and receive circuits prevents modulation of the power supplies.

Abstract: A power converter which supplies AC or positive or negative DC output voltage with positive or negative current while isolating the output voltage from the input power source. This converter includes a pulse width modulator converts power amplitude signals to pulses of proportionate width. A power driver circuit applies these pulses to a sychronous demodulator and low pass filter via a pulse transformer. A low output impedance is presented to all output disturbances such that the converter can source or sink current in true four quadrant operation, including the passing of power from output to input when a load voltage exceeds the intended supply voltage.

Abstract: A duty cycle monitor circuit which detects variations in the duty cycle of a monitored pulse by comparing its duty cycle with the pulse width of an external reference signal. A detection circuit detects the duty cycle variation of the monitored pulse after being periodically reset by the external reference signal. A storage circuit is clocked by the reference signal and operates to store the output signals of the detection circuit. Upon detection of a duty cycle failure the monitor can be cleared by external control or detection of a monitored pulse having a valid duty cycle.

Abstract: A time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the terminating time switching stage but remain segregated throughout the space switching stage and the originating time switching stage.

Abstract: A duplex time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the terminating time switching stage but remain segregated throughout the space switching stage and the terminating time switching stage.

Abstract: A duplex time-space-time switching network is shown in which there is a crossover of voice information from one rail to another rail in a large digital switching system. The time and control unit is divided into two rails both incoming and outgoing. Each rail multiplexes two 193 channel streams into one 386 channel stream of information. These two rails crossover in the originating time switching stage but remain segregated throughout the space switching stage and the terminating time switching stage.

Abstract: A "call-for-service" and continuity sensor circuit for use with a trunk circuit of a digital PABX telephone system interfacing with a central office via ground start signaling providing for detection of a "call-for-service" signal to the PABX by the central office. This circuit also provides high and closely matched tip to ground and ring to ground impedances for all trunk conditions in order to prevent excess loading of the trunk circuit. This circuit provides a precise and stable threshold detection level necessary for accurate sensing of the trunk circuit conditions mentioned above despite parasitic leakage current, induced longitudinal power line voltages, and earth potentials sometimes found to exist on the line connecting the central office to the PABX.

Abstract: An allocation controller providing for equal priority sharing of multiple resources by a plurality of central processing units. Conflicts resulting from simultaneous requests from several CPUs for access to one of the common resources are resolved at a high rate of speed. In addition, an approximately statistically equal probability is maintained for access of the common resource by all the central processing units.