Abstract: The DTMF receiver sense and control arrangement collects and stores multiple customer originated data for determination of customer identification, validity and billing purposes. This arrangement is part of a telecommunications switching office and monitors up to 24 DTMF receivers (channels) to determine whether each channel contains valid data. This data is stored in temporary storage for subsequent transmission to a processor of the switching office. Each of the DTMF receivers asynchronously presents data for collection by this arrangement. This arrangement provides the proper timing required to operate up to 24 receivers to obtain their data, while it is stable at the receiver. Once a receiver transmits data, this arrangement then synchronizes its operation to that receiver so that, sequential monitoring of each of the 24 channels is guaranteed and no loss of valid data will result. In addition, each DTMF receiver may be enabled selectively for special monitoring.

Abstract: A voltage comparator with both analog and digital outputs. The analog output being useful to control a analog processer such as a voltage regulator while the digital output gives an indication of the controlled state. The present circuitry may be adapted as a lowcost means of adding microprocessor control to an ongoing process whose behavior is dependent upon the state of another parameter such as the voltage exhibited by a non-rechargeable battery supply.

Abstract: A vented cap for covering an apparatus housing utilized in an outdoor environment including a pair of spaced apart roof panels defining therebetween a chamber. Apertures in the room panels out of registry with each other provide a path for ventilation of the enclosure while preventing the ingress of environmental elements such as rain. Mesas are raised above the surface of the inner roof panel and each contains one of the inner apertures. Drain apertures are formed around the periphery of the vented cap assist in permitting egress of environmental elements from and ingress of cooling air to the chamber.

Abstract: This invention is a cost efficient controller for a space switching network for high voltage applications. This controller is operated by a CPU which provides for generating a minimal number of control signals for a multistage space switching network. For a space switching network of N stages, the present controller generates N+1 control signals for operating the space switching function. The CPU of this controller is adaptable to implementation via a microprocessor CPU. The present controller arrangement may be also employed for conventional non-high voltage space switching applications.

Abstract: A secretarial answering system for use with a switching system which includes a plurality of subscriber telephone stations each equipped with a buzzer, and a secretarial telephone station equipped with an audible signalling circuit and a plurality of lamp and switch pairs. A first processing unit periodically scans line circuits to determine changes in the busy, idle or ringing status of the subscriber stations. A second processing unit converts status and line identification information from parallel to serial format, and transmits it to the secretarial station via a link bus protocol for packetized messages. The secretarial station then provides visual and audible indications of subscriber station status. The secretarial station transmits a switch initiated directed call pickup or a call transfer message to the switching system, and a buzzing requested message to the second processing unit.

Abstract: This invention describes a method for mapping one or more of a number of input events to one or more of a number of output functions. This method involves the use of a memory device to perform the mapping between the input events and the output functions. This invention performs the mapping function with a minimum of hardware devices.

Abstract: A connector for establishing connection between a printed wiring board and a ribbon-type cable through terminals on the printed wiring board and a corresponding contacts on the cable. The contacts are positioned to engage the terminals when the printed wiring board, the ribbon cable, and a resilient pad are compressed between a base and a frame. The frame is urged towards the base by clamps each including a handle pivoted about a pivot point on the frame acting to pull links, which are engaged with hooks attached to the base, toward the frame. Alignment pins are provided extending from the base towards the frame to position the pad and the ribbon cable and prevent their lateral motion relative to the base. A pair of alignment tongues extend from the base at an oblique angle and engage alignment bores in ears of the frame to maintain the frame in alignment with the base while providing wiping action for the contacts during engagement. A pair of handle locks retain the handles in an operated position.

Abstract: A phase comparator is included with each incoming channel to compare the clock phase of the incoming signal and a local oscillator. The phase comparator of an on-line active unit generates a signal to control the oscillator to maintain its output in phase with the incoming signal. The generated control signal is also connected to capacitor storage in associated channel phase comparators to provide them with an initial starting control voltage when they are switched in to be the receiving channels. Thus eliminating the uncontrolled operation of the oscillator during switching interval.

Abstract: The present invention consists of a subcircuit which may be employed in integrated circuit technology to provide the necessary drop from a relatively high voltage source and to provide base current for biasing of associated transistorized circuitry. Each subcircuit employs four transistors and one resistor and provides an effective drop from approximately 1.1 volts when it is desired to provide at least 2 microamps of bias circuit. Additional subcircuits of similar configuration can be placed in series with the present circuitry to increase the amount of voltage drop in accordance with the requirements of the associated circuitry.

Abstract: A low insertion force arrangement for establishing a connection to a printed wiring board of the type including at least one printed wiring board terminal. The arrangement includes a plurality of connection springs including at least one actuator engaging area, and at least one pivot point, contact, and a terminal. A first embodiment includes an actuator engaging area located centrally on the spring between two pivot points which are located between a contact and a connection spring terminal. The actuator is a adapted to sequentially pivot a plurality of connection springs. A other embodiment includes at least one connection spring including a pivot point centrally located on the spring between an actuator engaging area and a second pivot point both of which are located between a contact and a connection spring terminal. In both embodiments the contact is located at one end of each connection spring in alignment with a corresponding printed wiring board terminal.

Abstract: A laminate switch assembly comprising dual dome switchplates providing improved tactile sensation good balance characteristics and able to maintain a low dynamic resistance throughout its life expectancy. Both tensioned domes are aligned with electrical contact areas part of which is formed on the underside of one dome and the other on a printed circuit board or backplate, which in response to depression are placed in contact with each other to provide a switch closure to a connected or associated electrical device.

Abstract: A technique for evaluating keypad conditions while utilizing only a minimum number of ports in a microprocessor involved in control of a telephone instrument. Because of the limited number of ports available and necessity to also evaluate conditions of mode selecting strap switches, the utilization of a reduced number of ports is highly desirable in such an enviroment. Such a reduction becomes an absolute necessity particularly in dealing in those enviroments that include random access memories, read only memories, pulse dialers, integrated circuits and liquid crystal displays. A combination of diode gating, resistive decoupling and time multiplexing techniques are used to match the input/output requirements to the available ports of a specific microprocessor.

Abstract: A modulo 2.sup.2n -1 adder employing adders which may all be standard binary adders. A first binary adder sums binary input signals a and b to produce a first sum signal in which the n+2 more significant bits represent the integer part of (a+b)/2.sup.2n (i.e., of a+b taken modulo 2.sup.2n). A second binary adder subtracts these n+2 more significant bits from a 2n bit shifted (less significant bits) version thereof for producing a first difference signal which is subtracted from the first sum signal in a third binary adder to produce a binary signal R. The signal R is applied to one input of a fourth binary adder which produces the desired modulo 2.sup.2n -1 signal. A comparator circuit applies a constant (2.sup.2n -1) to a difference input of the fourth binary adder only when R is greater than or equal to this constant.

Abstract: An arrangement for constructing multi-layered printed circuits characterized by a first layer having top and bottom surfaces with the top surface including a plurality of parallel conductors divided into at least two conductor groups by a transversely oriented break across each conductor. The bottom surface further includes a plurality of parallel conductors arranged perpendicular to the conductors on the top surface and is also divided into at least two conductor groups by a transversely oriented break across each conductor. A plurality of holes extend through the first layer with, each hole adjacent to an intersecting conductor pair. A second layer including top and bottom surfaces and a plurality of plated-through holes has conductor pennants extending from selected holes in a first direction on the top surface and a second opposite direction on the bottom surface.

Abstract: A low insertion force connection arrangement for establishing a connection between at least two printed wiring boards each of the type including at least one printed wiring board terminal. The connection arrangement includes at least one connection spring including an actuator engaging area located centrally on a side of the spring facing the printed wiring boards and between two pivot points. The pivot points are located on a side of the connection spring facing away from the printed wiring boards and between two contacts. The contacts are located at opposite ends of the connection spring facing and in alignment with corresponding ones of the printed wiring board terminals.

Abstract: A low insertion force connection arrangement for establishing a connection between at least two printed wiring boards each of the type including a plurality of printed wiring board terminals. The connection arrangement includes a plurality of connection springs each including an actuator engaging area located centrally on a side of the spring facing the printed wiring boards and between two pivot points. The pivot points are located on a side of the connection spring facing away from the printed wiring boards and between two contacts. The contacts are located at opposite ends of the connection spring, facing, and in alignment with corresponding ones of the printed wiring board terminals.

Abstract: A low insertion force connection arrangement for establishing a connection between at least two printed wiring boards, each including a plurality of terminals. The connection arrangement includes a plurality of connection springs each having a pivot point facing away from the printed wiring boards and located between two actuator engaging areas. The actuator engaging areas face the printed wiring boards and are located between two contacts. The contacts are located at opposite ends of the connection spring facing and in alignment with a corresponding terminal of the printed wiring boards. A connector body is provided including a plurality of grooves each adapted to receive one of the printed wiring boards and a plurality of spring receiving cavities each enclosing a pair of connection springs.

Abstract: A level comparator is used to check the incoming message header pulse amplitude and if it is of a level higher than an established level a signal is transmitted to update a digital counter whose digital output is converted by a digital to analog converter to establish an increased analog reference level. If the incoming message header is lower the counter is decremented to establish a lower reference level. Then the levels of any signals present at fixed intervals after the header or sync pulse are measured and recorded. These measured levels constitute the value of correction required for subsequent pulses and are added to or subtracted from following data pulses as required.

Abstract: A control system for use in a condensation heating facility to control the secondary vapor blanket used to prevent loss of primary vapor. The control system includes a pair of secondary vapor sensors which detect a secondary vapor blanket slightly below and alternatively slightly above a design depth. The sensors are connected to control relays which energize a high rate dispensing pump to build the secondary vapor blanket when it is below the low depth and to energize a low rate dispensing pump when the secondary vapor blanket is between the low depth and the high depth. Additional control is arranged to inhibit dispensing of secondary liquid when the secondary vapor blanket is above the high depth or the primary vapor blanket is below its designed depth or finally during a vapor phase heating cycle where the primary and secondary vapor blankets collapse as a function of heating during the cycle.

Abstract: This invention is a circuit for detecting a framing pattern consisting of a pseudo random shift register sequence. This circuit utilizes an extremely long framing pattern without either a large amount of memory or the need to receive a large number of bits in order to recognize the framing pattern. The use of lengthy framing patterns minimizes the chance of false framing caused by patterns in bit positions other than the framing bit position. In addition, the incoming data stream may be connected directly to the shift register mechanism.