Abstract: A heat-assisted magnetic recording head includes a magnetic pole, a waveguide, a near-field light generating element, and a substrate on which they are stacked. The near-field light generating element and the waveguide are disposed farther from the top surface of the substrate than is the magnetic pole. The near-field light generating element has an outer surface including: a first end face located in the medium facing surface; a second end face farther from the medium facing surface; and a coupling portion coupling the first and second end faces to each other. The first end face includes a near-field light generating part. The waveguide has an outer surface including an opposed portion opposed to a part of the coupling portion. The head further includes a mirror that reflects light emitted from a light source disposed above the waveguide, so as to let the light travel through the waveguide toward the medium facing surface.

Abstract: A sloped reader is disclosed that reduces skew between reader and written transitions in shingled writing. The reader is formed between surfaces of S1 and S2 shields that are aligned parallel to the sloped reader. A PMR writer is described that straightens transition curvature and reduces signal-to-noise ratio in shingled writing. In one embodiment, a symmetrical writer with a bowed trailing edge where two corners have a greater pole height than a center portion may be used for either right corner or left corner shingled writing. In a second embodiment, an asymmetrical writer is formed with a straight and sloped trailing edge such that the write corner has a greater pole height than the opposite corner on the trailing edge. The bowed angle in the symmetrical writer and slope angle in the asymmetrical writer is between 5 and 45 degrees and preferably between 10 and 30 degrees.

Abstract: A layered chip package includes a main body including a plurality of layer portions, and wiring disposed on a side surface of the main body. Each layer portion includes a semiconductor chip, an insulating portion covering at least one side surface of the semiconductor chip, and a plurality of electrodes connected to the semiconductor chip. The insulating portion has an end face located at the side surface of the main body on which the wiring is disposed. Each electrode has an end face surrounded by the insulating portion and located at the side surface of the main body on which the wiring is disposed.

Abstract: A layered chip package includes a main body, and wiring that includes a plurality of wires disposed on a side surface of the main body. The main body includes: a main part including first and second layer portions; and a plurality of first and second terminals that are disposed on the top and bottom surfaces of the main part, respectively, and are electrically connected to the plurality of wires. Each layer portion includes a semiconductor chip having a first surface and a second surface opposite thereto, and includes a plurality of electrodes. The electrodes are disposed on a side of the semiconductor chip opposite to the second surface. The first and second layer portions are bonded to each other such that the respective second surfaces face each other. The first terminals are formed by using the electrodes of the first layer portion, and the second terminals are formed by using the electrodes of the second layer portion.

Abstract: A main pole layer with a tapered trailing side is disclosed that has three sections each with a write pole portion along the ABS and a yoke portion. A lower section has a bottom surface including a leading edge at the write pole tip and sidewalls with a bevel angle between 4 and 20 degrees. The middle section has essentially vertical sidewalls with a tapered side starting at the trailing edge and extending to a back side of the write pole and into the yoke. An upper section includes a portion of the tapered side and a top surface of the main pole layer and has a sidewall with a bevel angle from 0 to 45 degrees. The thickness of the middle section is greater than the pole height variation caused by variations in back end processes including ion milling and lapping to reduce erase width (EW) variations.

Abstract: A process is described for the fabrication, through electrodeposition, of FexCoyNiz (x=60-71, y=25-35, z=0-5) films that have, in their as-deposited form, a saturation magnetization of at least 24 kG and a coercivity of less than 0.3 Oe. A key feature is the addition of aryl sulfinates to the plating bath along with a suitable seed layer.

Abstract: A perpendicular magnetic recording (PMR) head is fabricated with a self-aligned pole tip shielded laterally by a separated pair of side shields and shielded from above by an upper shield. The side shields are formed from a shield layer by a RIE process characterized by a mask and gases producing a variety of etch rates. The differential in etch rates maintains the opening dimension within the mask and allows the formation of a wedge-shaped trench within the shield layer that then separates the layer into two shields. The pole tip is then plated within the trench and an upper shield is formed above the side shields and pole.

Abstract: Detection of magnetic beads at temperature below room temperature can increase the signal level significantly as compared to the same detection when performed at room temperature. Additional improvement is obtained if the beads are below 30 nm in size and if deviations of bead size from the median are small. A preferred format for the beads is a suspension of super-paramagnetic particles in a non-magnetic medium.

Abstract: A layered chip package includes a main body, and wiring that includes a plurality of wires disposed on a side surface of the main body. The main body includes: a main part including a plurality of layer portions; a plurality of first terminals disposed on the top surface of the main part and connected to the wiring; and a plurality of second terminals disposed on the bottom surface of the main part and connected to the wiring. Each layer portion includes a semiconductor chip. The plurality of second terminals are positioned to overlap the plurality of first terminals as viewed in a direction perpendicular to the top surface of the main body. A plurality of pairs of first and second terminals that are electrically connected via the wires include a plurality of pairs of a first terminal and a second terminal that are positioned not to overlap each other.

Abstract: In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein. Further, an uppermost substrate and a lowermost substrate have an electromagnetic shielding layer formed using a ferromagnetic body. The electromagnetic shielding layer is formed in a shielding region except the extending zone. The extending zone is set a part which the wiring electrode crosses, in a peripheral edge part of the device region.

Abstract: In a laminated semiconductor substrate, a plurality of semiconductor substrates are laminated. Each of the semiconductor substrate has a plurality of scribe-groove parts formed along scribe lines. Further, each of the semiconductor substrate has a plurality of device regions insulated from each other and has a semiconductor device formed therein. Further, an uppermost substrate and a lowermost substrate have electromagnetic shielding layer formed in regions other than the scribe-groove parts using a ferromagnetic body. Further, in the laminated semiconductor substrate, a through hole which penetrates the plurality of semiconductor substrates laminated in a laminated direction is formed in the scribe-groove part, and the laminated semiconductor substrate has a through electrode penetrating the plurality of semiconductor substrates through the through hole.

Abstract: An improved magnetic shield for a perpendicular magnetic write head is disclosed. Its main feature is a pair of tabs at the shield's bottom corners. Said tabs are significantly wider at their point of attachment to the shield than further away from the shield. The end portions of each tab slope upwards (away from the ABS) at an angle of about ten degrees. A process for manufacturing the shield is also disclosed.

Abstract: A heat-assisted magnetic recording head includes a slider, an edge-emitting laser diode fixed to the slider, and an external mirror fixed to the laser diode. The laser diode has: an emitting end face that includes an emission part for emitting laser light; a mounting surface that lies at an end in a direction perpendicular to the plane of an active layer and faces the slider; and a rear surface opposite to the mounting surface. The external mirror includes: a first to-be-fixed part disposed along the emitting end face; a second to-be-fixed part disposed along the rear surface; and a coupling part that couples the first and second to-be-fixed parts to each other. The first to-be-fixed part has a reflecting surface that reflects the laser light emitted from the emission part toward the waveguide.

Abstract: A slider mounted CPP GMR or TMR read head sensor is protected from electrostatic discharge (ESD) damage and from noise and cross-talk from an adjacent write head by means of a balanced resistive/capacitative shunt. The shunt includes highly resistive interconnections between upper and lower shields of the read head and a grounded slider substrate and a low resistance interconnection between the lower pole piece of the write head and the substrate. The capacitances between the pole piece and the upper shield, the upper shield and the lower shield and the lower shield and the substrate are made equal by either forming the shields and pole piece with equal surface areas and separating them with dielectrics of equal thicknesses, or by keeping the ratio of area to insulator thicknesses equal.

Abstract: The conventional free layer in a CPP GMR or TMR read head has been replaced by a tri-layer laminate comprising Co rich CoFe, moderately Fe rich NiFe, and heavily Fe rich NiFe. The result is an improved device that has a higher MR ratio than prior art devices, while still maintaining free layer softness and acceptable magnetostriction. A process for manufacturing the device is described.

Abstract: A hard bias structure for biasing a free layer in a MR element within a read head is comprised of a composite hard bias layer having a Co78.6Cr5.2Pt16.2/Co65Cr15Pt20 configuration. The upper Co65Cr15Pt20 layer has a larger Hc value and a thickness about 2 to 10 times greater than that of the Co78.6Cr5.2Pt16.2 layer. The hard bias structure may also include a BCC underlayer such as FeCoMo which enhances the magnetic moment of the hard bias structure. Optionally, the thickness of the Co78.6Cr5.2Pt16.2 layer is zero and the Co65Cr15Pt20 layer is formed on the BCC underlayer. The present invention also encompasses a laminated hard bias structure. The Mrt value for the hard bias structure may be optimized by adjusting the thicknesses of the BCC underlayer and CoCrPt layers. As a result, a larger process window is realized and lower asymmetry output during a read operation is achieved.

Abstract: A layered chip package includes a main body and wiring, the wiring including a plurality of wires disposed on a side surface of the main body. The main body includes a main part and a plurality of terminals. The main part includes a plurality of layer portions stacked. The terminals are disposed on at least either one of the top and bottom surfaces of the main part and electrically connected to the wires. Each of the layer portions includes a semiconductor chip. The plurality of wires include a plurality of common wires and a plurality of layer-dependent wires. In at least one of the layer portions, the semiconductor chip is electrically connected to the plurality of common wires and is selectively electrically connected to only the layer-dependent wire that the layer portion uses, among the plurality of layer-dependent wires.

Abstract: A layered chip package includes a main body and wiring, the wiring including a plurality of wires disposed on a side surface of the main body. The main body includes a main part and a plurality of terminals. The main part includes a plurality of layer portions stacked. The terminals are disposed on at least either one of the top and bottom surfaces of the main part and electrically connected to the wires. Each of the layer portions includes a semiconductor chip, and a plurality of electrodes that are electrically connected to the wires. The electrodes include a plurality of first electrodes that are intended to establish electrical connection to the semiconductor chip, and a plurality of second electrodes that are not in contact with the semiconductor chip. In at least one of the layer portions, the first electrodes are in contact with and electrically connected to the semiconductor chip.

Abstract: Improved writability and a reduction in adjacent track erasure are achieved in a PMR writer with a large flare angle of 45 and 90 degrees in the main write pole and a full side shield or partial side shield configuration around the narrow write pole section and write pole tip. A trailing shield is formed above the write pole's top surface and a full or partial side shield section is spaced a certain distance from each side of the write pole. The partial side shield has a thickness less than that of the write pole and a top or bottom surface about coplanar with the pole tip's top or bottom edge, respectively. The partial side shield may include two sections on each side of the write pole wherein the bottom surface of a top section is separated by a certain distance from the top surface of a bottom section.

Abstract: A vertically stacked DFH design in a read/write head is disclosed that allows independent control of write gap protrusion and read gap protrusion. A first heater is formed in an insulation layer proximate to a sensor in a read head. A second heater is formed in a second insulation layer proximate to the write pole tip in a main pole layer. The two heaters are connected in series or in parallel through leads to a power source that activates the heaters. In one embodiment, the heaters have a fixed resistance ratio. Preferably, there are two drivers in the power source so that a first power can be applied to the first heater and a second power can be applied to the second heater to enable an adjustment of reader protrusion/writer protrusion or gamma ratio. Fast reader and writer actuation is achieved and low power consumption is realized.