Patents Assigned to HEFEI BOE JOINT TECHNOLOGY CO., LTD.
  • Patent number: 11373577
    Abstract: The present application discloses a shift-register unit. The shift-register unit includes a first sub-unit including a first input circuit coupled via a first node to a first output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal and the first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. Additionally, the shift-register unit includes a second sub-unit including a second input circuit coupled via a second node to a second output circuit. The second input circuit is configured to control a voltage level of the second node in response to the first input signal and the second output circuit is configured to output a second output signal in response to the voltage level of the second node.
    Type: Grant
    Filed: July 2, 2019
    Date of Patent: June 28, 2022
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li, Xing Zhang
  • Patent number: 11361696
    Abstract: A shift register includes an output sub-circuit, a cascade sub-circuit and at least one additional output sub-circuit. The output sub-circuit is configured to transmit a first clock signal received at the first clock signal terminal to the output signal terminal under control of a potential at the pull-up node, so as to scan a gate line coupled to the output signal terminal. The cascade sub-circuit is configured to transmit a second clock signal received at the second clock signal terminal to the cascade node under the control of the potential at the pull-up node. Each additional output sub-circuit is configured to transmit a clock signal received at a corresponding clock signal terminal to a corresponding additional output signal terminal under control of a potential at the cascade node, so as to scan a gate line coupled to the corresponding additional output signal terminal.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: June 14, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11361715
    Abstract: The present disclosure provides a shift register unit, a gate driving circuitry and a method for driving the gate driving circuitry. The shift register unit includes an input circuitry, a first latch circuitry, a second latch circuitry and an output end. The input circuitry is configured to output an input control signal to the first latch circuitry in accordance with a first level signal, a second level signal and a first ON signal. The first latch circuitry is configured to output an output signal as a gate driving signal via the output end in accordance with a first clock signal and the input control signal, and latch the output signal. The second latch circuitry is configured to output a second ON signal in accordance with a second clock signal and the output signal, and latch the second ON signal.
    Type: Grant
    Filed: June 20, 2021
    Date of Patent: June 14, 2022
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li, Pan Xu
  • Patent number: 11355070
    Abstract: Provided are a shift register unit and a control method thereof, a gate driving circuit and a control method thereof, and a display apparatus. The shift register unit may include: a first shift register coupled to an input signal terminal, a first clock signal terminal and a second clock signal terminal. The first shift register is configured to generate a first output signal based on the signal at the first clock signal terminal and generate a second output signal based on the signal at the second clock signal terminal; and a second shift register coupled to the input signal terminal and a third clock signal terminal, the second shift register is configured to generate a third output signal based on the signal at the third clock signal terminal; and a pull-up node of the first shift register is coupled to a pull-up node of the second shift register.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: June 7, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhidong Yuan, Yongqian Li, Can Yuan
  • Patent number: 11348534
    Abstract: A shift register unit and a method for driving the same, and a gate driving circuit are provided. The shift register unit includes: an adjustment circuit coupled between an input signal terminal and an input node of the shift register unit, and configured to couple or decouple the input signal terminal and the input node under control of a potential at the input signal terminal; an input circuit for providing a potential at the input node to the pull-up node under control of a potential at the input signal terminal; an output circuit for receiving a clock signal from the clock signal terminal and provide an output signal to the output signal terminal based on the received clock signal under control of a potential at the pull-up node; and a control circuit for controlling a potential at the output signal terminal under control of a potential at the pull-up node.
    Type: Grant
    Filed: June 19, 2020
    Date of Patent: May 31, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Sixiang Wu
  • Patent number: 11341923
    Abstract: The present disclosure relates to the field of display technology, and provides a shift register unit and a driving method thereof, a gate driving circuit, and a display panel. The shift register unit includes: an input circuit, a charging circuit, an inverter circuit, an output circuit, and a pull-down circuit. The input circuit is connected to a second clock signal terminal, a signal input terminal and a first node. The inverter circuit is connected to the signal input terminal, the second clock signal terminal, a first power supply terminal, a second power supply terminal and a pull-down node. The output circuit is connected to the pull-up node, the first power supply terminal and an output terminal. The pull-down circuit is connected to the pull-down node, the second power supply terminal, the pull-up node, and the output terminal.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: May 24, 2022
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhidong Yuan, Pan Xu, Yongqian Li, Can Yuan
  • Patent number: 11342386
    Abstract: An array substrate and a display device are provided. The array substrate includes at least one data line and a plurality of sub-pixel groups arranged in an array along a first direction and a second direction. At least one sub-pixel group includes two rows of sub-pixels, one row of the two rows of sub-pixels includes a first color sub-pixel and a second color sub-pixel, and the other row of the two rows of sub-pixels includes a third color sub-pixel; the first color sub-pixel, the second color sub-pixel and the third color sub-pixel in each sub-pixel group are connected to a same data line of the at least one data line.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: May 24, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Yongqian Li, Meng Li, Zhidong Yuan
  • Patent number: 11342393
    Abstract: The present disclosure relates to a method for manufacturing an OLED light emitting device, an OLED light emitting device, and an OLED display device. The method for manufacturing an OLED light emitting device according to an embodiment of the present disclosure includes forming a pixel defining layer on a substrate, wherein the pixel defining layer comprises a lyophilic material or a lyophobic material and the pixel defining layer comprises a plurality of openings which are spaced apart from each other; forming an anode layer on the substrate and in each opening; adding a preset solvent having a property opposite to that of the lyophilic material or the lyophobic material of the pixel defining layer in an OLED film layer ink; and ink-jet printing the OLED film layer ink on the anode layer and in each opening to form an OLED film layer.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: May 24, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yue Hu, Chinlung Liao, Chienyu Chen
  • Patent number: 11335264
    Abstract: A pixel circuit and a driving method thereof, and a display device, the pixel circuit being configured to drive a light-emitting element and including: a node control sub-circuit, which is configured to provide a first node with a signal of a data signal end and provide a second node with a signal of a control signal end under the control of a first scanning end; a driving sub-circuit, which is configured to provide the second node with a driving current under the control of the first node and the second node; a storage sub-circuit, which is configured to store electric charge between the first node and the second node; a reading sub-circuit, and the light-emitting element, which is electrically connected to the second node and a second power supply end, respectively.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: May 17, 2022
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhidong Yuan, Xuehuan Feng, Yongqian Li, Can Yuan, Meng Li, Dongxu Han
  • Patent number: 11335263
    Abstract: Pixel driving method for driving pixel unit, display driving method and display substrate are provided. The pixel unit includes pixel driving circuit, including driving transistor, storage capacitor, and data writing circuit, the driving transistor has control electrode coupled to first terminal of the data writing circuit and the storage capacitor, and first electrode coupled to second terminal of the storage capacitor, and second terminal of the data writing circuit is coupled to data line. The pixel driving method includes: loading a data voltage into the data line, and controlling the first and second terminals of the data writing circuit to be connected; controlling the data line to be floating, and maintaining connection between the first and second terminals of the data writing circuit to reduce gate-source voltage of the driving transistor; and controlling the first and second terminals of the data writing circuit to be disconnected.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: May 17, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Pan Xu, Yongqian Li, Zhidong Yuan
  • Patent number: 11328785
    Abstract: Shift register includes signal writing circuit, voltage control circuit and output circuit. The signal writing circuit is configured to write inverted signal of input signal provided by signal input terminal into second node responsive to control of second clock signal provided by second clock signal terminal. The voltage control circuit is configured to write first operating voltage into first node and write second clock signal into third node in voltage control circuit in response to control of voltage at first node, write second operating voltage into third node in response to control of second clock signal and write first clock signal provided by first clock signal terminal into first node in response to control of voltage at third node and first clock signal. The output circuit is configured to write second or first operating voltage into signal output terminal in response to control of voltage at first or second node.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: May 10, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Yongqian Li, Zhidong Yuan
  • Patent number: 11328675
    Abstract: A shift register unit, a driving method, a gate driving circuit, and a display device are disclosed. The shift register unit includes: a shift circuit, used to output, to a first output end during a first time period, a power control signal, and output the power control signal to a second output end during a second time period; and a signal integrated circuit, used to output the power control signal to a third output end in response to the power control signal and a first output signal, output the power control signal to the third output end in response to the power control signal and a second output signal, and output, to the third output end at times other than the first and second time period in response to the power control signal, the first output signal and the second output signal, a first pull-down power signal.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: May 10, 2022
    Assignees: Hefei BOE Joint Technology Co., LTD., BOE Technology Group Co., LTD.
    Inventors: Can Yuan, Yongqian Li, Zhidong Yuan, Min He, Haixia Xu
  • Patent number: 11328672
    Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and a display device are provided. The shift register unit includes: a first input circuit, a second input circuit, an output circuit, and a compensation circuit, the first input circuit is configured to write a first input signal to the first node in response to a first control signal; the second input circuit is configured to input a second input signal to the second node in response to a detection control signal and configured to transmit a level of the second node to the first node in response to a second control signal; the compensation circuit is configured to compensate the level of the second node; and the output circuit is configured to output a composite output signal to the output terminal under control of a level of the first node.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: May 10, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11328674
    Abstract: The present disclosure provides a shift register unit, a driving method thereof, and a gate driving circuit. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node under control of potential of the pull-up node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: May 10, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Sixiang Wu
  • Patent number: 11315463
    Abstract: A shift register includes an output sub-circuit, a cascade sub-circuit and at least one additional output sub-circuit. The output sub-circuit is configured to transmit a first clock signal received at the first clock signal terminal to the output signal terminal under control of a potential at the pull-up node, so as to scan a gate line coupled to the output signal terminal. The cascade sub-circuit is configured to transmit a second clock signal received at the second clock signal terminal to the cascade node under the control of the potential at the pull-up node. Each additional output sub-circuit is configured to transmit a clock signal received at a corresponding clock signal terminal to a corresponding additional output signal terminal under control of a potential at the cascade node, so as to scan a gate line coupled to the corresponding additional output signal terminal.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: April 26, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Publication number: 20220123056
    Abstract: A display region includes a plurality of pixel driving circuitry setting regions arranged sequentially in a first direction, and each pixel driving circuitry setting region extends in a second direction intersecting the first direction. Each display circuitry includes a plurality of subpixels in one-to-one correspondence with the pixel driving circuitry setting regions, each subpixel includes a subpixel driving circuitry and a light-emitting element coupled to each other, the subpixel driving circuitry is located in a corresponding pixel driving circuitry setting region, the light-emitting element is located at a side of the subpixel driving circuitry away from the substrate, a width of the light-emitting element is greater than a width of the corresponding pixel driving circuitry setting region in the first direction, and a length of the light-emitting element is smaller than a length of the corresponding pixel driving circuitry setting region in the second direction.
    Type: Application
    Filed: May 15, 2020
    Publication date: April 21, 2022
    Applicants: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Meng LI, Yongqian LI, Jingquan WANG, Chen XU, Dacheng ZHANG, Zhidong YUAN, Can YUAN, Xuehuan FENG
  • Publication number: 20220122527
    Abstract: A gate driving unit, a circuit, a display substrate, a display panel, and a display device are provided. The gate driving unit includes an Nth stage of shift register unit and an (N+1)th stage of shift register unit, N is a positive integer. The Nth stage of shift register unit includes an Nth stage of pull-up node control circuit, and the (N+1)th stage of shift register unit includes an (N+1)th stage of pull-up node control circuit. The Nth stage of pull-up node control circuit is electrically connected to an Nth stage of pull-up node and a control line, respectively, is configured to control a potential of the Nth stage of pull-up node under the control of a control signal inputted by the control line. The (N+1)th stage of pull-up node control circuit is electrically connected to an (N+1)th stage of pull-up node and the control line, respectively, and is configured to control a potential of the (N+1)th stage of pull-up node under the control of the control signal inputted by the control line.
    Type: Application
    Filed: August 8, 2019
    Publication date: April 21, 2022
    Applicants: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan FENG, Yongqian LI
  • Patent number: 11296169
    Abstract: An array substrate, a display panel and a display device are provided. The array substrate includes a plurality of pixel units arranged in an array, each pixel unit includes a first sub-pixel, a second sub-pixel and a third sub-pixel, and each of the first, second and third sub-pixels includes a pixel circuit including a switching transistor, a driving transistor, a sensing transistor, a storage capacitor and a light-emitting device. The first sub-pixels, the second sub-pixels and the third sub-pixels included in each row of the array are controlled by four scanning lines, and at least one of the four scanning lines is shared by the row of the array and another row of the array adjacent to the row of the array. Each column of pixel units of the array are coupled to a same data line.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: April 5, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Yongqian Li, Zhidong Yuan
  • Patent number: 11295667
    Abstract: Provided are a pixel structure, a display panel and a control method thereof. The pixel structure includes four sub-pixel units, wherein the i-th sub-pixel unit includes: an i-th element to be driven and an i-th drive circuit, 1?i?4, and the i-th drive circuit is respectively connected with an M-th data line and an N-th scanning line, and is configured to drive the i-th element to be driven according to a data signal of the M-th data line under control of the N-th scanning line, M = { 1 , 1 ? i ? 2 2 , 3 ? i ? 4 , N = { 1 , 2 ? i ? 3 2 , i ? ? is ? ? 1 ? ? or ? ? 4 .
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: April 5, 2022
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Zhidong Yuan, Yongqian Li, Song Meng, Can Yuan
  • Patent number: 11296162
    Abstract: An array substrate includes a base substrate (1); a driving transistor (2) on the base substrate (1); an insulating layer (3) on the driving transistor (2), the insulating layer (3) comprising a via hole above a first electrode (21) of the driving transistor (2); a conductive portion (4) on the insulating layer (3); and a light emitting device (6) on the conductive portion (4) and electrically connected to the conductive portion (4). The conductive portion (4) may be electrically connected to the first electrode (21) of the driving transistor (2) through the via hole. The light emitting device (6) may be above the via hole, and an orthographic projection of the light emitting device (6) on the base substrate (1) may cover an orthographic projection of the via hole on the base substrate (1).
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: April 5, 2022
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Can Yuan, Yongqian Li, Zhidong Yuan