Abstract: A method of fabricating an array substrate is provided. The method includes providing a substrate including a gate pad configured to bond a gate driving integrated circuit, a data pad configured to bond a data driving integrated circuit, and a plurality of peripheral layout gate (PLG) proto-lines connecting the gate pad and the data pad; forming a PLG testing pad on the substrate; forming a shorting bar connecting the PLG testing pad to first terminals of the plurality of PLG proto-lines; forming a plurality of testing pins respectively connected to second terminals of the plurality of PLG proto-lines, wherein the plurality of testing pins are formed in a first dummy region of the substrate, the first dummy region is adjacent to an array substrate region of the substrate; and connecting the plurality of testing pins to a probe unit to test connectivity of the plurality of PLG proto-lines.

Abstract: An array substrate and a detection method thereof, and a display panel are disclosed. The array substrate includes a plurality of subpixels and a plurality of signal line structures. The plurality of subpixels are arranged in an array of a plurality of rows and a plurality of columns along a first direction and a second direction. Each signal line structure of the plurality of signal line structures includes at least one first detection line extending along the first direction; adjacent (n)th row and (n+1)th row of subpixels in the array form a subpixel row group, and the signal line structure is configured to be connected to the (n)th row and (n+1)th row of subpixels and detect electrical characteristics of first transistors or light-emitting elements in the subpixels.

Abstract: A display panel may include a substrate (12), a bank layer (14) on the substrate (12), and a thermal insulation layer on the bank layer(14). The bank layer (14) defines a plurality of pixel areas (PA) on the substrate (12). The thermal insulation layer (20) may have a low thermal conductivity of about 0.01W/mk to about 0.5 W/mK. The thermal insulation layer (20) may be a porous thermal insulation layer.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes: a base substrate; a first signal line on the base substrate; a first buffer layer provided on the base substrate and covering the first signal line; a second signal line on a side of the first buffer layer facing away from the base substrate; a first insulating layer provided on the base substrate and covering the second signal line; and a thin film transistor on a side of the first insulating layer facing away from the base substrate, the thin film transistor including a gate electrode, a source electrode and a drain electrode. A thickness of the first signal line is greater than that of the gate electrode, and a thickness of the second signal line is greater than that of the source electrode or the drain electrode.

Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a blanking unit, a first transmission circuit, and a first input-output unit. The blanking unit is configured to charge a pull-up control node in response to a compensation selection control signal and input a blanking pull-up signal to a blanking pull-up node. The first transmission circuit is electrically connected to the blanking pull-up node and the first pull-up node. The first input-output unit includes an output circuit, a first pull-down control circuit, and a first pull-down auxiliary control circuit.

Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output a banking output control signal to a first node in a blanking period of time of a frame; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal to the first node in a display period of time of the frame; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node, wherein the composite output signal includes a display output signal outputted in a display period of time and a blanking output signal outputted in a blanking period of time which are independent of each other.

Abstract: A display panel and a manufacturing method thereof, and a display device are provided. The display panel includes a base substrate and a plurality of pixels. Each pixel includes a plurality of sub-pixels of different colors; each sub-pixel includes a reflection layer, a first color filter layer at a side of the reflection layer away from the base substrate, a first electrode at a side of the first color filter layer away from the base substrate, a light-emitting layer at a side of the first electrode away from the base substrate, and a second electrode at a side of the light-emitting layer away from the base substrate. In each pixel, a color of the first color filter layer of the each sub-pixel is same as a color of the respective sub-pixel; thicknesses of the first color filter layers of the plurality of sub-pixels are different from each other.

Abstract: A display substrate, a manufacturing method thereof and a display apparatus are provided. The display substrate includes: a base substrate; a sealant on the base substrate; and a contact layer between the base substrate and the sealant, the contact layer being in contact with the sealant. In the display substrate, a contact layer surface of the contact layer, which is away from the base substrate, is not flat at a contact position where the contact layer is in contact with the sealant.

Abstract: A shift register includes: an input circuit configured to, under control of an input signal transmitted by an input signal terminal, transmit the input signal to a pull-up node; a first control circuit configured to, under control of a first voltage signal transmitted by a first voltage signal terminal, transmit the first voltage signal to a first pull-down node, and under control of a voltage of the pull-up node, transmit a second voltage signal received at a second voltage signal terminal to the first pull-down node; and an output circuit configured to transmit a clock signal received at a clock signal terminal to a first output signal terminal under the control of the voltage of the pull-up node. The first control circuit is further configured to, receive the input signal, and transmit the second voltage signal to the first pull-down node under the control of the input signal.

Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.

Abstract: A shift register, a gate driving circuit and a driving method for the same, and a liquid crystal display. The shift register includes: a pull-up sub-circuit configured to set a potential at a pull-up node to an operating potential when a first input signal is received via a first input terminal; a first output sub-circuit configured to output a gate driving signal at an output terminal according to a first clock signal received via a first clock signal terminal when the potential at the pull-up node is the operating potential; and a second output sub-circuit configured to output a gate driving signal at the output terminal when a second input signal is received via a second input terminal during a period other than a duration in which one frame of picture is displayed.

Abstract: A display device is provided, including: a display panel; a backlight module; a circuit board, arranged on a side of the backlight module facing away from the display panel; a flexible circuit board, connected to the circuit board and the display panel, where the flexible circuit board includes a bending portion arranged on a side of the backlight module and extending from the display panel to the circuit board; a circuit board protective frame, arranged around the circuit board and the flexible circuit board, where an opening is provided on a first portion of the circuit board protective frame, and the first portion is a portion of the circuit board protective frame facing the bending portion; and a buffer structure, fixed on the circuit board protective frame, arranged parallel to the circuit board protective frame, and covering the opening.

Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a base substrate, a pixel definition layer, a light emitting layer and a spacer. The pixel definition layer is configured to define each of subpixels in the display panel and includes a groove structure which is disposed between adjacent subpixels, the spacer is disposed in the groove structure, the light emitting layer is disposed on a side of the pixel definition layer and the spacer away from the base substrate, and a thermal expansion efficient of the spacer is greater than a thermal expansion efficient of the light emitting layer.

Abstract: An actuator and a manufacture method thereof, an operation method thereof, and a movable device. The actuator includes a photodeformation layer and a first driving unit, the first driving unit includes at least one first light emitting device, the first light emitting device is connected to a first side of the photodeformation layer, the first light emitting device is capable of emitting first light with a first wavelength to irradiate onto the photodeformation layer, and the photodeformation layer can generate a first deformation under irradiation of the first light.

Abstract: A light emitting substrate, a light emitting motherboard, a method for obtaining a light emitting substrate, and a displaying device. The light emitting substrate comprises a substrate and multiple light emitting units, wherein the substrate is provided with a light emitting region and a bind region located on one side of the light emitting region; each light emitting unit comprises a light zone provided with at least one light emitting diode and a drive circuit provided with multiple pins, and the multiple light emitting units are arranged on the substrate in an array; a direction pointing from the light emitting region to the bind region is a first direction; and in the first direction, the drive circuit of at least one light emitting unit in the last row of the light emitting units is connected to an address line.

Abstract: Disclosed herein is a substrate of a display panel, comprising: a support; a first alignment mark on the support; a first dielectric layer covering the first alignment mark; an auxiliary alignment mark aligned with the first alignment mark, wherein the auxiliary alignment mark comprises a recess into the first dielectric layer. Further disclosed herein is a display panel comprising the substrate, and a system comprising the display panel. Also disclosed herein is a method comprising: forming a first alignment mark on a support; forming a first dielectric layer covering the first alignment mark; and forming an auxiliary alignment mark aligned with the first alignment mark; wherein the auxiliary alignment mark comprises a recess into the first dielectric layer.

Abstract: A display substrate includes: a base; a cathode power line disposed on the base and located in the peripheral region; a first insulating layer located on a side of a layer in which the cathode power line is located away from the base and having first via hole(s); a cathode layer located on the first insulating layer and electrically connected to the cathode power line through the first via hole(s); and spacer(s) located on a side of the cathode layer proximate to the base, a spacer covering at least a side wall of a first via hole, a thickness of a portion of the spacer covering the side wall decreasing along the side wall and in a direction pointing from an end of the side wall proximate to the base toward an end of the side wall of the first via hole away from the base.

Abstract: Provided are a thin film transistor and method for manufacturing the same, array substrate, display panel and display device. The thin film transistor includes: a gate pattern, a gate insulating layer, an active layer pattern, a source pattern and a drain pattern sequentially stacked. At least one of a surface of the source pattern facing the gate insulating layer, a surface of the drain pattern facing the gate insulating layer, and a surface of the gate pattern facing the gate insulating layer is a target surface which can diffusely reflect lights entering the target surface, to prevent part of the lights from entering the active layer pattern. The display device solves the problem of volt-ampere characteristic curve of the active layer pattern being deflected and a normal operation of the thin film transistor being affected, thereby weakening the influence of lights on the normal operation of the thin film transistor.

Abstract: Provided is a micro-LED device, comprising: a light emitting unit comprising a light emitting layer having a first end surface, a second end surface opposite to the first end surface, and a lateral surface between the first end surface and the second end surface; a P-type semiconductor layer on the first end surface; and an N-type semiconductor layer on the second end surface; a transparent insulating layer covering at least the lateral surface of the light emitting layer; and a reflecting layer on a side of the transparent insulating layer away from the light emitting unit, wherein the transparent insulating layer insulates the light emitting unit from the reflecting layer, and the reflecting layer covers at least the lateral surface of the light emitting layer.

Abstract: A display device and driving method thereof and a manufacturing method of a display substrate involve an array substrate and manufacturing method thereof. The array substrate includes: a base substrate; and a number of display sub-pixels arranged in a matrix on the base substrate. Each individual display sub-pixel includes: a pixel electrode; a first common electrode; and a second common electrode; wherein the first common electrode and the second common electrode are insulated from each other; and wherein the pixel electrode is configured to interact respectively with the first common electrode and the second common electrode so as to conduct one or more display operations.