Abstract: A shift register, a driving method therefor, a gate driving circuit and a display device. The shift register comprises: an input module, a first reset module, a second reset module, an output module. The input module is configured to write input signal of a signal input terminal STU into second node Q2 through second clock signal terminal CLKB, and to connect Q2 with first node Q1 through STU. The first reset module is configured to write signal of first direct current signal terminal into third node Q3 through STU, and to write reset signal of reset signal terminal STD into Q3 and connect Q2 with Q1 through STD. The second reset module is configured to write a signal of the first direct current signal terminal into a signal output terminal OUT through Q3. The output module is configured to write a first clock signal of CLKA into OUT through Q1.

Abstract: A touch substrate includes a substrate; a plurality of first touch electrodes disposed on the substrate and extending in a first direction; and a plurality of second touch electrodes disposed on the substrate and extending in a second direction intersecting with the first direction. The plurality of second touch electrodes are insulated from the plurality of first touch electrodes. Each first touch electrode and each second touch electrode both include a mesh structure and a plurality of first dummy electrodes; each first dummy electrode includes at least two line segments; the at least two line segments intersect with each other and have no closed region therebetween.

Abstract: Disclosed are a driving backplane and a display apparatus, including: a base substrate, a first conducting layer disposed on one side of the base substrate, a second conducting layer disposed on one side, facing away from the base substrate, of the first conducting layer, and a first insulating layer disposed between the first conducting layer and the second conducting layer, where the second conducting layer includes a plurality of pads, and each pad is connected with the first conducting layer through at least two first via holes.

Abstract: An array substrate, a manufacturing method thereof, and a display panel are provided. The array substrate comprises a base substrate, a plurality of gate lines and gate electrodes on the base substrate, each gate electrode being corresponding to and separate from a respective gate line, a gate insulating layer over the gate electrode and the gate line, the gate insulating layer having a first via hole and a second via hole, the first via hole exposing the gate electrode, the second via hole exposing the gate line, a conductive connection layer and a polysilicon semiconductor layer on the gate insulating layer, the conductive connection layer filling the first via hole and the second via hole to connect the gate line with the gate electrode.

Abstract: A touch panel and a method of manufacturing the same, an electronic device are provided. The touch panel includes a bending area bent along a bending axis. It further includes: a plurality of first touch electrodes extending along a first direction; a plurality of second touch electrodes extending along a second direction; and a metal mesh pattern at least provided in the bending area. The metal mesh pattern includes a first metal mesh line extending along the first direction and connected with the first touch electrode in parallel. The second direction intersects with the first direction.

Abstract: Disclosed are an array substrate, a method for fabricating the same, a display panel, and a display device, and the array substrate includes: an underlying substrate, and gate lines and data lines located on the underlying substrate, and intersecting with each other, a layer where the gate lines are located is between a layer where the data lines are located, and the underlying substrate; and the array substrate further includes a buffer layer located between the underlying substrate and the layer where the gate lines are located; and the buffer layer includes a plurality of through-holes, where orthographical projections of the through-holes onto the underlying substrate cover orthographical projections of the areas where the gate lines intersect with the data lines, onto the underlying substrate.

Abstract: The present disclosure provides a positive photoresist composition including a major adhesive material and a photosensitizer, wherein the photoresist composition further includes a photoisomerizable compound which would be converted into an ionic structure with an increased degree of molecular polarity after ultraviolet irradiation. The formation of the ionic structure with increased polarity of the molecule reduces the adhesion between the positive photoresist and the organic film layer, facilitates stripping after formation of the via, and improves the product rate of pass. Further, the present disclosure provides a via-forming method using the positive resist composition, a display substrate including the via formed by the via-forming method, and a display device including the display substrate.

Abstract: An image processing method, an image processing circuit and a display apparatus are provided. The image processing method includes: converting an RGB gray-scale value of each pixel in a current image frame into an RGB luminance value; converting the RGB luminance value into a first RGBW luminance value; determining a luminance level of the current image frame according to the first RGBW luminance value corresponding to each pixel; determining a luminance gain value of the current image frame according to the luminance level of the current image frame; calculating a second RGBW luminance value according to the luminance gain value and the first RGBW luminance value; and converting the second RGBW luminance value into an RGBW gray-scale value.

Abstract: The present application discloses a shift-register unit circuit including a first input sub-circuit configured to receive a display-input signal from a display-input terminal and input a display output-control signal to a first node based on the display-input signal during a display period of one cycle of displaying one frame of image. The shift-register unit circuit also includes a second input sub-circuit configured to receive a blank-input signal for charging a blank-control node, and configured to input a blank-output-control signal to the first node based on the blank-input signal during a blank period of the one cycle. The shift-register unit circuit further includes an output sub-circuit configured to output a hybrid signal controlled by the first node. The second input sub-circuit is also configured, before an end of the blank period, to receive a first blank-reset signal to reset the blank-control node.

Abstract: The present disclosure relates to a display substrate, a method for driving the same, and a display panel. The display substrate includes a base substrate as well as gate lines, data lines and a gate driver on the base substrate, the gate line being connected to the gate driver, and electrostatic rings and control components corresponding to at least one gate line are further disposed on the base substrate, each of the gate lines being connected to the electrostatic ring by a corresponding control component. The electrostatic ring is configured to load a control voltage to turn on the corresponding control component after the display panel is turned off, and the corresponding control component is configured to be turned on to change a voltage on the gate line into a turn-on voltage after the display panel is turned off.

Abstract: Disclosed is a shift register, a gate driving circuit, a display apparatus and a driving method, the shift register including a first input sub-circuit, configured to receive a first input signal from a first input terminal and output an output blanking output control signal; a second input sub-circuit, configured to receive a second input signal from a second input terminal and output a display output control signal; a selection sub-circuit, having a first terminal connected to the second input sub-circuit, a second terminal connected to the first input sub-circuit, and a third terminal connected to a first node, configured to control a potential of the first node according to the display output control signal and the blanking output control signal; an output sub-circuit, configured to output a composite output signal via an output terminal under control of a first node.

Abstract: A touch substrate, a manufacturing method thereof, and a display device. The touch substrate includes: a basal substrate; a first touch electrode, a black matrix, and a second touch electrode located on a first surface of the basal substrate; an orthographic projection of the first touch electrode on the basal substrate and an orthographic projection of the second touch electrode on the basal substrate at least partially overlap with each other; the first touch electrode and the second touch electrode are insulated from each other; in an overlapping area of the first touch electrode and the second touch electrode, the black matrix is located between the first touch electrode and the second touch electrode.

Abstract: A touch control device is provided and includes a base substrate and a metal pattern on the base substrate. The metal pattern includes a first metal pattern and a second metal pattern. The first metal pattern and the second metal pattern are in different layers. The first metal pattern includes a first touch control electrode and a first virtual graphic that is insulated from the first touch control electrode. The second metal pattern includes a second touch control electrode and a second virtual graphic that is insulated from the second touch control electrode. An orthographic projection of the metal pattern to the base substrate is a regular grid.

Abstract: The present disclosure relates to an OLED display substrate including a base substrate, a thin film transistor array layer and a planarization layer on the base substrate, and an anode, a pixel definition layer, a cathode, and a light emitting layer on a side of the planarization layer away from the base substrate, the pixel definition layer defining pixel regions, the light emitting layer being located on a side of the pixel definition layer away from the base substrate. The display substrate further includes a light guide that is in contact with the light emitting layer and is used to lead out light from the light emitting layer, so as to test the led-out light and adjust light emission.

Abstract: There is provided a digital voltage regulator, which includes a first comparator, a circuit switching circuit, a voltage regulation control circuit, a first transistor array and a second transistor array; a width-to-length ratio of any one of transistors in the first transistor array is larger than that of any one of transistors in the second transistor array; the first comparator outputs a comparison result between a first reference voltage and an output voltage; the voltage regulation control circuit generates a voltage regulating signal according to the comparison result under control of a clock signal; the circuit switching circuit controls one of the first transistor array and the second transistor array according to a comparison result between the output voltage and a second reference voltage and a comparison result between the output voltage and a third reference voltage to regulate the output voltage based on the voltage regulating signal.

Abstract: The present application discloses a shift-register circuit including a shift-register unit and a shutdown-discharge sub-circuit. The shift-register unit is coupled to a clock port, a first reference voltage port, a second reference voltage port, and an output port and configured to set a voltage level at a pull-up node to control a clock signal from the clock port being outputted to the output port to drive a display panel during a display period. The shutdown discharge sub-circuit is configured to at least simultaneously receive at least one shutdown signal at a first voltage level from a shutdown-discharge control port and a second signal at the first voltage level from the second reference voltage port to start a shutdown period to discharge at least one of the pull-up node and the output port.

Abstract: The present disclosure relates to a counter substrate and display panel. The counter substrate includes a base substrate, PS pattern layer and alignment film. A surface of the PS pattern layer away from the base substrate is a support surface, and the PS pattern layer includes: main PSs in a display area and a peripheral barrier wall in a non-display area. The peripheral barrier wall has an elongated-strip shape and has a same length direction as a corresponding display area side, the support surface of the peripheral barrier wall is closer to the base substrate than that of the main PS, and a distance between the support surfaces of the peripheral barrier wall and main PS in a thickness direction is a first distance. A ratio between a width of the support surface of the peripheral barrier wall and the first distance is less than 100.

Abstract: Embodiments of the present disclosure provide a touch substrate and a touch display device. In the touch substrate, the first touch control electrodes are provided with the shadow elimination structures at the first intersections, and the orthographic projections of the shadow elimination structures on the base substrate cover the orthographic projections of the connection through holes on the base substrate, so that shadows of the connection through holes can be shielded by the shadow elimination structures, when the user watches the touch substrate from the side, away from the signal line layer, of the base substrate, and thus the ghosting shadow problem of the connection through holes can be resolved.

Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a base substrate, a pixel definition layer, a light emitting layer and a spacer. The pixel definition layer is configured to define each of subpixels in the display panel and includes a groove structure which is disposed between adjacent subpixels, the spacer is disposed in the groove structure, the light emitting layer is disposed on a side of the pixel definition layer and the spacer away from the base substrate, and a thermal expansion efficient of the spacer is greater than a thermal expansion efficient of the light emitting layer.

Abstract: A capacitor, an array substrate and a method for manufacturing the same, and a display panel are provided. The capacitor includes a main body including a first pole plate and a second pole plate disposed opposite to each other, and the capacitor further includes at least one auxiliary body. Any one of the at least one auxiliary body includes a third pole plate and a fourth pole plate disposed opposite to each other, and neither the third pole plate nor the fourth pole plate extends in a plane where the first pole plate is located or a plane where the second pole plate is located. The main body is connected in parallel with the at least one auxiliary body. The array substrate includes a transistor and the capacitor provided by the present disclosure, and the transistor is electrically connected to the capacitor.