Patents Assigned to Hitachi., Ltd. and
  • Patent number: 7340613
    Abstract: In a digital information recording/reproducing apparatus, information recorded on a hard disk with copy restriction thereof is protected from being copied onto other hard disks by means of a PC, etc., to be produced a large number of illegal copies, i.e., infringing a copyright. The information is recorded onto a hard disk drive through encryption thereof, with using an identification being number unique thereto, when it is recorded onto the hard disk. With this, normal reproduction is prevented, since the drive identification number necessary for decryption is different from, even if it is copied onto the other hard disk. Also, a version information of the hard disc is memorized in an information management circuit. When the information is illegally copied onto the other hard disc, the version information is changes; therefore it does not coincide with the version information memorized in the information management circuit.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroo Okamoto, Manabu Sasamoto, Atsushi Yoshioka
  • Patent number: 7340055
    Abstract: A memory card (110) conducts an authentication process with a server based on data stored in an authentication data hold unit (1400). The memory card (110) extracts a first session key (Ks1) from a server by a decryption process and a transaction ID from the data applied on a data bus (BS3). The memory card (110) generates a second session key (Ks2) through a session key generation unit (1418), and transmits to the server, as the keys to encrypt content data in receiving decryption of content data, the second session key (Ks2) and a key (KPm(1)) unique to the memory card (110) in an encrypted state with the first session key (Ks1). The transaction ID and the second session key (Ks2) stored in the log memory (1460) are used in the redistribution process.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: March 4, 2008
    Assignees: Sanyo Electric Co., Ltd., Fujitsu Limited, Hitachi, Ltd.
    Inventors: Yoshihiro Hori, Toshiaki Hioki, Miwa Kanamori, Takatoshi Yoshikawa, Hiroshi Takemura, Masataka Takahashi, Takayuki Hasebe, Shigeki Furuta, Takahisa Hatakeyama, Tadaaki Tonegawa, Takeaki Anazawa
  • Patent number: 7340111
    Abstract: Image evaluation method capable of objectively evaluating the image resolution of a microscope image. An image resolution method is characterized in that resolution in partial regions of an image is obtained over an entire area of the image or a portion of the image, averaging is performed over the entire area of the image or the portion of the image, and the averaged value is established as the resolution evaluation value of the entire area of the image or the portion of the image. This method eliminates the subjective impressions of the evaluator from evaluation of microscope image resolution, so image resolution evaluation values of high accuracy and good repeatability can be obtained.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Tohru Ishitani, Mitsugu Sato, Hideo Todokoro, Tadashi Otaka, Takashi Iizumi, Atsushi Takane
  • Patent number: 7340552
    Abstract: In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source module determines the response data returned as a response to the initiated access.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Nobukazu Kondo, Seiji Kaneko, Koichi Okazawa, Hideaki Gemma, Tetsuya Mochida, Takehisa Hayashi
  • Patent number: 7338725
    Abstract: An inplane magnetic recording medium having high S/N and thermal stability and a reliable magnetic storage device having surface recording density of 50 megabit/mm2 or more is described. The magnetic recording medium includes magnetic layers formed on a nonmagnetic substrate with a plurality of ground layers therebetween, at least one of the ground layers formed from an alloy of a body-centered cubic structure containing Cr as a main component and B of from 2 atomic % to 12 atomic %. Main components of the magnetic layers include a lower magnetic layer containing Co and Cr of from 10 atomic % to 16 atomic %, with film thickness of from 1.5 nm to 4.5 nm, and an upper magnetic layer containing Co, coupling anti-ferromagnetically with the lower magnetic layer through nonmagnetic intermediate layers.
    Type: Grant
    Filed: March 3, 2005
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuya Kanbe, Yotsuo Yahisa, Hiroyuki Suzuki, Hidekazu Kashiwase
  • Patent number: 7340610
    Abstract: Data stored in a data storage system is hashed to generate a hash value. The hash value and a request for a time stamp are then sent to a time stamping authority. A time stamp token and/or a time stamp certificate is received from the time stamping authority. The time stamp token includes a time stamp and the hash value, and may be encrypted using a private key of the time stamping authority. The time stamp token and/or time stamp certificate is then stored with, for example, a reference to the data being stored in the data storage system. The time stamp token and/or time stamp certificate may then be used to validate the data being stored and the time stamp.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventor: Yuichi Yagawa
  • Patent number: 7340516
    Abstract: When investigating a failure occurring in a transaction between information processing apparatuses, it is possible to reduce the time required for the failure investigation. A first local ID for identifying a transaction processing of first information processing apparatus is related with a standard ID for relating transaction processing of the first and the second information processing apparatuses with each other the related IDs and are stored in a first mapping table. The standard ID and a transaction processing request are transmitted to the second information processing apparatus to request execution of a transaction processing therefor. If a failure occurs in the requested transaction processing, a standard ID of the transaction processing concerned is specified to inquire a second local ID for identifying the transaction processing. Mapping information for relating the first local ID corresponding to the specified standard ID with the transmitted second local ID is generated.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Eri Ikenaga, Masahiro Tsumura, Kouichi Ookura
  • Patent number: 7340636
    Abstract: To provide a technique whereby a value of an error recovery level determined in negotiation processing between an initiator and a target can be set to a suitable value that is intended by a manager. A storage system comprises a storage section containing a target module that is connected to an initiator device; and a management section that manages the storage section. The target module carries out negotiation processing with the initiator device so as to determine a value of a first error recovery level. The first error recovery level is determined as the smaller of a value of a second error recovery level of the initiator device and a value of a third error recovery level of the target module. The management section carries out setting processing for allocating the initiator device that is to be connected to the target module to the target module, according to an instruction from a manager. In the setting processing, the value of third error recovery level is notified to the manager.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Toshihiko Murakami, Naoko Iwami
  • Patent number: 7340078
    Abstract: Disclosed here is an information processing system capable of recognizing actions and circumstances of a user with respect to both space and time as a “situation” to recognize the user's request using a plurality of sensing nodes that work cooperatively with each another, thereby responding autonomously to the user's request according to the recognition results. The plurality of sensing nodes and a responding device are disposed in a target space to build up a network for recognizing the situation in the target space. And, a plurality of recognition means are used to recognize the situation with respect to both space and time related to the existence of the user. And, an integral processing portion (master) is selected from among the plurality of sensing nodes, thereby dispersing the system load. If there are a plurality of users, the system can make recognition in accordance with the request of each of those users.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroaki Shikano, Naohiko Irie
  • Patent number: 7339931
    Abstract: A packet transfer apparatus connected to an internal subnetwork formed by a set of broadcast segments each accommodating terminals and for transferring, when a MAC frame including a IP address which designates a destination terminal connected to one of the segments is received from a terminal connected to another segment in the internal subnetwork, an IP packet in the MAC frame to the segment connected to the destination terminal in accordance with a terminal management table which indicates a relation of address information of each of the terminals belonging to the internal subnetwork and the segment to which the terminal is connected.
    Type: Grant
    Filed: February 3, 2003
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Masatoshi Takihiro, Tetsuro Yoshimoto, Eri Kawai
  • Patent number: 7339411
    Abstract: A processor or a semiconductor integrated circuit has circuit blocks performing signal processing, internal power supply nets, noise detecting circuits corresponding to each circuit block that detect noise on the power supply nets and an interruption handling circuit that prevents a malfunction in processing within a circuit block caused by noise on the power supply nets. When noise is detected, the interruption handling circuit performs an interruption by sending an interruption signal to the circuit block relating to the signal processing for preventing a malfunction to the circuit block. During the operation of a plurality of stages for executing an instruction, noise is monitored at every stage. If no noise is detected through a final stage, the result is outputted. If noise is detected at any one of the stages, then an interruption process is performed.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Fumio Yuuki, Katsuya Tanaka, Takeshi Kato, Teruhisa Shimizu
  • Patent number: 7337525
    Abstract: An electric rotating machine has a rotor having N and S poles and includes a stator with an annular stator core and slots. Multiple-phase stator windings are embedded in the slots, and are formed by winding continuous wires such that straight parts of the stator windings pressed in a flat shape are wound in rings around a grooved cylindrical member. The cylindrical member is inserted into a bore defined by the annular stator core so that the grooves of the cylindrical member are arranged opposite to the slots. The sets of the windings are folded back alternately outside the slots of the stator core and are wound so the sets of the windings are embedded alternately in the direction of the depth of the slots. Leading and trailing ends of the continuous wires are superposed after being wound at least one turn around the circumferentially arranged slots of the stator.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Ueda, Yoshimi Mori, Masaki Okamura, Sakae Ishida, Toshinori Watanabe
  • Patent number: 7340160
    Abstract: Disclosed is an imaging apparatus capable of realizing a camera shake correction function while reducing the size and power consumption of the apparatus without deteriorating the use efficiency of an image sensor thereof. An imaging device has photoelectric conversion elements arranged two-dimensionally and a transfer path for transferring electric charge converted by the photoelectric conversion element. A motion detection unit detects motion of the apparatus according to timing pulses generated by a time management circuit at shorter intervals than exposure time. A drive circuit transfers the electric charge previously read onto the transfer path for a predetermined distance according to the detected motion. Electric charge newly read out and converted by the photoelectric conversion elements at the intervals of the timing pulses is added to the previous electric charge which has been transferred on transfer path.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Junji Kamimura, Ryuji Nishimura, Toshirou Kinugasa
  • Patent number: 7339875
    Abstract: An information storage medium includes a substrate forming a first groove having a depth, and a second groove adjacent to the first groove and different depth from the first groove; and a recording layer formed on the substrate to record information marks, making optical characteristics of the information marks different for each such that diffracted lights from the plurality of marks orthogonally intersect one another.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventor: Takeshi Maeda
  • Patent number: 7339489
    Abstract: A sensor transmits and receives wireless signals at intervals. A sensor unit, a processor 130, a wireless transmitter circuit, and a wireless receiver circuit are activated in sequence only for a fixed time when the electric power generated by a generator circuit and charged in a capacitor reaches a preset level. Sensing information detected by the sensor unit is processed by the processor circuit and, information on the number of receivable bytes is added to the processing results in the wireless receiver circuit. This added information is sent as sensor information to the wireless host from the wireless transmitting circuit, and the wireless receiver circuit that activated after the wireless transmitter circuit was activated, receives a control information signal from the wireless host. This received information is processed in the processor circuit.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Hiroshi Arita, Masaru Kokubo, Kenichi Mizugaki
  • Patent number: 7339564
    Abstract: An object of the invention is to repair a drain signal line easily. Each region enclosed by two gate signal lines adjacent to each other and two drain signal lines adjacent to each other that are formed on the liquid-crystal-side surface of one of transparent substrates that are opposed to each other with a liquid crystal interposed in between is made a pixel region. Each pixel region is provided with a switching element that is driven being supplied with a scanning signal from one of the two gate signal lines and a pixel electrode that is supplied, via the switching element, with a video signal from one of the two drain signal lines. A repair conductive layer is formed so as to be contained in each drain signal line when viewed perpendicularly with an insulating film interposed in between.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Yuuichi Hashimoto, Tsutomu Kasai
  • Patent number: 7340754
    Abstract: In an optical disk drive device, in order to reduce structural vibration noise and aerodynamic sound during high-speed revolution, a recess is formed at the deeper end. This recess is in a position axially symmetric to a hole for the movement of an optical head with respect to the axis of a spindle motor, and its size is substantially equal to that of the movement hole. This recess serves to suppress the vibration mode of a disk tray and the air flow between the disk and the disk tray. Noise is reduced even when the disk is turning at high speed.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: March 4, 2008
    Assignees: Hitachi, Ltd., Hitachi-LG Storage, Inc.
    Inventors: Yoshiaki Yamauchi, Hideyuki Onuma, Makoto Ibe, Shinya Tsubota, Kuniyuki Kimura
  • Patent number: 7340153
    Abstract: When recording operation is stopped due to, for example, unexpected interruption of electric power supply in the course of the recording operation on a real time basis, a technique of repairing a moving picture and sound data recorded on a recording medium until the recording is stopped, to thereby restore management information data which enables random access and special reproduction is provided. A video/audio/management information multiplexing means is so implemented as to generate data required for generating management information data for allowing random access to the recording medium and effectuating special reproduction of the recording medium, for thereby multiplexing the data required for generating the management information data, encoded video data outputted from a video encoding means and encoded audio data outputted from an audio encoding means.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Yukio Isobe, Susumu Yoshida, Tsutomu Imai, Toshihiro Kato
  • Patent number: 7339895
    Abstract: A non-IP device holds an interface ID defined by Ipv6. A gateway generates and holds an Ipv6 address for the non-IP device. The gateway serves to convert the protocol of a packet destined to the non-IP device from a portable telephone or a personal computer coupled to an internet into the protocol for a network connected to the non-IP device and transmit the packet to the non-IP device.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: March 4, 2008
    Assignee: Hitachi, Ltd.
    Inventors: Tomochika Ozaki, Tadashi Kuwabara, Isao Nakagawa, Hiromichi Ito
  • Patent number: RE40130
    Abstract: Herein disclosed are a liquid crystal display device and a data processing device, which can have their frame portions reduced in area to reduce the size and weight by extracting the terminals of video signals to only one side of a liquid crystal display panel and by arranging a video signal line driving circuit substrate to be connected with the terminals, only at one side of the display panel.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: March 4, 2008
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Kaoru Hasegawa, Yoshio Toriyama, Naoto Kobayashi, Katsuhiko Yarita, Hironori Kondo, Masahiko Suzuki, Yoshihiro Imajo