Abstract: There was previously no monitoring method and monitoring apparatus which could measure dioxins at ppt levels and dioxin precursors at ppb levels with high sensitivity.

Abstract: A personal identification system, which uses a vein pattern of a finger, optimizes the amount of light of a light source based on a captured finger image and emphasizes the vein pattern during image processing for identification.

Abstract: An insurance agency system 1100 notifies a payment intermediary system 1200 of a payment intention. When the payment intermediary system 1200 receives a payment intention notification, it notifies a beneficiary system 1300 of the payment intention. When the beneficiary system 1300 receives the payment intention notification, it notifies the payment intermediary system 1200 of a deposit account. If the payment intermediary system 1200 receives the deposit account notification before the payment due date or during a payment period specified by the payer, the amount specified by the payer is deposited in the deposit account.

Abstract: The semiconductor wafer is made thin without any cracks and warp under good workability. The semiconductor wafer thinning process includes the first step of preparing a carrier 1 formed of a base 1a and a suction pad 1b provided on one surface of the base 1a or formed of a base film with an adhesive, the second step of bonding a semiconductor wafer to the carrier 1 in such a manner that a rear surface of the semiconductor wafer 2 with no circuit elements formed therein is opposite to the carrier to form a wafer composite 10, and the third step of holding the carrier of the wafer composite 10 with its semiconductor wafer 2 side up and spin-coating an etchant on the rear surface of the semiconductor wafer 2 thereby to make the semiconductor wafer 2 thin.

Abstract: A method, system, and library for generating high-speed logic circuits with reduced path depths even in cases when a critical path diverges into a plurality of paths that eventually converge. By replacing the gates of a logic circuit by selectors with two inputs and one output, a selector-based circuit is generated where a local circuit between the path divergence node and convergence node is detected. The stages of the critical path are reduced by replacing the local circuit by a logically equivalent selector with two inputs and one output; wherein one input of the selector is controlled by a circuit formed by inputting a logical value of “0” to the divergence node from which the local circuit is developed and a second input of the selector is controlled by a circuit formed by inputting a logical value of “1” to the divergence node.

Abstract: Described is a manufacturing method of a semiconductor integrated circuit device by depositing a silicon nitride film to give a uniform thickness over the main surface of a semiconductor wafer having a high pattern density region and a low pattern density region. This is attained by, upon depositing a silicon nitride film over a substrate having a high gate-electrode-pattern density region and a low gate-electrode-pattern density region by using a single-wafer cold-wall thermal CVD reactor, setting a flow rate ratio of ammonia (NH3) to monosilane (SiH4) greater than that upon deposition of a silicon nitride film over a flat substrate.

Abstract: The invention includes a control register (CRG) for providing instructions as to basic operations such as writing, erasing, reading, etc., a boosted voltage attainment detecting circuit for detecting whether a voltage boosted by a booster circuit has reached a desired level, a circuit which counts the time required to apply each of write and erase voltages, and a circuit which detects the completion of the writing or erasing. Respective operations are automatically advanced by simple setting of the operation instructions to the control register. After the completion of the operations, an end flag (FLAG) provided within the control register is set to notify the completion of the writing or erasing.

Abstract: The object of the present invention is to provide an amino acid frame indication system, a method for amino acid frame indication and a recording medium, which can effectively extract a highly reliable amino acid sequence from a cDNA sequence, even in a case where there exists a frame shift error in the cDNA sequence.

Abstract: A packet switch comprising a plurality of line interfaces each connected to a pair of input and output ATM lines, and a routing unit for transferring packets received from each of said line interfaces to one of the other line interfaces specified by the header information of the packets, wherein each of the line interfaces is configured to convert a group of ATM cells received from the input ATM line selectively into either a first type of packet in which ATM cell headers are excluded or a second type of packet in which ATM cell headers are remained, whereby management cells received from the input ATM line are relayed to said one of the other line interface by inserting said management cell into said second type of packet together with user cells on the same connection.

Abstract: In order to provide an anticorrosive technique for metal wirings formed by a chemical mechanical polishing (CMP) method, a process for manufacturing a semiconductor integrated circuit device according to the invention comprises the steps of: forming a metal layer of Cu (or a Cu alloy containing Cu as a main component) over the major face of a wafer and then planarizing the metal layer by a chemical mechanical polishing (CMP) method to form metal wirings; anticorroding the planarized major face of the wafer to form a hydrophobic protective film over the surfaces of the metal wirings; immersing the anticorroded major face of the wafer or keeping the same in a wet state so that it may not become dry; and post-cleaning the major face, kept in the wet state, of the wafer.

Abstract: A semiconductor memory device and a method of fabricating the same are provided, in which an interlayer film which only covers a peripheral circuit region except a memory cell array is formed above the peripheral circuit region to reduce a topological difference between both regions after bitlines are formed; therefore, a semiconductor substrate which has a plain surface as a main one can be used as a starting body with no preliminary processing thereon and a shallow trench isolation technique can also be applied. Besides, interconnects to the peripheral circuit can be led up to the surface of the device through a multi-step plug connection and thereby processing of large aspect-ratio holes, the filling up of the holes with metal and the like are unnecessary and, as a result, reliability of the process is improved.

Abstract: A cellular mobile telephone apparatus including a main body, and an alarm device which is provided separately from the main body, the main body including: receiving/transmitting unit for receiving and transmitting radio frequency signals between a base station; modulating/demodulating unit for modulating and demodulating between the radio frequency signals, and a conversation signal and a control signal; telephone receiver unit for reproducing audible conversation voice in response to the demodulated conversation signal from the modulating/demodulating unit; telephone transmitting unit for converting conversation voice into the conversation signal; a controller for controlling operation of the main body of the cellular mobile telephone apparatus in accordance with the control signal; and an alarm device for providing an alarm signal which includes an identification information and is transmitted through the radio frequency, when a call is terminated at the main body; and the alarm device including: receivi

Abstract: An insulating member (4) of an amorphous structure partially opened to expose a substrate (1; 1, 2, 3) is formed on the substrate. At least a compound semiconductor (5, 51, 52) containing at least nitrogen as a constituent element is deposited on the insulating member (4) and the substrate (40) exposed by the opening thereby to form a semiconductor material (1, 5, 51, 52). A semiconductor material (6, 7) configured of the first semiconductor material or configured of the first semiconductor material and another semiconductor material grown on the first semiconductor material is processed thereby to form a semiconductor device.

Abstract: A cathode ray tube includes a phosphor screen, an electron gun having a plurality of electrodes, a deflection device, and a plurality of magnetic pieces being disposed on opposite sides in a direction of scanning line of an electron beam of a trajectory of and undetected electron beam in a magnetic deflection field generated by the deflection device. The plurality of magnetic pieces have a portion extending in a direction of an axis of the cathode ray tube on each of the opposite sides. The portion includes a pair of parts disposed above and below a plane containing the axis and the scanning line and having a first axial length greater than a second axial length of the portion as measured in the plane.

Abstract: In a switching power source comprising a triangular wave generating circuit and an error amplifier and a PWM comparator, in normal time PWM pulses being obtained by comparing an output amplitude of triangular wave of the triangular wave generating circuit with an output voltage of the error amplifier as a reference voltage using the PWM comparator, the soft-start circuit of the switching power source comprises a soft-start reference value setting part composed of a group of resistance networks and a group of switches using the same structure as an upper-and-lower limit setting part, composed of networks and switches, for setting an upper and a lower limits of the amplitude of triangular wave of the triangular generating circuit; and a counting circuit for counting cycles of the triangular wave of the triangular wave generating circuit to obtain a plurality of arbitrary soft-start timings in order to switch the group of switches.

Abstract: A graphic processing apparatus for generating, displaying or printing characters and graphic data. A successive column access is used in which a row address is designated for access to a memory and data in different column addresses within the designated same row address are successively accessed and buffer means for buffering a series of data between an access by a processor and an access to a memory is provided. A program and image information for display are stored in a main memory. A frame buffer and the main memory are integrally configured simply and small in size.

Abstract: A method for inspecting a pattern formed on a substrate, includes the steps of moving a table along a first direction on which a substrate to be inspected is mounted, irradiating a converged electron beam on the substrate by scanning the converged electron beam along a second direction which is perpendicular to the first direction; detecting an electron radiated from the substrate by the irradiation of the converged electron beam in which the movement of the table and the scanning of the converged electron beam are synchronized; forming a digital image of the substrate from the detected electron; improving a quality of the digital image by filtering the digital image; and detecting a defect of a pattern formed on the substrate by using the improved quality digital image.

Abstract: A liquid crystal display device includes transparent pixel electrodes disposed at intersections of scanning signal lines and data lines, and a plurality of thin film transistors each of which is provided correspondingly to one of the pixel electrodes. Each of the transistors includes an output electrode connected to one of the pixel electrodes, a control electrode connected to one of the scanning signal lines, and an input electrode connected to one of the data lines. A first insulating film covers the scanning signal lines, and a semiconductor layer is interposed between the first insulating film and a portion of the data lines.

Abstract: A clock-generating circuit for forming internal clock signals by comparing a signal obtained by delaying, through a variable delay circuit, an input clock signal input through an external terminal with the input clock signal through a phase comparator circuit, and so controlling the delay time of the variable delay circuit that they are brought into agreement with each other, wherein the clock-generating circuit and an internal circuit to be operated by the clock signals formed thereby are formed on a common semiconductor substrate, and an element-forming region in which the clock-generating circuit is formed is electrically isolated from an element-forming region in which the digital circuit is constituted on the semiconductor substrate relying upon the element-isolation technology. The power-source passages, too, are formed independently of other digital circuits.

Abstract: The output power line 4 of the power converter 2 and the common mode current circulation line 7 are wound together on a magnetic core to form the GP coil 3, each end of the common mode current circulation line 7 is connected to the grounding line 8 of the power supply of the power converter and to the grounding line 6 of the load, and the common mode current is circulated into the power converter 2 via the common mode current circulation line 7. By means of this simple constitution, wherein the impedance in the grounding circuit loop becomes higher than that in the common mode current circulation line loop due to the function of the GP coil and consequently most of the common mode current is led into the circulation loop comprising of the common mode current circulation line, high-frequency noise interference caused by the common mode current is suppressed as a result of the canceling effect of the power line.