Patents Assigned to Hitachi, Ltd.
-
Patent number: 6385681Abstract: A disk array control device which includes a plurality of channel interface (IF) units, a plurality of disk IF units, a cache memory unit, and a shared memory unit. The connection system between the plurality of channel IF units and plurality of disk IF units and the cache memory unit is different from the connection system between the plurality of channel IF units and plurality of disk IF units and the shared memory unit. In the invention the plurality of channel IF units and the plurality of disk IF units are connected via a selector to the cache memory unit, whereas the plurality of channel IF units and the plurality of disk IF units are directly connected to the shared memory unit with no selectors.Type: GrantFiled: July 21, 1999Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Kazuhisa Fujimoto, Atsushi Tanaka, Akira Fujibayashi, Hiroki Kanai, Nobuyuki Minowa
-
Patent number: 6385025Abstract: A semiconductor apparatus such as a power MOSFET, an IGBT, or the like is provided having therein a control circuit such as an over-heating protection circuit and an over-current protection circuit, which realizes both of high-speed operation and prevention of erroneous operation caused by a parasitic device. To prevent erroneous operation, the control circuit controls so that when the voltage of a gate terminal is positive relative to that of a source terminal, a first switch circuit is turned on, when the voltage of the gate terminal is negative relative to that of the source terminal, a second switch circuit is turned on, and when the gate terminal and the source terminal have an almost same potential and a drain terminal has a high potential, the second switch circuit is turned on, thereby reducing leakage current from the drain terminal to the gate terminal.Type: GrantFiled: March 5, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Kozo Sakamoto, Isao Yoshida
-
Patent number: 6385339Abstract: The present invention relates to a multi-user pattern data processing system configured for various kinds of patterns, such as characters, to learn efficiently and effectively. The present invention comprises an input arrangement 1 having patterns entered therein from a plurality of users, a dictionary 2 having patterns and attributes of the patterns belonging thereto defined therein, a recognizing arrangement 4 that receives the entered pattern and a group attribute and retrieves from among the patterns entered in the dictionary and having a corresponding group attribute to feed out the category, and a dictionary editing arrangement 5 for extracting a pattern used in common by a group before editing the pattern, such as entering it in the common dictionary, with the group having the user made to belong thereto. The invention allows the dictionary used to the pattern recognition to learn very efficiently and effectively.Type: GrantFiled: June 30, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Toshimi Yokota, Hiroshi Shojima, Soshiro Kuzunuki, Toshifumi Arai, Masaki Miura, Keiko Gunji, Yasushi Fukunaga
-
Patent number: 6382505Abstract: A processor 29 automatically sets a direction of transferring electronic money information depending on the existence of IC cards 1a, 1b connected to IC card connecting portions 11a, 11b, and the existence of an external device connected to an external device connecting terminal 8, thus making instructing operations for transferring electronic money information easier.Type: GrantFiled: July 12, 2000Date of Patent: May 7, 2002Assignees: Hitachi, Ltd., Hitachi Video & Information System, Inc.Inventors: Yutaka Takami, Kenji Matsumoto, Shigeyuki Itoh, Masayuki Inoue
-
Patent number: 6384686Abstract: To reduce power consumption by increasing amplifying efficiency in a low power mode, there is provided a radio communication apparatus in which each of field effect transistors of a radio frequency power module in a multi-stage configuration is controlled by an APC circuit based on a power level instruction signal, and in which a correction circuit is incorporated between the gate of a final stage transistor and the APC circuit to apply a linear gate voltage to the final stage transistor when a High level signal based on the power level instruction signal is applied and to provide a maximum gate voltage of the final stage transistor which is equal to or lower than the gate voltages of other transistors and whose rate of increase relative to the output voltage of the APC circuit gradually reduces when a Low level signal based on the power instruction signal is applied.Type: GrantFiled: June 15, 2001Date of Patent: May 7, 2002Assignees: Hitachi, Ltd., Hitachi Ulsi Systems Co., Ltd., Hitachi Tohbu Semiconductor, Ltd.Inventors: Hirotaka Ueno, Yasuhiro Nunogawa, Tetsuaki Adachi
-
Patent number: 6384411Abstract: An ion source includes a gas supplier which supplies a gas through a gas inlet into a gas passage defined in a body to form a gas flow through the gas passage along a capillary inserted into the body and through an orifice defined in the body past a tip of the capillary so that the gas flow sprays a sample solution from the tip of the capillary. The gas supplier regulates a pressure of the gas in the gas passage to adjust a characteristic value F/S to a predetermined value, where F is a flow rate of the gas flow at standard conditions (20° C., 1 atmosphere), and S is a difference between a cross section of the orifice and a cross section of a tip portion of the capillary in the orifice.Type: GrantFiled: July 27, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Atsumu Hirabayashi, Minoru Sakairi, Yasuaki Takada, Hideaki Koizumi, Kaoru Umemura
-
Patent number: 6385085Abstract: In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.Type: GrantFiled: April 10, 2001Date of Patent: May 7, 2002Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp., Hitachi Device Engineering Co., Ltd.Inventors: Hiroshi Sato, Shoji Kubono, Toshinori Harada, Takayuki Kawahara, Naoki Miyamoto
-
Patent number: 6383718Abstract: A semitransparent phase shifting mask has, in the periphery of a pattern element area, a light shielding portion which is formed by a semitransparent phase shifting portion and a transparent portion with the optimal size combination. A pattern is formed employing the semitransparent phase shifting mask.Type: GrantFiled: June 29, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Norio Hasegawa, Fumio Murai, Katsuya Hayano
-
Patent number: 6382498Abstract: Disclosed is a friction stir welding technique which avoids occurrence of a dent, in adjoining region, extending to a level beneath the joined surfaces. At end portions of the frame members to be joined, at the joining region, thickened parts which project toward the rotary body joining tool are provided. Two adjoining thickened parts, of adjacent members to be joined, can form a trapezoid shape. The rotary body joining tool has a small-diameter tip portion and a larger diameter portion. The rotary body joining tool is inserted in the thickened parts. In a state where the rotary body joining tool has been inserted small-diameter tip and first, to a level where the larger diameter portion of the rotary body joining tool overlaps the thickened part but does not extend below the upper surface of the non-thickened surfaces of the members joined, the rotary body is rotated and moved along the joining region. Even when a gap exists between two thickened parts, a desirable joining can be carried out.Type: GrantFiled: April 10, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Kinya Aota, Masakuni Ezumi, Yasuo Ishimaru, Hisanori Okamura, Isao Funyuu, Akihiro Satou
-
Patent number: 6383452Abstract: A chemical analyzer for measuring a concentration of components of a sample liquid, by mixing the sample liquid with reagents, so as to react the reagents upon the components thereof. The chemical analyzer includes a carrier which is constructed on a substrate and has an introducing portion through which the sample liquid is injected, distributing flow passages for distributing the sample liquid injected from the introducing portion, and plural reactor portions, each holding the sample liquid therein to be mixed with the reagent, thereby to react. A movable driver portion is provided for mounting the carrier thereon, and a reagent charging device is provided for ejecting the reagents, which are different for the respective reactor portions of the carrier. Further, a detector is provided for detecting the components after mixing the reagents with the sample liquid.Type: GrantFiled: March 16, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Ryo Miyake, Naruo Watanabe, Hajime Katou, Takao Terayama, Yasushi Nomura, Hiroshi Mitsumaki
-
Patent number: 6383467Abstract: Objects of the present invention is to provide a carbon material having a superior reversibility in lithium intercalation-deintercalation reaction, and a non-aqueous secondary battery using the carbon material as an active material for a negative electrode, which has a high energy density and an excellent rapid charging and discharging characteristics. Graphite powder having a maximum particle diameter of less than 100 &mgr;m and an existing fraction of rhombohedral structure in the crystalline structure of less than 20% is used as an active material for the negative electrode of the non-aqueous secondary battery. The graphite powder can be obtained by pulverizing raw graphite with a jet mill, and subsequently treating the powder at a temperature equal to or higher than 900° C.Type: GrantFiled: December 28, 1999Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Hidetoshi Honbo, Seiji Takeuchi, Hideto Momose, Tatsuo Horiba, Yasushi Muranaka, Yoshito Ishii
-
Patent number: 6383845Abstract: A semiconductor device comprising a resin mold, two semiconductor chips positioned inside the resin mold and having front and back surfaces and external terminals formed on the front surfaces, and leads extending from the inside to the outside of the resin mold, wherein each of said leads is branched into two branch leads in at least the resin mold, the one branch lead is secured to the surface of the one semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, the other branch lead is secured to the surface of the other semiconductor chip and is electrically connected to an external terminal on the surface thereof through a wire, and the two semiconductor chips are stacked one upon the other, with their back surfaces opposed to each other.Type: GrantFiled: May 15, 2001Date of Patent: May 7, 2002Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd.Inventors: Masachika Masuda, Tamaki Wada, Michiaki Sugiyama, Hirotaka Nishizawa, Toshio Sugano, Yasushi Takahashi, Masayasu Kawamura
-
Patent number: 6385529Abstract: A method comprising a first traveling mode in which the traveling environment ahead is recognized and at least one of the engine, the speed change gear, and the brake is controlled on the basis of a signal representing the recognition and a second traveling mode in which at least one of the engine, the speed change gear, and the brake is controlled on the basis of a signal generated by operation of the driver, in which the second traveling mode is selected in an area where vehicle following-up control is difficult.Type: GrantFiled: January 31, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Toshimichi Minowa, Kozo Nakamura, Hiroshi Takenaga, Yoshinori Endo, Hiroto Morizane, Tokuji Yoshikawa, Mitsuru Nakamura, Ryoichi Komuro
-
Patent number: 6385171Abstract: An LAN interface unit and an ATM switch unit cooperate to perform traffic control. A QoS unit monitors circumstances of an input buffer from a multiplexer of the ATM switch by means of a system controller and when an overflow of the input buffer is expected, the LAN interface unit of the multiplexer is instructed to perform traffic control. The LAN interface unit performs traffic control such as limitation of ATM cells inputted in the ATM switch.Type: GrantFiled: October 1, 1999Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Akihiko Takase, Masahiro Takatori, Kazuho Miki, Masaru Murakami, Koji Wakayama, Tetsuro Yoshimoto, Masao Kunimoto
-
Patent number: 6384909Abstract: A defect inspection apparatus for detecting defects existing on a surface of a semiconductor sample and/or inside the sample based on light information from the sample obtained by irradiating a light beam onto the sample is provided, which comprises a detecting means for detecting positions in the depth direction where the defects exist and distribution of the defects based on the light information; a setting means for setting a position in the depth direction where defects exist; and a means for displaying the distribution of the defects obtained by the detecting means, the displaying means displaying the distribution of the defects corresponding to the position in the depth direction set by the setting means.Type: GrantFiled: April 27, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Koji Tomita, Muneo Maeshima, Shigeru Matsui, Yoshitaka Kodama, Hitoshi Komuro, Kazuo Takeda
-
Patent number: 6383667Abstract: A magnetic recording medium includes a substrate, an underlayer provided on the substrate, a Co alloy magnetic film formed through the underlayer, and a protective film for protecting the magnetic film, wherein the underlayer has a two-layer structure of an lower underlayer contacted with the substrate and an upper underlayer contacted with the Co alloy magnetic film, the upper underlayer is a Co—Crx—My alloy film having a hexagonal close-packed structure, where 25 atomic %≦x+y≦50 atomic %, 0.5 atomic %≦y, nonmagnetic element M is one selected from the group of elements B, Si, Ge, C, Al, P, Ti, V, Nb, Zr, Hf, Mn, Rh, Os, Ir, Re, Pd, Pt, Mo, Ta, W, Ag and Au. Thereby the medium can be increased in its coercive force and can be improved in its thermal stability characteristics.Type: GrantFiled: October 7, 1999Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Masaaki Futamoto, Nobuyuki Inaba, Yoshiyuki Hirayama, Teruaki Takeuchi, Yukio Honda
-
Patent number: 6383267Abstract: An exhaust gas cleaning system for an engine capable of judging the amount of trapped NOx and the oxygen storage capacity of an NOx trap agent and which can diagnose the deterioration of the NOx trap agent. The NOx trap is arranged in an exhaust gas passage and the air-fuel ratio of the exhaust gas is temporally changed from a lean air-fuel ratio to the stoichiometric air-fuel ratio or a rich air-fuel ratio with a predetermined cycle. The NOx trapping occurs by absorbing or adsorbing NOx in the exhaust gas when an air-fuel ratio of the exhaust gas is a lean air-fuel ratio and by releasing or reducing NOx when the air-fuel ratio is a rich air-fuel ratio. The amount of trapped NOx is judged from the oxygen concentration and the oxygen concentration in the exhaust gas is detected in the exhaust gas passage in the downstream side of the NOx trap and determined by taking the oxygen storage capacity when the air-fuel ratio of the exhaust gas changes to the stoichiometric air-fuel ratio or the rich air-fuel ratio.Type: GrantFiled: June 12, 2000Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Yutaka Takaku, Shigeru Kawamoto, Yoshihisa Fujii, Shinji Nakagawa, Toshio Ishii, Minoru Ohsuga
-
Patent number: 6384832Abstract: An image processing apparatus is composed of a plurality of function processing units for performing image processing, a high priority function selection part for selecting functions, execution of each of which is required by a corresponding one of the function processing units, based on the predetermined priority for each of the functions; and a data control unit including a data transfer part for preferentially accessing the shared memory which the function selected by the high priority function selection part requires, and a plurality of data holding parts, each of the data holding parts holding a predetermined amount of data transmitted with each of the plurality of function processing units, wherein the data transfer part controls the bus connecting the CPU and the shared memory based on requirement sent from each of the function processing units, and each of the plurality of function processing units transmits data with the data control unit separately from the others of the plurality of function procesType: GrantFiled: March 1, 1999Date of Patent: May 7, 2002Assignees: Hitachi, Ltd., Hitachi Engineering Co., Ltd.Inventors: Shoji Muramatsu, Yoshiki Kobayashi, Kenji Hirose, Shigetoshi Sakimura
-
Patent number: D456728Type: GrantFiled: May 3, 2001Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Mitsuru Oonuma, Atsushi Ninomiya, Kiyotoshi Mori, Toshinobu Shirato, Kazunori Yanagisawa
-
Patent number: RE37690Abstract: A lead frame and a semiconductor device wherein a through hole is formed in the center of a semiconductor chip-mounting surface of a chip pad at the center of the lead frame, the through hole being tapered or being one which corresponds to a surface area that is greater on the surface of the chip-mounting surface of the chip pad than on the surface of the side opposite to the chip-mounting surface thereof. This prevents the occurrence of cracks in the sealing plastic portion in the step of reflow soldering of the lead frame to the substrate.Type: GrantFiled: May 24, 1995Date of Patent: May 7, 2002Assignee: Hitachi, Ltd.Inventors: Makoto Kitano, Sueo Kawai, Asao Nishimura, Hideo Miura, Akihiro Yaguchi, Chikako van Koten nee Kitabayashi, Ichio Shimizu, Toshio Hatsuda, Toshinori Ozaki, Toshio Hattori, Souji Sakata