Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In an SIP type module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the positions closer to the end portion of the substrate in order to drastically reduce the packaging height.

Abstract: There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and a large capacity while minimizing the mounting area. In order to achieve this memory, the TAB (Tape Automated Bonding) of the prior art is mounted on an electrically conductive connector, and a plurality of structures composed of the TAB and the connector are stacked. Moreover, the connector mounting the TAB thereon is constructed such that the independent terminals of the stacked TABs may not be shorted.

Abstract: When a semiconductor integrated circuit device having a wiring structure of three or more layers is hierarchically considered as a collection of a plurality of functional blocks, each functional block is internally connected by wirings in the first wiring layer, in which wirings have their main extended direction prescribed to be the X-direction, and wirings in the second wiring layer, in which wirings have their main extended direction prescribed to be the Y-direction, formed over the first wiring layer. Wirings in the third wiring layer, in which wirings have their main extended direction prescribed to be the same as the wirings in the second wiring layer, formed over the second wiring layer, together with wirings in the first and second wiring layer, are used as signal wirings between functional blocks, while the wirings in the third wiring layer are used as power supply wirings for providing power supply to functional blocks.

Abstract: A module board has a supporting plate and slender lead pins having their first portions arranged substantially in parallel with one another on a plane substantially coplanar with the supporting plate. The supporting plate and the first portions of the slender lead pins are sandwiched between electrically insulating layer members. The supporting plate and the first portions of the lead pins are isolated from one another with an electrically insulating material between the pair of electrically insulating layer members. Second portions of the lead pins protrude from the pair of electrically insulating layer members. Through holes are provided one for each of the lead pins and through hole conductors are formed on the inner walls of the through holes.

Abstract: There is a trend to increase that area of a device requiring a memory of large capacity, which is occupied by a semiconductor memory. This trend obstructs reduction of the size of the device. The present invention contemplates to provide a memory which can have a high integration, a high density and a large capacity while minimizing the mounting area. In order to achieve this memory, the TAB (Tape Automated Bonding) of the prior art is mounted on an electrically conductive connector, and a plurality of structures composed of the TAB and the connector are stacked. Moreover, the connector mounting the TAB thereon is constructed such that the independent terminals of the stacked TABs may not be shorted.

Abstract: The present invention consists in that a through hole of large area is provided in a die pad or a tab, thereby to prevent a resin from cracking at the rear surface of a surface-packaging resin package in a high-temperature soldering atmosphere of vapor-phase reflow or the like, whereby a resin-molded surface-packaged IC of high reliability is provided.

Abstract: In an SIP module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the positions closer to the end portion of the substrate in order to drastically reduce the packaging height.

Abstract: In a photoelectric device, particularly, a photoelectric device for optical communication, an optical fiber is fixed at two fixing points so that the extremity of the optical fiber is disposed opposite to the light emitting surface of a laser diode chip and the optical fiber extends in a nonlinear shape, for example, in a moderate curve, between the two fixing points. Even though holding members fixedly holding the optical fiber at the two fixing points and a base member supporting the holding members are formed of a metal or metals having a coefficient of thermal expansion far greater than that of the optical fiber, and even if the distance between the two fixing points is varied due to the thermal expansion or contraction of the holding members and the base member, the optical fiber is obliged only to change the shape of extension.

Abstract: In an SIP type module of the type wherein memory ICs are mounted to both surfaces of a substrate, the present invention provides a face package type memory module wherein packaging is made in an inclined direction in place of vertical packaging of the prior art technique and only the memory ICs mounted to the upper surface side of the substrate are deviated to the position closer to the end portion of the substrate in order to drastically reduce the packaging height.

Abstract: In the present invention, memory chips are stuck together in stacked fashion by TAB (tape automated bonding), and a multiple memory chip and lead complex like an SOP (small out-line package) is formed of the chips and leads, whereby a memory module of high packaging density can be realized by a flat packaging technique.

Abstract: In a photoelectric device, particularly, a photoelectric device for optical communication, an optical fiber is fixed at two fixing points so that the extremity of the optical fiber is disposed opposite to the light emitting surface of a laser diode chip and the optical fiber extends in a nonlinear shape, for example, in a moderate curve, between the two fixing points. Even though holding members fixedly holding the optical fiber at the two fixing points and a base member supporting the holding members are formed of a metal or metals having a coefficient of thermal expansion far greater than that of the optical fiber, and even if the distance between the two fixing points is varied due to the thermal expansion or contraction of the holding members and the base member, the optical fiber is obliged only to change the shape of extension.

Abstract: In the photo electro device, a laser diode chip is set fixedly through a submount to a heatsink in a package. In assembling, first a ball lens is anchored to a holder of a lens support frame by clinching claws of the holder. Subsequently the surfaces of the ball lens on the obverse and reverse sides of the lens support frame are coated with nonreflective films. Then the position of the lens support frame is adjusted relatively to the laser diode chip so that the respective optical axes are aligned with each other. And after an arm is welded fixedly to the heatsink, a frame member is severed or removed to complete the work for setting the ball lens.

Abstract: The present invention resides in a hybrid integrated circuit device comprising; a plurality of electronic parts; a wiring board mounting the plurality of electronic parts on the primary front surface thereof; and a plurality of leads secured to the edge of the wiring board, the device being featured in that a fixing section of each of the leads consists of a main fixing portion secured to the primary rear surface of the wiring board, and an auxiliary fixing portion secured to the side face of the wiring board, the auxiliary fixing portion of the lead being branched from the main fixing portion thereof such that the branched auxiliary fixing portion is bent at an angle of approximately 90.degree. with respect to the main fixing portion. This provides the hybrid integrated circuit device in which the leads have the enhanced connection strength against the wiring board, and the wiring board has a lower mounted height.