Abstract: An electron beam apparatus equipped with a review function of a semiconductor wafer includes a scanning electron microscope to obtain image information of a semiconductor wafer, and an information processing apparatus to process the image information. The information processing apparatus includes a data input unit to receive positional information of a defect on the wafer, a storage for storing a plurality of image information of a position on the wafer corresponding to the positional information, and an image processing unit that retrieves any of the plurality of image information, and classifies the retrieved image information corresponding to the positional information depending on the type of defect.

Abstract: In the manufacture of a semiconductor device having a high-performance and high-reliability, a silicon nitride film 17 for self alignment, which film is formed to cover the gate electrode of a MISFET, is formed at a substrate temperature of 400° C. or greater by plasma CVD using a raw material gas including monosilane and nitrogen. A silicon nitride film 44 constituting a passivation film is formed at a substrate temperature of about 350° C. by plasma CVD using a raw material gas including monosilane, ammonia and nitrogen. The hydrogen content contained in the silicon nitride film 17 is smaller than that contained in the silicon nitride film 44, making it possible to suppress hydrogen release from the silicon nitride film 17.

Abstract: A sample inspection system having a sample stage holding a sample to be inspected, electron beam optics so as to radiate an electron beam to the sample, a detector unit that detects a secondly generated signal generated in response to radiation of the sample by the electron beam, a storage for storing a plurality of images obtained from the generated signal and information for classifying the plurality of images by a type of defect in the sample, and an image processing unit. The image processing unit retrieves any of the plurality of images and classifies the retrieved image depending on the type of defect including an electrical defect and a defect in the figure.

Abstract: A pattern inspection system for inspecting a substrate surface on which a predetermined pattern is formed with radiation of an electron beam and an optical beam. the pattern inspection system includes a radiation and which radiates an electron beam to the substrate, a detection unit which detects a secondarily generated signal attributable to the radiation of the electron beam, a retrieval unit which retrieves an image from the signal detected by the detection unit, and an image processing unit which classifies the retrieved image depending on a type of the image.

Abstract: Charge-up damages to a substrate are reduced in a manufacturing process using plasma, and the reliability of a semiconductor device is improved. By forming an insulating film on the back of a substrate before a step of forming a first wiring layer, even if a plasma CVD method, a sputtering method, or a dry-etching method is used in a wiring-forming step executed later, then it is possible to suppress electric charges which are generated on the substrate and which flow to the ground potential through the substrate, and to prevent damages to the substrate due to charge-up.

Abstract: In a method of manufacturing a semiconductor device having a buried wiring structure of copper, a conductive barrier film 17a of buried second layer wirings L2 is protected against oxidation upon forming an insulative film 15b for a wiring cap with an SiON film formed by a plasma CVD method using a gas mixture, for example, of a trimethoxysilane gas and a nitrogen oxidized gas, whereby the dielectric breakdown strength between wirings of copper as the main conductor layer of the semiconductor device can be improved.

Abstract: In a gas-phase treating process of a semiconductor wafer using hydrogen, there is provided a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus. The profile at the end portions of the side walls of gate electrodes of a poly-metal structure is improved by forming the gate electrodes over a semiconductor wafer IA having a gate oxide film and then by supplying the semiconductor wafer 1A with a hydrogen gas containing a low concentration of water, as generated from hydrogen and oxygen by catalytic action, to oxidize the principal face of the semiconductor wafer 1A selectively. After this, the hydrogen in the exhaust gas, as discharged from an oxidizing furnace, is completely converted into water by causing it to react with oxygen by a catalytic method.

Abstract: In a wafer chuck for flatly vacuum-chucking a semiconductor wafer (11) supported by support pins (15) such that a pressure in a suction chamber (13) surrounded by an external wall (12), the upper surface of the external wall (12) is formed to be lower than the upper surfaces of the support pins, and the upper surface of the external wall (12) does not pressure the semiconductor wafer (11), a distance (L1) between the external wall (12) and closest support pins (15a) is up to 1.8 mm, and an alignment pitch. (L2) of the support pins (15) aligned inside the closest support pins (15a) to the external wall (12) is not more than 1.5 times of the distance (L1) between the external wall (12) and the closest support pins (15a).

Abstract: A IC card producing method includes testing steps which can enhance the reliability and generality of IC cards. The method of producing IC cards of the non-contact type or contact type implements a wafer processing step (step 100), wafer inspection step (step 200), COB fabrication step (step 300), COB on-card mounting step (step 400), IC card production process 0th-order issuance step (step 500), IC card inspection step (step 600), 1st-order issuance processing step (step 700), and 2nd-order issuance processing step (step 800) to complete a contact-type IC card. Particularly, the method includes the chip testing of step 200 and IC card testing of steps 500-800 for the IC card in its state having a tested chip. The method further adopts a dual testing scheme which includes a memory verification test conducted inside the internal memory, such as an EEPROM, concurrently with the IC card test by the tester.

Abstract: In a gas-phase treating process of a semiconductor wafer using hydrogen, there is provided a technique for safely eliminating the hydrogen in an exhaust gas discharged from a gas-phase treating apparatus. The profile at the end portions of the side walls of gate electrodes of a poly-metal structure is improved by forming the gate electrodes over a semiconductor wafer IA having a gate oxide film and then by supplying the semiconductor wafer 1A with a hydrogen gas containing a low concentration of water, as generated from hydrogen and oxygen by catalytic action, to oxidize the principal face of the semiconductor wafer 1A selectively. After this, the hydrogen in the exhaust gas, as discharged from an oxidizing furnace, is completely converted into water by causing it to react with oxygen by a catalytic method.

Abstract: There are provided an inline inspection system and inspection method for inspecting the substrate surface on which semiconductors and circuit patterns are formed by radiating thereto white beam, laser beam or electron beam, and reviewing, inspecting and discriminating the detected roughness and figure defect, particle and moreover electrical defect on the surface with higher accuracy within a short period of time with the same instrument. Thereby, automatic movement to the position to be reviewed, acquisition of image and classification can be realized. On the occasion of identifying the position to be reviewed on a sample and forming an image through irradiation of electron beam on the basis of the positional information of defect detected with the other inspection instrument, an electrical defect can be reviewed with the voltage contrast mode by designating the electron beam irradiation condition, detectors and detecting condition depending on a kind of defect to be reviewed.

Abstract: A method for stabilizing the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGA·IC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead is disclosed. The inner lead is bonded to the electrode pad when the chip is supplied in a fixed position for a bonding tool. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. The center line of the inner lead is recognized, the inner lead is pushed to the chip in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: An aggregate of semiconductor devices, including semiconductor packages packaging the semiconductor devices, the packages being on a tape which is wound on a reel, is provided. The aggregate of semiconductor devices includes the semiconductor packages arranged consecutively on a first tape; and the aggregate also includes a second tape, which is a spacer tape, having spacers (protrusions), provided between adjacent windings of the first tape on the reel, providing spaces for the semiconductor packages. The semiconductor packages can be provided with bumps, e.g., on the side of the first tape opposite the side of the first tape having the semiconductor packages thereon, and the first tape can be a flexible printed circuit board.

Abstract: A method and apparatus for stabilizing the form of a letter S of an inner lead after bonding in a method of manufacturing &mgr;BGAoIC in which a chip is fixed via an insulating film on a tape carrier on one main surface of which plural inner leads are laid and each electrode pad of the chip is bonded to each inner lead is disclosed. The inner lead is bonded to the electrode pad when the chip is supplied in a fixed position for a bonding tool using a sprocket hole of the tape carrier. Next, the respective positions of the inner lead and the electrode pad are recognized using a feature lead and an electrode pad. Afterward, the center line of the inner lead is recognized, the inner lead is touched to the chip by the bonding tool and after the inner lead is pushed in the direction of the base and bent in the form of a letter S, the end of the inner lead is bonded to the electrode pad by thermocompression by the bonding tool.

Abstract: A method for forming bumps in an LSI package in which: semiconductor chips are mounted onto a flexible printed circuit board; electrically conductive balls are temporarily fixed by using a fixing liquid including one selected from a group including flux, solder paste and an adhesive containing an electrically conductive agent, onto pads which are provided on the flexible printed circuit board so as to be electrically connected to the semiconductor chips; the flexible printed circuit board having the electrically conductive balls temporarily fixed thereto is wound up onto a reel; the flexible printed circuit board having the electrically conductive balls temporarily fixed thereto is fed out from the reel and heated to thereby form bumps thereon; and the flexible printed circuit board having the bumps formed thereon is wound up onto another reel; and the flexible printed circuit board is cleansed and trimmed to thereby form LSI packages.

Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.

Abstract: A mass spectrometer for analyzing trace impurities on a level between ppt and ppb contained in silicon material gas such as monosilane gas. The mass spectrometer includes an ion formation region, reaction region, and mass analysis region. Ion formation gas is introduced into the ion formation region and sample gas (silicon material gas) is introduced into the reaction region. The ion formation region ionizes ion formation gas by an ionizer and forms primary ions. When the pressure of ion formation gas is made higher than the pressure of sample gas, the ion formation gas flows into the reaction region from the ion formation region together with primary ions and is mixed with the sample gas. In the reaction region, an ion-molecule reaction is produced between the primary ions and trace impurities contained in the sample gas and the trace impurities contained in the sample gas are ionized.

Abstract: An atmospheric pressure, elevated temperature gas desorption apparatus which enables quanitiative analysis of impurities absorbed in or on the surface of a solid sample (semiconductor wafer, optical disc, etc.) is disclosed. The atmospheric pressure, elevated temperature gas desorption apparatus for desorbing impurities absorbed in or on the surface of a plate-like solid sample 18 into a carrier gas 19 in a chamber 6 under an atmospheric pressure while increasing the temperature of the solid sample 18 includes a desorption room 7A provided in the chamber 6 and connected through to a first gas supply system 1 for supplying the carrier gas 19, for desorbing impurities absorbed in or on the surface of the solid sample 18 into the carrier gas 19. A sample support room 7B is provided in the chamber 6 and is separated from the desorption room 7A by a partition member 6A. The solid sample 18 is in close contact with the partition member 6A.

Abstract: The present invention provides a plasma etching system, comprising a process chamber enclosing a plasma, means for evacuating said process chamber, a chuck electrode for supporting a substrate, a shower electrode positioned to face said chuck electrode and provided with a large number of small holes, a power source for applying a plasma voltage between the chuck electrode and said shower electrode, gas supply means communicating with said small holes of the shower electrode for supplying a plasma-forming gas into the process chamber through the small holes, and means for controlling said gas supply means such that said plasma-forming gas flows through said small holes at a mass flow rate of at least 620 kg/m.sup.2 /hr.

Abstract: Ultra-low concentrations of impurities such as water in a highly-purified gas are analyzed by a system having an ion source chamber and a drift chamber. The ion source chamber ionizes one of a sample gas and a carrier gas to produce main component ions, and the other of the sample gas and carrier gas is introduced into the drift chamber. The invention controls the residence time of main component ions in one of the first and second chambers to be shorter than the mean reaction time of main component ions and impurity molecules of the sample gas in the one of the first and second chambers.