Abstract: A liquid crystal projector comprises an illuminating optical system including a light source, a color separating optical system for separating illuminating light rays emitted by the illuminating optical system into light rays of three colors, a projection lens unit comprising a projection lens, a cross dichroic prism disposed near a light receiving end of the projection lens, and a plurality of liquid crystal panels arranged around the cross dichroic prism, and a light source power supply for supplying power to the light source. The projection lens unit, the color separating optical system, the illuminating optical system and the light source power supply are arranged in that order. The liquid crystal projector has an outside size in a horizontal plane of 263 mm by 318 mm or below. The liquid crystal panels have a display screen size of 0.9 in. A cooling fan for cooling the plurality of liquid crystal panels is disposed beside the projection lens.

Abstract: A multiplexed audio data decoder apparatus is provided in which integration of an audio decoder is easy, and has a high flexibility when the number of the formats to be processed is increased or when the specification is changed. In an external ROM 60 there are accumulated a plurality of decoding program codes corresponding to respective plural methods for compressing and encoding. A controller means 50 transfers the decoding program code corresponding to the method for compressing and encoding after changing thereof, from the external ROM 60 to an internal RAM 25. A DSP 22 starts decoding processing by using the decoding program code which is transmitted into the internal RAM 25.

Abstract: In order to generate a sampling clock having a higher accuracy, a synchronous signal generating circuit is provided with a phase error detector, detecting a phase error of a read out signal digitized on the basis of FDTS algorithm, and a VCO, controlling an oscillation frequency on the basis of a phase error detected by the phase error detector, to generate a synchronous signal by the VCO. On the basis of the synchronous signal generated by the synchronous signal generating circuit, an ADC digitizes the read out signal. The digitized read out signal is then converted to binary data by a detection circuit.

Abstract: A liquid crystal projector comprises an illuminating optical system including a light source, a color separating optical system for separating illuminating light rays emitted by the illuminating optical system into light rays of three colors, a projection lens unit comprising a projection lens, a cross dichroic prism disposed near a light receiving end of the projection lens, and a plurality of liquid crystal panels arranged around the cross dichroic prism, and a light source power supply for supplying power to the light source. The projection lens unit, the color separating optical system, the illuminating optical system and the light source power supply are arranged in that order. The liquid crystal projector has an outside size in a horizontal plane of 263 mm by 318 mm or below. The liquid crystal panels have a display screen size of 0.9 in. A cooling fan for cooling the plurality of liquid crystal panels is disposed beside the projection lens.

Abstract: It is an object of the present invention to provide equipment, particularly a display, capable of easily corresponding to two or more types of remote controllers (for example, remote controllers of different manufacturers) while restraining cost increases as far as possible. Equipment according to the present invention comprises: initializing means for initializing so as to correspond to any one of plural types of remote controllers; and switching means for switching the initializing means so as to correspond to the remote controller using any one of the plural types of remote controllers. Thereby, the equipment is initialized so as to correspond to any one of the plurality of remote controllers, and it is possible to prevent misoperation due to other remote controllers. Also, by switching the initializing means by using any remote controller, switching can be performed if only a desired remote controller is available.

Abstract: An IC card and a method thereof for adding or changing a program for a memory for writing without adversely affecting the function of the IC card and by keeping the security of a program to be written later by restricting writing by a write control program having a decryption function or a program code conversion function.

Abstract: A video data display board, device or method for inputting and displaying video data including vertical blanking interval data containing character data and other image data than the vertical blanking interval data. The video data display device has a data transfer circuit capable of transferring both of the data to devices different from each other, so that the processing of character information and image data are performed by using the different devices which perform an appropriate process according to the property of the data. The processed character and image data are displayed on a graphic display screen simultaneously.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: Data byte errors are detected by a comparator and classified into errors for respective interleaves, and the classified errors are counted by counters in an error count block. Further, at the time one sector has been read, comparators compare the counted values for the respective interleaves with an interleave threshold to detect whether nor not there are interleaves which have a number of errors exceeding the interleave threshold, and the detected results are counted by an error count block. The frequency of retries after an ECC is predicted from the counted value on the error count block and the total number of read sectors.

Abstract: A disk controller which includes a plurality of interfaces to host computers or disk devices, each interface having a processor, a memory unit coupled to the interfaces in a one-to-one ratio by respective access paths, the memory unit having a memory in which information is stored, and a common bus coupling to the processors included in the interfaces. Each processor of each interface transmits broadcast data to all of the processors of the interfaces, except its own, by way of the common bus.

Abstract: A liquid crystal display control device is provided with a clock generating circuit for generating, on the basis of a first synchronous signal, a dot clock having a predetermined period, a phase which varies on dot-period basis for every frame period of the first video signal, an input circuit for picking up the first video signal in accordance with the dot clock and outputting digital display data, a frame memory in which the digital display data are stored, and a control circuit for generating a second synchronous signal for a liquid crystal display and reading out the display data stored in the frame memory to generate a second video signal, whereby a series of operations from a pickup operation of the video signal to a display operation of the liquid crystal panel can be performed at a lower speed while suppressing deterioration in quality of display images.

Abstract: A liquid crystal projector comprises an illuminating optical system including a light source, a color separating optical system for separating illuminating light rays emitted by the illuminating optical system into light rays of three colors, a projection lens unit comprising a projection lens, a cross dichroic prism disposed near a light receiving end of the projection lens, and a plurality of liquid crystal panels arranged around the cross dichroic prism, and a light source power supply for supplying power to the light source. The projection lens unit, the color separating optical system, the illuminating optical system and the light source power supply are arranged in that order. The liquid crystal projector has an outside size in a horizontal plane of 263 mm by 318 mm or below. The liquid crystal panels have a display screen size of 0.9 in. A cooling fan for cooling the plurality of liquid crystal panels is disposed beside the projection lens.

Abstract: The disk array controller includes a plurality of interfaces with respective processors for connecting with a host computer or disk devices, duplicated shared memories connected in a one to one ratio between each interface and respective access paths, a selector connected to the plurality of interfaces, and a cache memory connected to the selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor performs dual writing in the duplicated shared memories.

Abstract: In a low power consumption data transmission circuit and method, and a liquid crystal display apparatus using the same, 24-bit display data is transmitted from a transceiver circuit to a receiver circuit through a transmission line so that the display data is displayed on a liquid crystal panel. The transceiver circuit has a holding circuit including an 8-stage shift register. The transceiver circuit outputs 24-bit data to the transmission line by use of first and second output circuits when data different from data held in the holding circuit is to be transmitted from the transmission line and outputs data indicative of a hold position in the holding circuit from the second output circuit when the same data as that held in the holding circuit is to be transmitted from the transmission line.

Abstract: A temperature compensating circuit includes a first circuit network 1 between an inverting input terminal of an operational amplifier 13 and an output terminal of the operational amplifier 13, and a second circuit network 2 between the inverting input terminal of the operational amplifier 13 and a reference potential. At least one of the first circuit network and the second circuit network is made of an arrangement containing a plurality of series-connected thermistor/resistor pairs in which the thermistors are connected parallel to the resistors, and the temperature compensating circuit compensates a temperature-dependent signal which is inputted into a positive phase input terminal of the operational amplifier 13, and outputs the temperature-compensated signal.

Abstract: A disk array controller installed with a plurality of interfaces with the host computer or disk device, duplicated shared memories connected in a ratio of one to one between each interface and respective access path, a selector connected to the plurality of interfaces, and a cache memory connected to said selector. The number of access paths between the selector and the plurality of interfaces is greater than the number of access paths between the cache memory and the selector. Each processor for the plurality of interfaces performs dual writing in the duplicated shared memories.

Abstract: A disk array controller connected in a star configuration with a plurality of interfaces each having a processor, a shared memory connected to the interfaces by access paths and a common bus connected to the interfaces. The shared memory transmits interruption signals to the interface by way of control signals when one of the processors writes broadcast data into the shared memory.

Abstract: A liquid crystal display device in which the time necessary for luminance to change from application of a different gray-scale voltage exceeds one frame period in relation to the response as a luminance change time of the liquid crystal. The liquid crystal display device includes a signal control circuit for preventing the content of a preceding frame from being displayed as an after-image and preventing also deterioration of image quality. The signal control circuit includes a frame memory for delaying by one frame the first display data inputted from the external device, an arithmetic operation circuit for comparing the second display data stored in the frame memory and delayed by one frame with the first display data, and an addition/subtraction circuit for adding and subtracting correction data outputted by the arithmetic operation circuit to and from the first display data.

Abstract: A display device for displaying display data including a display panel; a driving circuit which generates a gray-scale voltage corresponding to the display data and outputs the gray-scale voltage to the display panel; a scan driver which scans a line on the display panel to which the gray-scale voltage is output; and a control circuit which outputs the display data to the driving circuit and outputs a display control signal to the scan driver. A gray-scale display characteristic of the display data is changeable between a first state in which a difference in a brightness of the display panel between two adjacent display data values becomes smaller as a display data gray-scale increases, and a second state in which the difference in the brightness of the display panel between two adjacent display data values becomes larger as the display data gray-scale increases.

Abstract: A video data processing device which includes a bus, a central processing unit (CPU), a first scaling unit which is coupled to the bus and has an input unit for inputting image data from an external device, and a second scaling unit which is coupled to the bus. The CPU selectively controls the first scaling unit to convert the image data when an amount of the image data is decreased by a conversion performed by the first scaling unit, and selectively controls the second scaling unit to convert the image data when an amount of the image data is increased by the conversion performed by the first scaling unit.