Abstract: A control device and a control method for increasing stability of micro controller system are described. The control device comprises a system error detection unit a memory unit, a data error detection unit, an error signal processing unit and a system resetting unit. When the system is error or the data transferred from the memory unit has error, the system error detection unit or the data error detection unit outputs an error signal to the error signal processing unit, and then the error signal processing unit corrects the error data or commands the system resetting unit to reset the system by the error signal for increasing the system stability.

Abstract: An apparatus for automatically calibrating a transducer are disclosed in the present invention, the apparatus comprising: an oscillator, for generating a system frequency; a micro controller, being coupled to the oscillator, for receiving the system frequency; a counting unit, being installed inside the micro processor, for generating at least a clock signal according to the system frequency; a transformer, whose input terminal is being coupled to the counting unit, for receiving the clock signal and transferring the clock signal to be a plurality of exciting signals, the output terminal feedbacks and couples the exciting signals to the interrupting signal input terminal of the micro controller, wherein the a plurality of exciting signals comprising at least a primary oscillating signal and at least a secondary oscillating signal and the amount of the clock signal equals to that of the primary oscillating signal; and a transducer, whose input terminal is being coupled to the transformer, and the transducer is

Abstract: An input offset voltage corrector used in an operational amplifier includes a switch unit, a register unit, an offset voltage correction unit and a micro control unit. The micro control unit sets the register unit to control the switch unit to switch the input offset voltage corrector to different operating modes. If an input offset voltage corrector is set to the offset voltage correcting mode, the offset voltage correction unit will adjust the input offset voltage of the operational amplifier to output an exact signal. Furthermore, the input offset voltage corrector can adjust the input offset voltage anytime according to the operating conditions to maintain the best characteristic of the operational amplifier.

Abstract: The invention relates to an apparatus for interfacing a peripheral device corresponding to the detection of interface, which comprises: a regulator, for regulating the working voltage of the circuit of the apparatus; an USB physical layer with switch controller, for detecting and determining whether the interface to which the peripheral device is connected is an USB interface and thus being capable of enabling an USB mode of the apparatus; at least four pull-high switch resistors; and an analog switch, capable issuing an analog signal while the apparatus is in the USB mode; wherein the PS2 mode of the apparatus is enabled while the USB physical layer with switch controller detects no USB interface being connected to the peripheral device, and the mode of the apparatus is controlled by the interaction of the on/off statuses of the four pull-high switch resistors.

Abstract: The present invention provides an apparatus for security of accessing data, comprising a storage device including an address transform detector, a first lock bit register and a data comparator, the address transform detector providing a predetermined correction signal, data outputted from the storage device could be correctly identified when a memory address signal matches the predetermined correction signal and a latch signal is provided to the first lock bit register; and a micro-control unit for receiving data outputted from the storage device, the outputted data being stored in a second lock bit register and encoded by a serial encoding unit, a locking signal being feedback to the storage device; wherein a data encoded signal outputted from the first lock bit register and the locking signal are provided to a data comparator for comparison and determining whether output correct data to an encoding control unit according to the comparison.

Abstract: A two-wire serial handshaking communication interface and a method thereof is provided for a transmission of a data bit representative between a first transmitting component and a second transmitting component, wherein the first transmitting component includes a first input/output unit and a second input/output unit and the second transmitting component has a third input/output unit and a fourth input/output unit, wherein the first input/output unit and the second input/output unit transmit a first signal through a first transmitting line electrically connected therebetween and the third input/output unit and the fourth input/output unit transmit a second signal transmitted through a second transmitting line electrically connected therebetween without strict constraint on communication timing.

Abstract: A method for locking data of a program memory embedded in a microcontroller is provided. The method keeps the data stored in the program memory from being dumped. The program memory consists of a one-time-programmable read only memory and is configured into a plurality of storage sectors. The method, according to the present invention, first receives a lock command in which the lock command corresponds to a specific storage sector of the program memory. Next, according to the lock command, which storage sector is the specific sector is recognized. Finally, an access lock module is activated for locking the specific storage sector.

Abstract: The present invention provides a micro-control unit a RC oscillator for generating a reference clock, a plurality of touch switches for generating a transition signal indicating one of the touch switches being touched by human beings, a plurality of analog switches coupled to the touch switches for controlling transmission of the transition signal and a plurality of counters for counting time, all of the counters stop counting when one of the counters overflows and content of all counters being read, wherein ON/OFF of the analog switches controlled by a software.

Abstract: The present invention provides a memory device and a method for accessing the memory device thereof. The memory device comprises an address encoding selector for selecting one of plurality of encoding circuits which encodes a first address into a second address, and a data decoding selector for selecting one of plurality of decoding circuits which decodes a first data corresponding to the second address into a second data and a non-volatile memory, coupled to address encoding selector and the data decoding selector, for storing the first data. The method for accessing the memory device comprises encoding a first address into a second address by an address encoding selector, and decoding a first data corresponding to the second address into a second data by a data decoding selector, wherein the first data being stored in the non-volatile memory.

Abstract: A clock generating circuit and method therefor are provided, which includes a control unit, a first oscillating module, a second oscillating module, a status control unit, and a multiplexer. The control unit is used for outputting a first control signal and a second control signal so as to drive the first oscillating module and the second oscillating module to generate or stop from a first clock signal and a second signal to the multiplexer.

Abstract: A vacuum fluorescent display (VFD) and a filament-driving method are provided. Two sub-dc voltages having peaks respectively interlaced with each other on the waveform thereof are used to drive the filament. A driving circuit is integrated in the integrated circuit of a VFD driver, a VFD controller or a VFD MCU. The VFD is able to operate without utilizing a transformer.

Abstract: A microcontroller of the present invention integrates a plurality of independent counters of corresponding operation functions into a pool counting circuit and executes each corresponding operation function based on each of different operation cycles. Therefore, the present invention can increase the circuit pool level and reduce the power consumption and the chip size.

Abstract: An RC oscillator is provided. The oscillator includes an RC selecting switch disposed in an input port of the oscillator, a resistor output port, a capacitor output port, at least a resistor switch with a first end connected to the RC selecting switch and a second end floatingly connected to the resistor output port, and at least a capacitor switch with a first end connected to the RC selecting switch and a second end floatingly connected to the capacitor output port. The second ends of the resistor switch and the capacitor switch are selectively connected to the resistor output port and the capacitor output port respectively for providing different combinations of a resistor output value and a capacitor output value.

Abstract: A method for resetting a micro controller is disclosed. The method uses an improved micro controller reset circuit designed for loading micro controller options regardless of whether a reset key is pressed after the power is turned on. In this method, the initial values of the micro controller are recovered so as to reduce power consumption and avoid conflict between signals.

Abstract: A digital-to-analog converting circuit for power soft-switching, comprising: a metal-oxide-semiconductor field-effect transistor (MOSFET); a digital-to-analog control circuit, for controlling the MOSFET to operate in either the cut-off region, the saturation region or the linear region; a digital control unit, using an output signal so as to control an input current into the MOSFET; and a DC-to-DC inverter, controlled by the MOSFET so as to invert external DC power into a certain level for electronic products.

Abstract: A voltage regulator with output accelerated recovery circuit is disclosed, which is substantially a low dropout voltage regulator (LDO) having a comparator and a pull-down transistor, both being connected between the positive feedback input node of its operational amplifier (OP) and the ground end thereof. In a preferred aspect, the comparator is used for detecting the voltage variation of a reference node, whereas the reference node is defined to be a node located between a first feedback resistor and a second feedback resistor. Operationally, as the voltage detected at the reference node is larger than a predetermined voltage, the pull-down transistor is forced to turn on so as to sink the output voltage rapidly for returning the same back into regulation.

Abstract: A method of power control apparatus for electric cookers is provided. In the method, a micro controller unit (MCU) with a programmer pulse generator (PPG) and analog/digital (AID) converters is utilized, wherein a command can be inputted externally to the MCU for restarting or stopping the output of the PPG; and the PPG is capable of outputting pulses of programmable pulse width, being programmed by software for power control and, also, the protection of power control apparatus.

Abstract: A encoding/decoding method and device for a remote controller utilizing a baud rate to encrypt data for transmission. The encoding device includes an encoder encoding an identification code into an encrypted code; and an interpreter interpreting the un-encoded portion of the identification code and the encrypted code into a transmission signal. When the encrypted code is in a first base, the plain code corresponding to the encrypted code will be transmitted with a first baud rate; and when the encrypted code is in a second base, the plain code corresponding to the encrypted code will be transmitted with a second baud rate. The decoding device includes a receiver receiving the transmission signal; a interpreter connected to the receiver interpreting the transmission signal into a received signal; an encoder utilizing the same encoding algorithm as in the transmitter to generate a comparison code; and a processor comparing the received signal and the comparison code.

Abstract: Disclosed is an improved circuit and method for generating a power on reset signal, the circuit being a two-stage circuit comprising a delay-stage circuit and an output-stage circuit. The delay-stage circuit delays a time for a power on reset signal generated in the output-stage circuit changing from low to high, so that a power voltage having a low rising speed may be normally reset. Further, the two stages provide charging paths and discharging paths so that the power on reset signal may be prevented from changing from high to low when it has changed from low to high, when noises are presented on the power voltage.

Abstract: A power processing interface for a radio frequency identification system is provided.