Abstract: Systems and methods providing low-density parity-check (LDPC) decoder configurations capable of decoding multiple code blocks in parallel are described. Parallel LDPC decoders of embodiments can be reconfigured to simultaneously decode multiple codewords with reconfigurable size. In operation of embodiments of a parallel LDPC decoder, a plurality of active portions of the decoder logic are configured for parallel processing of a plurality of code blocks, wherein each active region processes a respective code block. The decoder logic active portions of embodiments are provided using a reconfigurable segmented scalable cyclic shifter supporting multiple instruction, multiple data (MIMD), wherein multiple individual different data shifts are implemented with respect to a plurality of code blocks in an instance of data shifting operation.

Abstract: A method for character recognition and semantic for natural language processing comprising extracting a sequence of feature vectors from a sequence of input character images by a convolutional neural network (CNN) feature extractor. The sequence of feature vectors comprises a plurality of feature vectors, each feature vector representing an approximate-match of its corresponding input character in the sequence of input character images. The method further comprises applying a sequential classifier sequentially as a sliding window of a size of a plurality consecutive feature vectors upon the sequence of feature vectors from a first feature vector in the sequence of feature vectors to the last feature vector in the sequence of feature vectors; and recognizing an output character for a targeted feature vector among the applied-upon consecutive feature vectors within the sliding window as it is sliding across the sequence of feature vectors.

Abstract: Systems and methods which provide for accurate decoding of a received channel signal when station identifier information is unknown. Embodiments accurately decode a physical downlink control channel (PDCCH), such as to obtain downlink control information (DCI), without knowing radio network temporary identifier (RNTI) information. An unknown station identifier information (USII) of embodiments uses redundancy reduction-based error checking (performing error checking between data decoded from a candidate control channel data block containing redundant data and a portion of that candidate control channel data block containing redundancy reduced data) for implementing decoding when station identifier information is unknown. Embodiments of a USII decoder may use a power detection technique for identifying candidate control channel data blocks used in redundancy reduction-based error checking operation.

Abstract: A synchronizer generates cross-products of In-phase (I) and Quadrature (Q) samples and stores the sign bits for the sine and cosine cross-products. The sign bits are compared to a local reference of a frame-start bit-sequence and the compare results accumulated as I and Q correlations for symbol and half-symbol sampling. Linear combinations of the accumulated I and Q correlations for the symbol and half-symbol sampling generate linear combination results for frequency bins that peak at a different implied Carrier Frequency Offset (CFO) settings. The maximum of the linear combination results is selected and the implied CFO setting for that frequency bin is applied to a demodulator to adjust the receiver's CFO setting and bit synchronization. Computational complexity is reduced since only the sign bit of each cross-product is retained for correlation with the frame-start bit-sequence. Linear combinations can support a wide CFO range.

Abstract: A power device package includes a substrate, a high side power device, a low side power device and a driver device. The substrate includes a top surface, a bottom surface and a plurality of vias that extend through the substrate. The high side and low side power devices are disposed on the top surface of the substrate and connected with each other. The driver device is disposed on the bottom surface of the substrate and electrically connected with the high side and low side power devices through the vias to drive the high side and low side power devices in response to a control signal. The distance between the driver device and the high side and low side power devices is determined by the thickness of the substrate such that that a parasitic inductance between the driver device and the high side power device or the low side power device is reduced.

Abstract: A shielded Schottky heterojunction power transistor is made from a Silicon-Carbide (SiC) wafer with SiC epitaxial layers including a N+ source and a Silicon N-epitaxial layer under the gate with higher channel mobility than SiC. The bulk of the wafer is a N+ SiC drain contacted by backside metal. A trench is formed between heterojunction transistors. Metal contacting the N+ source is extended into the trench to form a Schottky diode with the N-SiC substrate. P+ taps on the sides of the trench connect the metal to a P-SiC body diode under the heterojunction gate, and also prevent the Schottky metal from directly contacting the P body diode. Buried P pillars with P+ pillar caps are formed under the trench Schottky diode and under the heterojunction transistors. The P pillars provide shielding by balancing charge with the N substrate, acting as dielectrics to reduce the E-field above the pillars.

Abstract: Systems and methods providing synchronization of wireless device data based upon device synchronization prioritization determinations are described. Embodiments may make device synchronization prioritization determinations using device grouping identifiers with respect to a plurality of wireless devices and/or one or more device synchronization parameters for the wireless devices. Logic of a synchronization prioritization gateway of embodiments may implement a prioritization determination algorithm to determine a sequence of wireless devices for data synchronization for facilitating data synchronization with respect to a plurality of wireless devices in a timely and efficient manner. The logic of the synchronization prioritization gateway may implement a priority penalty attribute with respect to particular wireless devices to address aberrant behavior or other operation likely to impede efficient and/or timely data synchronization.

Abstract: A panoramic video stream is compressed. Sinusoidal projection is performed on spherical input images to generate pseudo-cylindrical projection images. A lower-left region and a lower-right region of the image are cut and moved to upper corners of the rectangular bounding box around the pseudo-cylindrical projection image. These upper corners are non-effective areas of default dark pixels with no image pixels. A bottom one-third of the rows of pixels from the image that contained the moved regions are deleted, compressing the image by 33%. Default dark pixels in interface regions between the moved regions and the pseudo-cylindrical projection image are linear interpolated to provide gradual changes in pixel values across the remaining formerly non-effective regions, preventing encoding artifacts caused by abrupt changes in pixel values. Functions may be implemented using lookup tables.

Abstract: A silicon carbide diode that contains a silicon carbide substrate, a silicon carbide layer on top of the silicon carbide substrate, two first lower barrier metal portions disposed on the silicon carbide layer and separated from each other along a top surface of the silicon carbide layer, and a first higher barrier metal portion connected to the two lower barrier metal portions. The silicon carbide layer is thinner and having lower doping than the silicon carbide substrate. The first higher barrier metal portion is located between the two first lower barrier metal portions on the silicon carbide layer along a direction of the top surface of the silicon carbide layer. By reducing the leakage current at the junction barrier, the reverse breakdown voltage of the silicon carbide diode is significantly improved.

Abstract: Methods and systems which provide super-resolution synthesis based on weighted results from a random forest classifier are described. Embodiments apply a trained random forest classifier to low-resolution patches generated from the low-resolution input image to classify the low-resolution input patches. As each low-resolution patch is fed into the random forest classifier, each decision tree in the random forest classifier “votes” for a particular class for each of the low-resolution patches. Each class is associated with a projection matrix. The projection matrices output by the decision trees are combined by a weighted average to calculate an overall projection matrix corresponding to the random forest classifier output, which is used to calculate a high-resolution patch for each low-resolution patch. The high-resolution patches are combined to generate a synthesized high-resolution image corresponding to the low-resolution input image.

Abstract: A single-temperature-point temperature-sensitivity sensor assumes that all sensitivity lines converge at absolute zero temperature, so during calibration measurement is needed at only one temperature. A sensor output voltage is generated by current from a mirrored current source flowing through a variable resistor. During calibration, the resistance of the variable resistor and the mirror ratio of the mirrored current source are adjusted. An error amplifier compares voltages generated by unit currents generated by unit current sources to adjust the unit current sources and the mirrored current source. Each unit current flows through a grounded-base PNP transistor. A switchable PNP transistor is in parallel with one of the grounded-base PNP transistors and has its base switched on and off to adjust the PNP current for two measurements. The difference between the two measurements is compared to a calibration target to adjust the variable resistor and mirror ratio during calibration at a single temperature.

Abstract: The present disclosure relates to methods, devices, and systems for object recognition. For example, the systems, devices, and methods described herein may be used to recognize types, orientations and positions of objects, such as objects (e.g., planar industrial parts) in a bin picking industrial environment. In an aspect of the present disclosure, a system for object recognition may project first 3D point cloud surface data to a 2D representation data. The system may perform a matching operation to evaluate a 2D object pose of the 2D representation data and to match the 2D representation data to a 2D object template. After a match is identified, the system may project the 2D representation data to 3D space to obtain a coarse 3D object pose.

Abstract: A well-less Transient Voltage Suppressor (TVS) Silicon-Controlled Rectifier (SCR) has a P+ anode region that is not in an N-well. The P+ anode region 20 is surrounded by N+ isolation regions near the surface, and a deep N+ region underneath that is formed in a p-substrate. A N+ cathode region is formed in the p-substrate. The deep N+ region has a doping of 5×1018 to 5×1019/cm3, compared to a doping of 1×1016/cm3 for a typical N-well, or a doping of 1×1013 to 1×1015/cm3 for the p-substrate. The high doping in the deep N+ region causes a recombination current that can shunt half of the anode current. Since the deep N+ region is much shallower than an N-well, the sidewall capacitance is greatly reduced, allowing for higher speed applications.

Abstract: The invention provides an apparatus for inspecting a light transmissible optical component. The apparatus comprises an image capturing module arranged on a first side of a support configured to hold a light transmissible optical component whilst it is being inspected. The apparatus includes an illumination device configured to shape light from a light source and to illuminate a selected portion of a surface of said light transmissible optical component with said shaped light to enable the image capturing module to capture any of a bright field image, a dark field image, or a combined bright field and dark field image of the light transmissible optical component being held by the support.

Abstract: A wireless power transfer system with a class DE inverter for power transfer to a load. The wireless power transfer system includes a half-bridge circuit, a zero voltage switching (ZVS) tank, a shunt capacitor array, an evaluation circuit, and a controller. The half-bridge circuit has two transistors connected in series with each of the two transistors driven by a gate driving signal with a duty cycle. The ZVS tank and the shunt capacitor array are electrically connected with the half-bridge circuit. The ZVS tank includes two capacitors and an inductor. The shunt capacitor array has a capacitance that is tunable. The evaluation circuit calculates a power conversion efficiency of the system. The controller receives the power conversion efficiency from the evaluation circuit and generates control signals to adjust the duty cycle of the gate driving signal and to adjust the capacitance of the shunt capacitor array in order to maximize the power conversion efficiency of the system.

Abstract: A method of generating an electronic 3D walkthrough environment of a targeted environment, comprising: capturing a panorama at a first location point in the targeted environment; measuring an initial orientation of the camera whenever a panorama is captured; moving through the targeted environment and at each location point, capturing a live image of surrounding, and measuring an orientation of the camera; determining whether a new panorama is required to be captured at the current location point at where the camera is with the current orientation of the camera, comprising: identifying a sub-image in the panorama last captured that matches the live image captured; and if the sub-image cannot be identified, then a new panorama is required; and generating the electronic 3D walkthrough environment by connecting the panoramas captured.

Abstract: A silicon carbide chip array containing a silicon carbide substrate; a silicon carbide layer on top of the silicon carbide substrate; a first metal contact connected to the silicon carbide substrate; and two second metal contacts connected to the first portion and the second portion respectively. The silicon carbide layer is thinner and having lower doping than the silicon carbide layer. The silicon carbide layer includes a first portion and a second portion which are separate from each other. Each one of the second metal contacts forms a semiconductor device with the first metal contact. At least one of the first and second portions contains a side face which is inclined with respect to the silicon carbide substrate. Such a configuration enhances the breakdown voltage and reduces leakage current of the resultant silicon carbide diode array.

Abstract: Example embodiment is a power converter that adopt a 3D structure to increase the power density and improve thermal performance. The power converter includes a bottom substrate and at least one side substrate. Both the bottom substrate and the side substrate are rigid. Each side substrate is connected with the bottom substrate by a flexible substrate and forms an angle with the bottom substrate. The bottom substrate is further electrically connected with a plurality of surface mounting devices which are rigid. The flexible substrate provides electrical connection between the bottom substrate and the side substrate.

Abstract: Provided is a method of modifying a data path between a user equipment (UE) and a core network node (CNN) in a wireless communication network. The method comprises the steps of: at a network node handling both signalling messages and user data for an existing data path between said UE and said CNN, obtaining data uniquely associated with a data path resource for said UE and/or uniquely identifying said UE and mapping said data to said existing data path; and modifying said existing data path based on said mapping. The network node handling both signal messaging and user data for an existing data path may comprise a gateway (GW) connecting a source base station (SBS) and a target base station (TBS) to a Mobility Management Entity (MME) of the core network, said GW being configured to handle both user plane data and control plane data for a plurality of UEs.

Abstract: A method and a device for image inpainting on arbitrary surfaces in three-dimensional space are described for inpainting a region of a three-dimensional image utilizing a partial differential equation. The method includes obtaining a three-dimensional image on a surface S in three-dimensional space, and each point of the image includes an image point value and a position vector. The method includes locating an inpainting region D and generating an inpainting mask. The method further includes calculating image point values for points inside the inpainting region D and creating a second three-dimensional image to obtain an inpainted image. The present disclosure solves technical problems that previous methods do not work well on three-dimensional images on arbitrary surfaces and improves image inpainting technology.