Abstract: Disclosed is a method for fabricating capacitors for semiconductor devices. This method includes the steps of forming a lower electrode on an understructure of a semiconductor substrate, depositing an amorphous TaON thin film over the lower electrode, annealing the deposited amorphous TaON thin film in an NH3 atmosphere, and repeating the deposition of the amorphous TaON thin film and the annealing of the deposited amorphous TaON thin film at least one time, thereby forming a TaON dielectric film having a multi-layer structure, and forming an upper electrode over the TaON dielectric film. The TaON dielectric film having a multi-layer structure exhibits a dielectric constant that is superior to those of conventional dielectric films. Accordingly, the TaON dielectric film of the invention can be used for capacitors in next generation semiconductor memory devices of grade 256 MB and higher.

Abstract: An apparatus for increasing data transmission efficiency in an international mobile telecommunication-2000 (IMT-2000) base station controller includes a) user message determining unit for receiving a user message from an exterior; determining whether the user message is control data or traffic data; and transmitting the control data or the traffic data; b) channel interface unit for receiving the control data or the traffic data from the user message determining unit and transmitting the control data or the traffic data; c) traffic data controlling unit for receiving the traffic data and information about quantity of data and transmitting the traffic data; d) storage unit for storing the control data or the traffic data; and e)storage managing unit for measuring quantity of data stored in the storage means and transmitting measured quantity information.

Abstract: A method for automatically changing transmission power of a three-sector base station in a mobile communication system is disclosed. The mobile communication system includes a base station manager (BSM) and a base station having a base station control processor (BCP), a plurality of RF Up-converters and a memory. In the method for automatically changing the transmission power of three-sector base station in accordance with the present invention, the optimal transmission attenuation values for multiple CDMA channels in each sector are detected at the three-sector base station and set to the corresponding RF Up-converters. Therefore, the detection and setting of the optimal transmission attenuation values for multiple CDMA channels are simply performed, thereby reducing time and cost for the detection and setting. Also, in the present invention, the cell-plan device is not necessary, which reduces expense to detect the optimal transmission attenuation values.

Abstract: A handoff method of a mobile communications system, in case that a cell is defined by a sector, wherein a handoff request is made to a base station having a predetermined level of pilot signal strength by using a pilot signal strength of a base station which is in service, a predetermined threshold value and pilot signal strength of neighboring base stations, so that a handoff is to be performed or not is decided after detecting pilot signal strengths of a mobile station and a base station which has been already connected, controlling the handoff generation number while preventing unnecessary load.

Abstract: The present invention relates to a compound that is useful as an additive for improving post exposure delay stability in a photoresist composition, and a photoresist composition containing the same. In particular, it has been found that a compound of the formula: where A, R1 to R3 are defined herein, can efficiently prevent or reduce the phenomenon of a lack of pattern formation and T-topping resulting from post exposure delay (PED) by reducing influences of environmental amine compounds. PED is a disadvantage of alicyclic compounds used in the lithography process using light sources such as KrF, ArF, VUV, E-beam, ion beam and EUV.

Abstract: A capacitor for a semiconductor memory device includes a semiconductor substrate, an interlayer insulation film formed on the semiconductor substrate, having contact plugs filled with a conductive material; a diffusion barrier film formed on the interlayer insulation film including the contact plugs; a lower electrode formed on the diffusion barrier film; a dielectric film formed on the lower electrode; an upper electrode formed on the dielectric film; and a different type film formed adjacent to the upper electrode for applying a compressive stress to the dielectric film.

Abstract: A MOS transistor and a method for fabricating the MOS transistor which includes the forming a gate electrode containing an HLD film; etching the HLD film; etching a pad oxide film formed at a lower portion of the HLD film at a predetermined thickness; removing the nitride side wall spacer of an opening in the gate electrode; forming a LDD region by implanting impurity ions into the semiconductor substrate at both sides of the gate electrode; forming a side wall spacer at both sides of the gate electrode; and forming a source/drain by implanting impurity ions into the semiconductor substrate.

Abstract: A method for forming a dual gate of a semiconductor device includes the steps of sequentially stacking a gate insulating film, a semiconductor layer, and a low resistance metal layer on a semiconductor substrate having a first well of a first conductivity type and a second well of a second conductivity type, forming first and second gate patterns that include the semiconductor layer and the low resistance metal layer on the substrate corresponding to the first and second wells, forming sidewall spacers at sides of the first and second gate patterns, and exposing the first well and the first gate pattern, implanting impurity ions of the second conductivity type into the exposed first well and the first gate pattern to form a first source and a first drain, exposing the second well and the second gate pattern, implanting impurity ions of the first conductivity type into the exposed second well and the second gate pattern to form a second source and a second drain; and diffusing the impurity ions from the low re

Abstract: A semiconductor memory device is provided to reduce current consumption during a refresh operation by decreasing the number of wordlines activated at the same time, including a block set having a plurality of cell array blocks which are divided into a plurality of regions which employ wordlines independently from each other, row driving circuit to alternatively select the wordlines arranged each in the regions, and column driving circuit to activate columns of the cell arrays involved in the wordlines selected by the row driving circuit.

Abstract: The present invention relates generally to a method of manufacturing a semiconductor device. There is disclosed a method of manufacturing a semiconductor device capable of obtaining a higher static capacity and a lower leak current characteristic. According to the present invention, the method includes forming a lower electrode and forming a tantalum oxide film. In particular, it performs a plasma process during the process of forming the tantalum oxide film, and in the last step of forming the tantalum oxide firm it controls the amount of source fluid to form a tantalum oxy-nitride film, thus forming an upper electrode.

Abstract: A method for preparing a slurry for a chemical mechanical polishing process for a semiconductor device includes putting an organic matter in a solvent, preparing a solution by adding a dispersant to the solvent having the organic matter, hydrolyzing the solution, stirring the solution, and heating the solution. A slurry embodying the present invention has relatively small hydrate particles having a hardness lower than oxide particles, and the particles will remain dispersed in a solution for a longer period of time than background art slurries.

Abstract: There is disclosed a method of manufacturing a semiconductor device capable of preventing two electrodes from being short.

Abstract: The present invention provides a method for fabricating a ferroelectric memory device capable of preventing formation of an oxide layer between a BST layer and a storage node electrode with using a general electrode that is easy to etch, as a storage node electrode. The method comprises the steps of: forming successively a barrier layer and a metal layer for storage node electrode on the intermetal insulating layer; forming a storage node electrode by patterning the metal layer for storage node electrode and the barrier layer to be contact with the contact plug; depositing a ferroelectric layer on the storage node electrode and the intermetal insulating layer at a temperature that the storage node electrode is not oxidized; crystallizing the ferroelectric layer; and forming a plate electrode on the ferroelectric layer, wherein the ferroelectric layer is deposited at temperature of 100˜400° C. according to the MOCVD method.

Abstract: A voltage generator is disclosed which has a charge pump unit including a pump transistor for performing a charge pumping operation by a pump control signal from a ring oscillator and a precharge transistor for performing a charge precharge operation by a precharge control signal from the ring oscillator. The voltage generator additionally has a controller which provides a new back-bias control signal by combining the pump control signal from the ring oscillator with the precharge control signal from the ring oscillator and controls a threshold voltage of the precharge transistor with the back-bias control signal.

Abstract: An internal voltage fall-down circuit includes a reference voltage generating section for variably generating an optimum reference voltage level of which is compensated for depending on changes in the present reference voltage before fuse blowing, a reference voltage transforming section for receiving the reference voltage from the reference voltage generating section and then transforming the reference voltage into voltage for a normal mode or a stress mode which are presently set, and a driver section for providing a signal from the reference voltage transforming section to an internal circuit as an internal supply voltage.

Abstract: Signal transmission and reception device for a new wiring system, is disclosed, in which a plurality of different signals are transmitted at a time between a plurality of function blocks in an integrated circuit through one signal transmission line, for reducing area occupied by wiring, including one signal transmission line fitted between the function blocks for transmission of signals, a driving circuit for receiving signals from the function blocks through a plurality of internal signal lines, converting combinations of transitions of the signals into encoded signals, and providing the encoded signal to the signal transmission line, and a reception circuit for receiving the encoded signal transmitted from the driving circuit through the signal transmission line, decoding the encoded signal into the original plurality of signals, and providing the original plurality of signals to another plurality of function blocks through a plurality of internal signal lines.

Abstract: In an input buffer device for a printer using a first-in-first-out (FIFO) which can improve the data processing speed of a printer by receiving data from a host computer and processing the data by several bytes in a central processing unit (CPU) of the printer, and data input method, the input buffer device for a printer adopts an FIFO for generating an interrupt to the CPU for each input time of a predetermined byte unit of data, so that the performance of the CPU is improved by several times, the load of the CPU is prevented and the data processing speed is improved, thereby improving the overall system performance.

Abstract: A method of bypassing vocoders in a digital mobile communication system, comprising the step of appending bypass mode data to data transmitted from a plurality of mobile stations, the bypass mode data instructing the vocoders not to perform encoding/decoding operations, and the step of transmitting the resultant data. According to the present invention, the unnecessary encoding/decoding operations are omitted for a mobile to mobile communication. Therefore, the present invention has the effect of removing the delay time and enhancing the voice quality.

Abstract: The present invention discloses a structure of a transistor in a semiconductor device and a method of manufacturing the same.The present invention manufactures a high voltage transistor by etching a silicon substrate to a depth deeper than that of the field oxide film by a self-aligned wet etching process using the field oxide film as a mask and, thereafter, by forming the first gate electrode which electrically switches ON and OFF between the source region and the drain region by using a gate electrode mask and simultaneously forming a second gate electrode to prevent a junction breakdown below the bird's beak of the field oxide film.Accordingly, the present invention can improve the degree of integration of the device by forming a gate electrode to prevent a junction breakdown below the bird's beak of the field oxide film.

Abstract: A method of bypassing vocoders in a digital mobile communication system, comprising the step of appending bypass mode data to data transmitted from a plurality of mobile stations, the bypass mode data instructing the vocoders not to perform encoding/decoding operations, and the step of transmitting the resultant data. According to the present invention, the unnecessary encoding/decoding operations are omitted for a mobile to mobile communication. Therefore, the present invention has the effect of removing the delay time and enhancing the voice quality.