Patents Assigned to Ibiden Co., Ltd.
  • Publication number: 20240251510
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer, a second conductor layer, and a via conductor formed in an opening of the insulating layer and connecting the first conductor and second conductor layers. The second conductor layer and via conductor include a seed layer having a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface in the opening, and a third portion formed on a portion of the first conductor layer exposed by the opening. A thickness of the first portion is greater than a thickness of the second portion and a thickness of the third portion. The seed layer includes a first layer including an alloy including copper, aluminum and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium, and a second layer formed on the first layer and including copper.
    Type: Application
    Filed: January 24, 2024
    Publication date: July 25, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Jun SAKAI, Kyohei YOSHIKAWA
  • Publication number: 20240243049
    Abstract: A wiring substrate includes a first build-up part including first insulating layers and conductor layers, a second build-up part laminated to the first part and including second insulating layers and conductor layers, and via conductors including first via conductors in the first insulating layers and second via conductors in the second insulating layers. The first part is positioned closer to first surface side of the substrate than the second part. The first conductor layers include wirings having wiring width and inter-wiring distance that are smaller than wiring width and inter-wiring distance of wirings in the second conductor layers. The first insulating layers include resin and inorganic particles including first particles forming inner wall surfaces in through holes and second particles embedded in the first insulating layers having different shapes from the first particles. Each first conductor layers and via conductors includes a metal film layer and a plating film layer.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 18, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Jun SAKAI, Takuya INISHI
  • Publication number: 20240244762
    Abstract: A wiring substrate includes a core substrate having a cavity penetrating through the substrate, an electronic component accommodated in the cavity such that the component is positioned closer to a first surface of the substrate than a second surface of the substrate, a sealing resin filling the cavity of the substrate such that the sealing resin is covering a surface of the component on a second surface side of the substrate and that the cavity of the substrate has a portion not filled with the sealing resin on the second surface side of the substrate, and resin insulating layers including a first resin insulating layer laminated on the first surface of the substrate and a second resin insulating layer laminated on the second surface of the substrate such that a portion of the second resin insulating layer is filling the portion of the cavity not filled with the sealing resin.
    Type: Application
    Filed: January 11, 2024
    Publication date: July 18, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Nobuhisa KURODA, Naoya MURAKAMI
  • Patent number: 12041729
    Abstract: A printed wiring board includes an insulating substrate, a first conductor layer formed on a first surface of the substrate, a second conductor layer formed on a second surface of the substrate, and through-hole conductors formed through the substrate and connecting the first and second conductor layers. The substrate has openings formed such that each opening extends from the first to second surfaces of the substrate, and magnetic material filling the openings and forming through holes such that each through hole extends from the first to second surfaces of the substrate, the through-hole conductors are formed on sidewalls of the through holes in the magnetic material, and the magnetic material includes resin and particles including magnetic metal such that the particles include a group of particles forming the sidewalls of the through holes and that each particle in the group has a substitution plating film formed on a surface thereof.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: July 16, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Patent number: 12040671
    Abstract: A motor coil substrate includes a flexible substrate, and coils formed on the flexible substrate. The flexible substrate is wound N times where N is 2 or larger, the coils are formed in a multiple of 3, the flexible substrate includes a first flexible substrate and a second flexible substrate extending from the first flexible substrate and wound around the first flexible substrate, the flexible substrate has a first end and a second end on an opposite side with respect to the first end such that the first flexible substrate has a first end of the flexible substrate, the second flexible substrate is positioned on an outer side of the first flexible substrate, and the coils are formed such that a coil or coils formed on the first flexible substrate partially overlap with a coil or coils formed on the second flexible substrate.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: July 16, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Haruhiko Morita, Hitoshi Miwa, Shinobu Kato, Toshihiko Yokomaku, Hisashi Kato, Takahisa Hirasawa, Tetsuya Muraki, Takayuki Furuno
  • Publication number: 20240234326
    Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Ikuya TERAUCHI, Shogo FUKUI, Ryo ANDO, Keisuke SHIMIZU
  • Publication number: 20240237221
    Abstract: A method for manufacturing a wiring substrate includes forming conductor pads on a surface of an insulating layer, positioning, on or in the insulating layer, an electronic component having electrode pads, forming a second insulating layer covering the surface of the insulating layer, conductor pads and electronic component, forming first via holes exposing the conductor pads, applying a first desmear treatment to the second insulating layer such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the electrode pads of the electronic component positioned on or in the insulating layer, applying a second desmear treatment to the second insulating layer such that residues are removed from the second via holes, forming first via conductors in the first via holes, and forming second via conductors in the second via holes.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Shogo FUKUI, Ryo ANDO, Keisuke SHIMIZU
  • Publication number: 20240237201
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer and including a signal wiring, and a via conductor formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The resin insulating layer has an opening such that the opening is exposing a portion of the first conductor layer and that the via conductor is formed in the opening of the resin insulating layer, and the resin insulating layer includes inorganic particles and resin such that the resin is forming the surface of the resin insulating layer.
    Type: Application
    Filed: March 27, 2024
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Susumu KAGOHASHI, Maaya TOMIDA
  • Publication number: 20240237203
    Abstract: A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part formed on the first part and including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer has a surface on the opposite side with respect to the first insulating layer such that the arithmetic mean roughness of the surface is smaller than that of a surface of the second conductor layer on the opposite side with respect to the second insulating layer. The second part is positioned closer to the outermost surface of the substrate than the first part.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Keisuke SHIMIZU, Fumio NISHIWAKI, Ryoya KIMURA
  • Publication number: 20240237231
    Abstract: A method for manufacturing a wiring substrate includes forming first conductor pads and second conductor pads having a shorter inter-pad distance than the first conductor pads, forming a second insulating layer covering the first conductor pads and the second conductor pads, forming first via holes exposing the first conductor pads, applying a first desmear treatment such that residues are removed from the first via holes, forming second via holes in the second insulating layer after the first desmear treatment such that the second via holes expose the second conductor pads, applying a second desmear treatment such that residues are removed from the second via holes, forming first via conductors in the first via holes such that the first via conductors are formed on the first conductor pads, and forming second via conductors in the second via holes such that the second via conductor are formed on the second conductor pads.
    Type: Application
    Filed: October 19, 2023
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventor: Ikuya TERAUCHI
  • Publication number: 20240237204
    Abstract: A wiring substrate includes a first wiring part including a first insulating layer and a first conductor layer laminated on the first insulating layer, and a second wiring part including a second insulating layer and a second conductor layer laminated on the second insulating layer. The thickness of the second insulating layer is smaller than that of the first insulating layer. The thickness of the second conductor layer is smaller than that of the first conductor layer. The first conductor layer includes first wirings including differential wirings having the minimum wiring width of larger than 5 ?m and minimum inter-wiring distance of larger than 7 ?m. The second conductor layer includes second wirings having the maximum wiring width of 5 ?m or less and the maximum inter-wiring distance of 7 ?m or less. The second part is positioned closer to the outermost surface of the substrate than the first part.
    Type: Application
    Filed: January 10, 2024
    Publication date: July 11, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Keisuke SHIMIZU, Fumio NISHIWAKI, Ryoya KIMURA
  • Patent number: 12031471
    Abstract: A mat material having a sufficiently high initial compression surface pressure is provided. The mat material of the present disclosure includes inorganic fibers; and an inorganic binder and an organic binder attached to the inorganic fibers, wherein the mat material has an initial compression surface pressure of 900 kPa or more as measured when compressed to a bulk density of 0.50 g/cm3.
    Type: Grant
    Filed: September 27, 2023
    Date of Patent: July 9, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Toshiyuki Maeda, Takayuki Kawabe
  • Patent number: 12033927
    Abstract: A method for manufacturing a wiring substrate includes forming multiple conductor pads on an insulating layer such that the conductor pads include multiple first conductor pads and multiple second conductor pads, forming multiple protruding parts on surfaces of the first conductor pads of the conductor pads, respectively, forming a resin layer such that the resin layer covers the insulating layer and the conductor pads, exposing, from the resin layer, end portions of the protruding parts on the opposite side with respect to the insulating layer, forming, in the resin layer, multiple openings such that the openings expose surfaces of the second conductor pads of the conductor pads, respectively; and forming a coating film on the surfaces of the second conductor pads exposed in the openings.
    Type: Grant
    Filed: June 29, 2021
    Date of Patent: July 9, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Isao Ohno, Tomoya Daizo, Yoji Sawada, Kazuhiko Kuranobu
  • Patent number: 12034141
    Abstract: A heat-insulating sheet for a battery pack is interposed between battery cells of the battery pack in which the battery cells are connected in series or in parallel. The heat-insulating sheet for the battery pack contains a first particle made from a silica nanoparticle and a second particle made from a metal oxide. A content of the first particle is 60 mass % or more and 95 mass % or less relative to a total mass of the first particle and the second particle.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: July 9, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Hisashi Ando, Naoki Takahashi
  • Publication number: 20240223038
    Abstract: A coil substrate includes a flexible substrate, and a coil including a first wiring formed on a first surface of the flexible substrate and a second wiring formed on a second surface of the flexible substrate on the opposite side with respect to the first surface. The flexible substrate is formed to be wound around an axis extending in an orthogonal direction orthogonal to a longitudinal direction of the flexible substrate such that the flexible substrate is formed into a cylindrical shape, and the coil is formed such that the first wiring has a first orthogonal part extending along the orthogonal direction, that the second wiring has a second orthogonal part extending along the orthogonal direction, and that at least one of the first orthogonal part and the second orthogonal part has at least one slit formed along the orthogonal direction.
    Type: Application
    Filed: March 15, 2024
    Publication date: July 4, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Takahisa HIRASAWA, Takayuki FURUNO
  • Patent number: 12028988
    Abstract: A printed wiring board includes an insulating layer, a conductor layer formed on the insulating layer and including one or more conductor circuits, an insulating adhesive layer covering a surface of the conductor layer and a part or parts of the insulating layer exposed from the conductor layer, and a resin insulating layer formed on the insulating layer and the conductor layer such that the insulating adhesive layer is sandwiched between the conductor layer and the resin insulating layer. The insulating adhesive layer includes a first portion covering an upper surface of the one or more conductor circuits and a second portion covering a side surface of the one or more conductor circuits and a thickness of the first portion is greater than a thickness of the second portion.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: July 2, 2024
    Assignee: IBIDEN CO., LTD.
    Inventor: Takuya Inishi
  • Patent number: 12027451
    Abstract: A wiring substrate includes an insulating layer, a conductor layer formed on the insulating layer and including a conductor pad, and a solder resist layer formed on the insulating layer such that the solder resist layer has an opening entirely exposing an upper surface and a side surface of the conductor pad. The conductor layer is formed such that the conductor pad has a pad body extending along a surface of the insulating layer, and a protective layer covering an upper surface and a side surface of the pad body and including material different from material of the pad body, and the pad body of the conductor pad has a notch part formed at a peripheral edge portion of the pad body such that the notch part separates a lower surface of the pad body and the surface of the insulating layer and is filled with the protective layer.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: July 2, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Shuhei Goto, Satoru Kawai
  • Patent number: 12020843
    Abstract: An inductor built-in substrate includes a core substrate having an opening and a first through hole formed therein, a magnetic resin filling the opening of the core substrate and having a second through hole formed therein, a first through-hole conductor including a metal film formed in the first through hole of the core substrate, and a second through-hole conductor including a metal film formed in the second through hole of the magnetic resin. The magnetic resin includes a resin material and magnetic particles such that the metal film of the second through-hole conductor is in contact with the magnetic particles.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: June 25, 2024
    Assignee: IBIDEN CO., LTD.
    Inventors: Satoru Kawai, Yasuki Kimishima
  • Publication number: 20240203891
    Abstract: A wiring substrate includes a first build-up part including first insulating layers, first conductor layers formed on the first insulating layers, and first via conductors formed in the first insulating layers, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers formed on the second insulating layers, and second via conductors formed in the second insulating layers. A wiring width and an inter-wiring distance of wirings in the first conductor layers of the first build-up part are smaller than a wiring width and an inter-wiring distance of wirings in the second conductor layers of the second build-up part, and the first build-up part is formed such that the first insulating layers include insulating resin and inorganic particles and that the insulating resin in the first insulating layers forms the surfaces of the first insulating layers covered by the first conductor layers.
    Type: Application
    Filed: December 19, 2023
    Publication date: June 20, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA, Susumu KAGOHASHI
  • Publication number: 20240206061
    Abstract: A wiring substrate includes an insulating layer including a first layer and a second layer, and a conductor layer including a metal film formed on a surface of the second layer of the insulating layer such that the conductor layer includes a conductor pattern. The first layer includes resin and first inorganic particles, the second layer includes resin and second inorganic particles at the content rate that is lower than the content rate of the first inorganic particles in the first layer, and the thickness of the first layer is 90% or more of the thickness of the insulating layer. The second layer of the insulating layer includes a composite layer having the thickness in the range of 0.1 to 0.3 ?m, and the composite layer includes part of the metal film in the conductor layer formed in gaps between the second inorganic particles and resin in the second layer.
    Type: Application
    Filed: December 13, 2023
    Publication date: June 20, 2024
    Applicant: IBIDEN CO., LTD.
    Inventors: Ryo ANDO, Nobuhisa KURODA, Shogo FUKUI, Kosei ICHIKAWA, Makoto KATO