Patents Assigned to Ibiden Co., Ltd.
  • Publication number: 20230413429
    Abstract: A wiring substrate includes a resin insulating layer, and a conductor layer formed on the resin insulating layer and including a seed layer and a metal film formed on the seed layer such that the conductor layer has wiring patterns including wirings. The conductor layer is formed such that each of the wirings in the wiring patterns has undercut parts on side surfaces extending to the resin insulating layer, and the wirings in the conductor layer include outer wirings formed such that each of the outer wirings has the undercut part on the side surface facing an adjacent one of the wirings is smaller than the undercut part on the side surface farther from the adjacent one of the wirings.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 21, 2023
    Applicant: IBIDEN CO., LTD.
    Inventor: Atsushi DEGUCHI
  • Publication number: 20230403789
    Abstract: A wiring substrate includes an insulating layer, and a conductor layer including a wiring formed on the insulating layer. The wiring in the conductor layer has a first section and a second section formed such that a wiring width in the second section is smaller than a wiring width in the first section and that a wiring thickness in the second section is larger than a wiring thickness in the first section.
    Type: Application
    Filed: May 30, 2023
    Publication date: December 14, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Hiroki WAKAMORI, Ikuya TERAUCHI, Takahiro YAMADA
  • Publication number: 20230397335
    Abstract: A wiring substrate includes an insulating layer, a first conductor layer formed on the insulating layer and including a first wiring and a second wiring formed adjacent to the first wiring, and a second conductor layer on the opposite side with respect to first conductor layer such that the insulating layer is covering the second conductor layer. The first conductor layer is formed such that each of the first wiring and the second wiring has an aspect ratio in the range of 2.0 to 4.0 and a wiring width of 5 ?m or less and that the first wiring and the second wiring are separated by the distance of 7 ?m or less, and the first conductor layer includes a seed layer formed on the insulating layer, and an electrolytic plating film formed on the seed layer.
    Type: Application
    Filed: May 26, 2023
    Publication date: December 7, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Toshiki FURUTANI, Masashi KUWABARA
  • Publication number: 20230380422
    Abstract: The objective of the invention is to provide a plant activator with superior plant growth-promoting effect and low toxicity and soil contamination. A plant activator comprising, as an active ingredient, a hydroxy fatty acid derivative of general formula (I) and/or (II): HOOC—(R1)—CH(OH)—CH(OH)—CH?CH—CH(OH)—R2??(I), HOOC—(R1)—CH(OH)—CH?CH—CH(OH)—CH(OH)—R2??(II), (wherein, R1 is a straight or branched hydrocarbon group with 4 to 12 carbon atoms, optionally comprises one or more double bonds and/or OH groups, and the position of the double bond is not limited, provided that the double bond is comprised, and R2 is a straight or branched hydrocarbon group with 2 to 8 carbon atoms, optionally comprises one or more double bonds and/or OH groups, and the position of the double bond is not limited, provided that the double bond is comprised) or a salt or an ester thereof.
    Type: Application
    Filed: May 7, 2021
    Publication date: November 30, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Katsuya OHNO, Tomohiro NOHARA, Kumiko TAKADA
  • Patent number: 11832397
    Abstract: A printed wiring board includes a resin insulating layer, via conductors formed in the resin insulating layer, metal posts formed on the via conductors, respectively, and a solder resist layer formed on the resin insulating layer such that the metal posts have lower portions embedded in the solder resist layer and upper portions exposed from the solder resist layer, respectively. The metal posts are formed such that each of the metal posts has a top portion having a diameter in a range of 0.8 to 0.9 times a diameter of a respective one of the lower portions of the metal posts.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: November 28, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Masashi Awazu, Keisuke Kojima
  • Publication number: 20230380055
    Abstract: A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that a tensile strength of the first insulating layer is higher than a tensile strength of each insulating layer other than the first insulating layer in the first build-up part, and the covering layer is formed such that the covering layer has opening entirely exposing an upper surface and a side surface of the first conductor pad.
    Type: Application
    Filed: April 26, 2023
    Publication date: November 23, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Masataka KATO, Shunsuke SAKAI, Masahide TAWATARI, Kosuke IKEDA
  • Publication number: 20230380076
    Abstract: A wiring substrate includes a core substrate, a build-up part formed on a surface of the substrate and including insulating layers and conductor layers, and a covering insulating layer formed on the build-up part such that the covering layer is covering the outermost surface of the build-up part. The build-up part is formed such that the insulating layers include a first insulating layer forming the outermost one of the insulating layers, that the conductor layers include a first conductor layer formed on the first insulating layer and including a first conductor pad, and that an elongation rate of the first insulating layer is greater than an elongation rate of each insulating layer other than the first insulating layer in the build-up part, and the covering layer is formed such that the covering layer has an opening entirely exposing an upper surface and a side surface of the first conductor pad.
    Type: Application
    Filed: April 26, 2023
    Publication date: November 23, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Masataka KATO, Shunsuke SAKAI, Masahide TAWATARI, Kosuke IKEDA
  • Patent number: 11792925
    Abstract: A printed wiring board includes a first resin insulating layer, a second resin insulating layer formed on a surface of the first layer, and a conductor layer formed on the surface of the first layer such that the second layer is covering the conductor layer and that the conductor layer includes first, second, third, fourth, fifth, and sixth circuits such that the third and fourth circuits are sandwiching the first circuit and that the fifth and sixth circuits are sandwiching the second circuit. Widths between the first and third circuits and between the first and fourth circuits are 5 ?m to 14 ?m, and when a width between the second and fifth circuits and a width between the second and sixth circuits is 20 ?m or more, the upper surface of the first circuit, and the upper surface and side walls of the second circuit are formed to have unevenness.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: October 17, 2023
    Assignee: IBIDEN CO., LTD.
    Inventor: Kyohei Yoshikawa
  • Patent number: 11792929
    Abstract: A wiring substrate includes a first insulating layer, a first conductor layer, a second insulating layer, a second conductor layer, a connection conductor penetrating through the second insulating layer and connecting the first and second conductor layers, and a coating film formed on a surface of the first conductor layer such that the coating film is adhering the first conductor layer and the second insulating layer. The first conductor layer includes a conductor pad and a wiring pattern such that the conductor pad is in contact with the connection conductor and the wiring pattern is covered by the coating film, the conductor pad of the first conductor layer has a surface facing the second insulating layer and having a first surface roughness higher than a surface roughness of a surface of the wiring pattern, and the coating film has opening such that the opening is exposing the conductor pad entirely.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: October 17, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Takema Adachi, Daisuke Minoura
  • Patent number: 11789063
    Abstract: A conduction inspection jig includes a first member having first openings, a second member having second openings and formed to be positioned above the first member, a third member formed to be positioned between the first member and the second member such that the third member forms a space between the first member and the second member and at least substantially surrounds the space, and a probe formed to pass through one of the first openings and one of the second openings such that the probe extends through the space formed between the first member and the second member.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: October 17, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Takayuki Mori, Taishi Takeda
  • Patent number: 11792937
    Abstract: A component built-in wiring substrate includes a first insulating layer, a first conductor layer formed on a first surface of the first insulating layer and including a component mounting pad, a second conductor layer formed on a second surface of the first insulating layer on the opposite side with respect to the first surface, via conductors formed in the first insulating layer such that the via conductors are connecting the second conductor layer and the component mounting pad of the first conductor layer, a second insulating layer formed on the first insulating layer and having a component accommodating portion penetrating through the second insulating layer such that the component mounting pad is positioned at bottom of the accommodating portion, and an electronic component positioned in the accommodating portion of the second insulating layer such that the electronic component is mounted on the component mounting pad of the first conductor layer.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: October 17, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Takahiro Yamada, Seiji Izawa, Katsuyuki Sano
  • Publication number: 20230328882
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the resin insulating layer, and a via conductor formed in an opening formed in the resin insulating layer such that the via conductor is connecting the first conductor layer and the second conductor layer. The via conductor is formed such that the via conductor includes a seed layer covering an inner wall surface of the resin insulating layer inside of the opening and an electrolytic plating layer formed on the seed layer such that the seed layer has a plurality of columnar parts grown in columnar shapes.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 12, 2023
    Applicant: IBIDEN CO., LTD.
    Inventor: Susumu KAGOHASHI
  • Publication number: 20230319986
    Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the insulating layer, and a via conductor formed in an opening formed in the insulating layer such that the via conductor is connecting the first and second conductor layers. The second conductor layer and via conductor include a seed layer and an electrolytic plating layer formed on the seed layer such that the seed layer has a first portion formed on the surface of the insulating layer, a second portion formed on an inner wall surface of the insulating layer in the opening, and a third portion formed on the first conductor layer exposed from the opening and that the first portion has a thickness that is greater than a thickness of the second portion and a thickness of the third portion.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 5, 2023
    Applicant: IBIDEN CO., LTD.
    Inventor: Susumu KAGOHASHI
  • Publication number: 20230319987
    Abstract: A printed wiring board includes a first conductor layer, an insulating layer formed on the first conductor layer, a second conductor layer formed on a surface of the insulating layer and including a conductor circuit, and a via conductor formed in an opening formed in the insulating layer and connecting the first and second conductor layers. The second conductor layer and via conductor include a seed layer and an electrolytic plating layer formed on the seed layer such that the seed layer has a first layer and a second layer formed on the first layer, the first layer has a width greater than a width of the second layer in cross section of the conductor circuit in the second conductor layer and that the electrolytic plating layer has a width greater than the width of the first layer in cross section of the conductor circuit in the second conductor layer.
    Type: Application
    Filed: March 28, 2023
    Publication date: October 5, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Jun SAKAI, Shiho SHIMADA
  • Publication number: 20230309244
    Abstract: A method for manufacturing a printed wiring board includes forming a first conductor layer, forming an adhesive layer including a nitrogen-based organic compound and covering a surface of the first layer, forming a resin insulating layer covering the adhesive layer and having the second surface facing the first conductor layer, forming a protective film on the first surface of the insulating layer, forming an opening in the insulating layer such that the opening penetrates through the insulating layer and reaches the adhesive layer, applying plasma to the opening of the insulating layer such that the plasma cleans an inside of the opening, removing the protective film from the insulating layer after cleaning the inside of the opening, forming a second conductor layer on the first surface of the insulating layer, and forming a via conductor in the opening such that the via conductor connects the first layer and second layer.
    Type: Application
    Filed: March 23, 2023
    Publication date: September 28, 2023
    Applicant: IBIDEN CO., LTD.
    Inventor: Atsushi ISHIDA
  • Patent number: 11763975
    Abstract: An inductor built-in substrate includes a core substrate having an opening, a magnetic resin body having a through hole and including a magnetic resin filled in the opening of the core substrate, and a plating film formed in the through hole of the magnetic resin body and including an electrolytic plating film such that the electrolytic plating film is formed in contact with the magnetic resin body.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: September 19, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Hiroaki Kodama, Atsushi Ishida, Kazuro Nishiwaki
  • Publication number: 20230292448
    Abstract: A printed wiring board includes an insulating layer, a first conductor layer formed on the insulating layer, an adhesive layer formed on the first conductor layer, a resin insulating layer formed on the insulating layer such that the adhesive layer is formed between the first conductor layer and the resin insulating layer, and a second conductor layer formed on the resin insulating layer. The first conductor layer is formed such that the first conductor layer has a smooth upper surface and a smooth side surface and that the adhesive layer has a smooth film formed on the smooth upper and side surfaces, and a protruding part protruding from the smooth film.
    Type: Application
    Filed: March 10, 2023
    Publication date: September 14, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Kentaro WADA, Koji KONDO
  • Patent number: 11756721
    Abstract: A planar transformer includes a coil substrate including a flexible substrate and multiple coils formed on the flexible substrate. The coil substrate is formed to have coil parts and coilless parts such that the coil parts have the coils and that the coilless parts do not have the coils, and the coil substrate is folded such that at least one of the coilless parts is sandwiched between two of the coil parts.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: September 12, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Haruhiko Morita, Hitoshi Miwa, Shinobu Kato, Toshihiko Yokomaku, Hisashi Kato, Takahisa Hirasawa, Tetsuya Muraki, Takayuki Furuno
  • Publication number: 20230284380
    Abstract: A wiring substrate includes a core substrate including a core insulating layer, a first conductor layer, a second conductor layer, a first insulating layer, a second insulating layer, a third conductor layer, and a fourth conductor layer. The first conductor layer includes first land and first plane parts, the second conductor layer includes second land and second plane parts, the third conductor layer includes fine wirings and a third plane part, the fourth conductor layer includes fine wirings and a fourth plane part, the substrate includes a through-hole conductor connecting the first and second land parts through the core insulating layer, a first via conductor connecting the first land part and third conductor layer, a second via conductor connecting the second land part and fourth conductor layer, a third via conductor connecting the first and third plane parts, and a fourth via conductor connecting the second and fourth plane parts.
    Type: Application
    Filed: January 31, 2023
    Publication date: September 7, 2023
    Applicant: IBIDEN CO., LTD.
    Inventors: Kiyoteru OTOMI, Katsutoshi ITO
  • Patent number: 11749596
    Abstract: A wiring substrate includes a conductor pad, an insulating layer formed on the conductor pad such that the insulating layer is covering the conductor pad and has a through hole, a bump formed on the conductor pad such that the bump is formed in the through hole penetrating through the insulating layer. The conductor pad is formed such that the conductor pad has a connecting surface connected to the bump, a concave part formed on the connecting surface of the conductor pad to the bump, and a convex part formed in the concave part.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: September 5, 2023
    Assignee: IBIDEN CO., LTD.
    Inventors: Katsuyuki Sano, Yoji Sawada