Patents Assigned to IBM Corporation
  • Patent number: 10336206
    Abstract: Systems, methods, and other embodiments associated with identifying a user of a charging station. According to one embodiment, a system includes a communication logic and an authorization logic. The communication logic aggregates transaction data to an authorizing entity. The transaction data is associated with a user and a chargeable vehicle. The authorization logic receives an authorization request to authorize a transaction between the chargeable vehicle and the charging station. The authorization logic sends a response to the authorization request. The communication also enables the chargeable vehicle to receive a charge from the charging station based on the response to the authorization request.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: July 2, 2019
    Assignees: HONDA MOTOR CO., LTD., IBM CORPORATION
    Inventors: Robert Uyeki, Charles Bradford Vincent, Xiao Song Ran, David Wong Cun, Richard Asato, Thomas Clay Luthy
  • Patent number: 10259907
    Abstract: The present invention relates to a novel block copolymer of structure 1, wherein, A- is a block polymer chain, B is a block polymer chain, wherein, A- and B- are chemically different, covalently connected polymer chains, which are phase separable and the moiety X(Y(Z)b)a is a junction group, which comprises a surface active pendant moiety Y(Z)b wherein: a is an integer from 1 to 4 denoting the number of surface active pendant moieties Y(Z)b on X, b is an integer from 1 to 5 denoting the number of Z moieties on the linking moiety Y, X is a linking group between the A polymer block, the B polymer block and the moiety Y, Y is a linking group or a direct valence bond between X and Z; and Z is a moiety independently selected from, a fluorine containing moiety, a Si1-Si8 siloxane containing moiety or a hydrocarbon moiety with at least 18 carbons, and further wherein the junction group X(Y(Z)b)a has a surface energy less than that that of the block A and less than that of the block B.
    Type: Grant
    Filed: February 20, 2015
    Date of Patent: April 16, 2019
    Assignees: AZ Electronic Materials (Luxembourg) S.à r.l., IBM Corporation
    Inventors: Ankit Vora, Eri Hirahara, Joy Cheng, Durairaj Baskaran, Orest Polishchuk, Melia Tjio, Margareta Paunescu, Daniel Sanders, Guanyang Lin
  • Patent number: 10141424
    Abstract: Method of manufacturing a structure with semiconducting bars suitable for forming one at least one transistor channel, including the following steps: a) make a semiconducting structure, composed of an alternation of first bars based on a first material and second bars based on a second material, the second material being a semiconducting material, then b) remove exposed portions of the structure based on the first material through an opening in a mask formed on the structure, the removal being made by selective etching in the opening of the first material relative to the second material, so as to expose a space around the second bars, then c) grow a given semiconducting material (25) around the second bars (6c) in the opening, the given semiconducting material having a mesh parameter different from the mesh parameter of the second material (7) so as to induce a strain on the sheaths based on the given semiconducting material.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: November 27, 2018
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, IBM CORPORATION
    Inventors: Remi Coquand, Emmanuel Augendre, Nicolas Loubet, Shay Reboh
  • Publication number: 20170345915
    Abstract: Method of manufacturing a structure with semiconducting bars suitable for forming one at least one transistor channel, including the following steps: a) make a semiconducting structure, composed of an alternation of first bars based on a first material and second bars based on a second material, the second material being a semiconducting material, then b) remove exposed portions of the structure based on the first material through an opening in a mask formed on the structure, the removal being made by selective etching in the opening of the first material relative to the second material, so as to expose a space around the second bars, then c) grow a given semiconducting material (25) around the second bars (6c) in the opening, the given semiconducting material having a mesh parameter different from the mesh parameter of the second material (7) so as to induce a strain on the sheaths based on the given semiconducting material.
    Type: Application
    Filed: May 24, 2017
    Publication date: November 30, 2017
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, IBM CORPORATION
    Inventors: Remi COQUAND, Emmanuel AUGENDRE, Nicolas LOUBET, Shay REBOH
  • Publication number: 20140173243
    Abstract: A method for managing memory operations includes reading a first memory page from a storage device responsive to a request for the first memory page. The first memory page is stored to a system memory. Based on a pre-established set of association rules, one or more associated memory pages are identified that are related to the first memory page. The associated memory pages are read from the storage device and compressed to generate corresponding compressed associated memory pages. The compressed associated memory pages are also stored to the system memory to enable faster access to the associated memory pages during processing of the first memory page. The compressed associated memory pages are individually decompressed in response to the particular page being required for use during processing.
    Type: Application
    Filed: February 28, 2013
    Publication date: June 19, 2014
    Applicant: IBM Corporation
    Inventors: SARAVANAN DEVENDRAN, Kiran Grover
  • Publication number: 20140115585
    Abstract: A method, system and computer program product for optimizing memory usage associated with duplicate string objects in a Java virtual machine. The method comprises scanning a heap of the Java virtual machine at the end of the start-up process of the virtual machine to identify duplicate strings associated with the virtual machine, storing the identified strings in a string cache file, and determining whether a new string that needs to be created during start-up already exists in the string cache file. The duplicate strings are added to an interned strings table. A reference to a duplicate string is returned if a string to be created is already in the string cache file.
    Type: Application
    Filed: December 20, 2013
    Publication date: April 24, 2014
    Applicant: IBM CORPORATION
    Inventors: Curtis E. HRISCHUK, Andrew Russell LOW, Peter Duncan SHIPTON, John Joseph STECHER
  • Publication number: 20140082272
    Abstract: A method for controlling memory refresh operations in dynamic random access memories. The method includes determining a count of deferred memory refresh operations for a first memory rank. Responsive to the count approaching a high priority threshold, issuing an early high priority refresh notification for the first memory rank, which indicates the pre-determined time for performing a high priority memory refresh operation at the first memory rank. Responsive to the early high priority refresh notification, the behavior of a read reorder queue is dynamically modified to give priority scheduling to at least one read command targeting the first memory rank, and one or more of the at least one read command is executed on the first memory rank according to the priority scheduling. Priority scheduling removes these commands from the re-order queue before the refresh operation is initiated at the first memory rank.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 20, 2014
    Applicant: IBM Corporation
    Inventors: Mark A. Brittain, John S. Dodson, Stephen Powell, Eric E. Retter, Jeffrey A. Stuecheli
  • Publication number: 20140082357
    Abstract: A method provides cross enterprise communication in which intermediary communication components carry out cross enterprise communication. The method at a first sending enterprise comprises: receiving a signed encrypted message from a sender within a first enterprise; validating the sender; decrypting the message; encrypting the message for receipt by a second enterprise; signing the encrypted message by the first enterprise; and sending the re-signed re-encrypted message to a second enterprise. The method at the second receiving enterprise comprises: receiving a signed encrypted message from a first enterprise; validating that the first enterprise is the sender; decrypting the message; encrypting the message for receipt by one or more recipients at the second enterprise; signing the encrypted message by the second enterprise indicating that the message is from the first enterprise; and sending the re-signed re-encrypted message to the one or more recipients of the second enterprise.
    Type: Application
    Filed: February 28, 2013
    Publication date: March 20, 2014
    Applicant: IBM Corporation
    Inventors: Alan James Chatt, Christopher Colin Paice, Cyril Peter Stewart
  • Publication number: 20140052926
    Abstract: A system for managing memory operations. The system includes a processor executing instructions that cause the processor to read a first memory page from a storage device responsive to a request for the first memory page and store the first memory page to system memory. Based on a pre-established set of association rules, one or more associated memory pages are identified that are related to the first memory page. The associated memory pages are read from the storage device and compressed to generate corresponding compressed associated memory pages. The compressed associated memory pages are also stored to the system memory to enable faster access to the associated memory pages during processing of the first memory page. The compressed associated memory pages are individually decompressed in response to the particular page being required for use during processing.
    Type: Application
    Filed: August 20, 2012
    Publication date: February 20, 2014
    Applicant: IBM CORPORATION
    Inventors: Saravanan Devendran, Kiran Grover
  • Publication number: 20140012808
    Abstract: A method and system for distributing tasks from an external application among concurrent database application server instances in a database system for optimum load balancing, based on consensus among the instances. Each application instance identifies a task partition ownership by those in a membership group based on a time window and generates a new membership group and partition ownership based on the current partition ownership. The instance makes the new membership group and partition ownership known to other members by recoding them in the membership table and partition map. Each participation by an instance in the membership group is identified by a random number. The new membership group and partition ownership are generated and adjusted based on an average partition allocation to achieve consensus among the instances.
    Type: Application
    Filed: September 3, 2013
    Publication date: January 9, 2014
    Applicant: IBM CORPORATION
    Inventors: Bruce Gilbert LINDSAY, Roger C. RAPHAEL, Paul Sherwood TAYLOR
  • Publication number: 20130332501
    Abstract: A fused multiply-adder is disclosed. The fused multiply-adder includes a Booth encoder, a fraction multiplier, a carry corrector, and an adder. The Booth encoder initially encodes a first operand. The fraction multiplier multiplies the Booth-encoded first operand by a second operand to produce partial products, and then reduces the partial products into a set of redundant sum and carry vectors. The carry corrector then generates a carry correction factor for correcting the carry vectors. The adder adds the redundant sum and carry vectors and the carry correction factor to a third operand to yield a final result.
    Type: Application
    Filed: June 11, 2012
    Publication date: December 12, 2013
    Applicant: IBM Corporation
    Inventors: Maarten J. Boersma, Klaus Michael Kroener, Christophe J. Layer, Silvia M. Mueller
  • Patent number: 8586478
    Abstract: An improved method of making interconnect structures with self-aligned vias in semiconductor devices utilizes sidewall image transfer to define the trench pattern. The sidewall height acts as a sacrificial mask during etching of the via and subsequent etching of the trench, so that the underlying metal hard mask is protected. Thinner hard masks and/or a wider range of etch chemistries may thereby be utilized.
    Type: Grant
    Filed: March 20, 2012
    Date of Patent: November 19, 2013
    Assignees: Renesas Electronics Corporation, IBM Corporation
    Inventors: Eiichi Soda, Yunpeng Yin, Sivananda Kanakasabapathy
  • Publication number: 20130305197
    Abstract: A computer-implemented method includes a processor identifying, within the netlist, at least one strongly connected components (SCCs) that has a reconvergent fanin input with at least two input paths from the reconvergent fanin input having a different propagation delay to the SCC. The method then computes an additive diameter for the netlist comprising at least one SCC, where the additive diameter includes a fanin additive diameter determined based on a propagation delay difference of the at least two input paths to a SCC and a number of complex feed-forward components within at least one input path. In response to the reconvergent fanin input to the SCC providing a binate function, the method computes a multiplicative diameter for the SCC utilizing a least common multiple (LCM) derived from one or more propagation delay differences across each reconvergent fanin input leading to the SCC.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 14, 2013
    Applicant: IBM CORPORATION
    Inventors: Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony
  • Publication number: 20130290918
    Abstract: A computer-implemented method simplifies a netlist, verifies the simplified netlist using induction, and remaps resulting inductive counterexamples via inductive trace lifting within a multi-algorithm verification framework. The method includes: a processor deriving a first unreachable state information that can be utilized to simplify the netlist; performing a simplification of the netlist utilizing the first unreachable state information; determining whether the first unreachable state information can be inductively proved on an original version of the netlist; and in response to the first unreachable state information not being inductively provable on the original netlist: projecting the first unreachable state information to a minimal subset; and adding the projected unreachable state information as an invariant to further constrain a child induction process.
    Type: Application
    Filed: April 25, 2012
    Publication date: October 31, 2013
    Applicant: IBM Corporation
    Inventors: Jason R. Baumgartner, Robert L. Kanzelman, Hari Mony
  • Publication number: 20130290666
    Abstract: Management of a UNIX-style storage pools is enhanced by specially managing one or more memory management inodes associated with pinned and allocated pages of data storage by providing indirect access to the pinned and allocated pages by one or more user processes via a handle, while preventing direct access of the pinned and allocated pages by the user processes without use of the handles; scanning periodically hardware status bits in the inodes to determine which of the pinned and allocated pages have been recently accessed within a pre-determined period of time; requesting via a callback communication to each user process to determine which of the least-recently accessed pinned and allocated pages can be either deallocated or defragmented and compacted; and responsive to receiving one or more page indicators of pages unpinned by the user processes, compacting or deallocating one or more pages corresponding to the page indicators.
    Type: Application
    Filed: June 26, 2013
    Publication date: October 31, 2013
    Applicant: IBM CORPORATION
    Inventors: Mathew Accapadi, Grover C. Davidson, II, Dirk Michel, Bret R. Olszewski
  • Publication number: 20130254165
    Abstract: In a Virtual Input/Output (I/O) Server (VIOS) partition within a data processing system that comprises cluster-aware VIOSes, a method includes: performing, via a backup/restore utility of a cluster aware (CA) operating system (OS) executing on a processor resource of the first VIOS partition, a backup operation on the first VIOS partition, which creates a first configuration backup file having configuration information about the hardware, logical and virtual devices of the VIOS partition; storing the configuration backup file within local storage; and responsive to receipt of a VIOS restore command: retrieving the configuration backup file from the local storage; and restoring the configuration of the hardware, logical and virtual devices of the first VIOS to a state that existed at a time at which the backup operation creating the configuration backup file was performed.
    Type: Application
    Filed: September 15, 2012
    Publication date: September 26, 2013
    Applicant: IBM Corporation
    Inventors: James A. Pafumi, Chintamani Praksh Siddeshwar, Rupesh Kumar Thota, Vasu Vallabhaneni
  • Publication number: 20130254776
    Abstract: A method efficiently dispatches/completes a work element within a multi-node, data processing system that has a global command queue (GCQ) and at least one high latency node. The method comprises: at the high latency processor node, work scheduling logic establishing a local command/work queue (LCQ) in which multiple work items for execution by local processing units can be staged prior to execution; a first local processing unit retrieving via a work request a larger chunk size of work than can be completed in a normal work completion/execution cycle by the local processing unit; storing the larger chunk size of work retrieved in a local command/work queue (LCQ); enabling the first local processing unit to locally schedule and complete portions of the work stored within the LCQ; and transmitting a next work request to the GCQ only when all the work within the LCQ has been dispatched by the local processing units.
    Type: Application
    Filed: September 15, 2012
    Publication date: September 26, 2013
    Applicant: IBM CORPORATION
    Inventors: Benjamin G. Alexander, Gregory H. Bellows, Joaquin Madruga, Barry L. Minor
  • Publication number: 20130212330
    Abstract: A memory system and data processing system for controlling memory refresh operations in dynamic random access memories. The memory controller comprises logic that: tracks a time remaining before a scheduled time for performing a high priority, high latency operation a first memory rank of the memory system; responsive to the time remaining reaching a pre-established early notification time before the schedule time for performing the high priority, high latency operation, biases the re-order queue containing memory access operations targeting the plurality of ranks to prioritize scheduling of any first memory access operations that target the first memory rank. The logic further: schedules the first memory access operations to the first memory rank for early completion relative to other memory access operations in the re-order queue that target other memory ranks; and performs the high priority, high latency operation at the first memory rank at the scheduled time.
    Type: Application
    Filed: February 13, 2012
    Publication date: August 15, 2013
    Applicant: IBM Corporation
    Inventors: Mark A. Brittain, John S. Dodson, Stephen J. Powell, Eric E. Retter, Jeffrey A. Stuecheli
  • Publication number: 20130159649
    Abstract: A method for mirroring virtual machines from a primary host to a secondary host. The method includes tracking changes for each of a plurality of memory pages and processor states for one or more primary host virtual machines. Responsive to an occurrence of a checkpoint, the primary host virtual machines are stopped. A determination is made if each of the memory pages is frequently changed. In response to the memory page being frequently changed, the frequently changed memory page is marked as being writeable and copied to a buffer. In response to the memory page being infrequently changed, the infrequently changed memory page is marked as being read only. The one or more primary host virtual machines are resumed. A copy of the memory pages, the buffer and changes to the processor states are transmitted to the secondary host.
    Type: Application
    Filed: September 15, 2012
    Publication date: June 20, 2013
    Applicant: IBM CORPORATION
    Inventors: David Sherwood, Robert J. Wallis
  • Publication number: 20130103384
    Abstract: A method for intercepting an application prompt before it reaches the user interface, wherein the application prompt has been transmitted from the computer application and intended to reach the user interface. The method also includes translating the intercepted application prompt from a source language to a target user language, and in response to translating the intercepted application prompt, transmitting the translated application prompt to the user interface. The method also includes intercepting, in response to the application prompt, user input from the user interface, wherein the user input is intended to reach the computer application. The method also includes translating the user input from the target language to the source language, and in response to translating the intercepted application prompt, transmitting the translated user input to the computer application.
    Type: Application
    Filed: April 15, 2012
    Publication date: April 25, 2013
    Applicant: IBM CORPORATION
    Inventors: Graham Hunter, Ian McCloy