Abstract: The invention is directed to a self-correcting modular-redundancy-memory device, comprising three bistable-memory elements and a majority voter. The bistable-memory elements receive respective binary data signal, clock signal, and a feedback signal. Each of the bistable-memory elements is configured, in response to the clock signal assuming a first value, to provide a binary output signal with an output-signal value correlated to a data-signal value of the data signal, and in response to the clock signal assuming a second clock-signal value, to provide the output signal with the output-signal value indicative of a current feedback-signal value of the feedback signal. The majority voter receives the output signals each of the bistable-memory elements and is configured to provide the feedback signal with the feedback-signal value indicative of that output-signal value taken on by a majority of the currently received output signals.

Abstract: A method and system for oversampling a waveform with variable oversampling factor is suggested. The method and for dynamic selection of the oversampling factor are based on a modified equivalent time sampling approach. Multiple waveforms are transmitted, which are separated by a variable delay. The method permits that a receiver selects a different oversampling factor for the received waveform. As a result the method and system provide for oversampling a waveform with a variable, dynamically selectable oversampling factor.

Abstract: A junction transistor, comprising, on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer, characterized in that the collector barrier layer is a compositionally graded material layer, which has an electron affinity that decreases in a direction pointing from the base layer to the collector layer.

Abstract: A digital polar modulator (DPM) for transforming a baseband signal into a modulated digital modulator output signal comprises an input unit and two low-pass delta-sigma modulators, a first one being connected downstream from the first input part and configured to provide at its output a first pulse train in dependence on an amplitude- modulating baseband signal component, and a second one being connected downstream from the second input part and configured to provide at its output a multilevel quantized signal in dependence on a phase modulating baseband signal component; a multiphase generator, which is configured to provide a set of square-wave carrier signals having a common carrier frequency and exhibiting discrete phase shifts with respect to each other; a multiplexer, which is configured to provide a multiplexer output signal that is formed by switching, in dependence on a signal received at a select input as a function of time, between selected ones of the carrier signals; and a combiner unit.

Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.

Abstract: A reactor arrangement for layer deposition on a plurality of substrates (hereafter substrates) comprising a first reactor chamber for simultaneous cleaning the substrates, at least one second reactor chamber for depositing at least one layer on each of the substrates, a first heating device for setting the substrate temperature of the substrates in the first reactor chamber, a second heating device for setting the substrate temperature of the substrates in the second reactor chamber, a device for producing a gas atmosphere of predetermined composition and predetermined pressure, a transport device for transporting the substrates simultaneously from the first to the second reactor chamber, and a control device for controlling the heating devices and device for producing the gas atmosphere in such a way that the substrates are moved or stored in an interruption-free manner in a reducing gas atmosphere as long as the substrate temperature is above critical temperature Tc.

Abstract: A semiconductor device, comprising a substrate layer made of a semiconductor material of a first conductivity type and having a first insulation region, and a vertical bipolar transistor having a first vertical portion of a collector made of monocrystalline semiconductor material of a second conductivity type and disposed in an opening of the first insulation region, a second insulation region lying partly on the first vertical portion of the collector and partly on the first insulation region and having an opening in the region of the collector, in which opening a second vertical portion of the collector made of monocrystalline material is disposed, said portion including an inner region of the second conductivity type, a base made of monocrystalline semiconductor material of the first conductivity type, a base connection region surrounding the base in the lateral direction, a T-shaped emitter made of semiconductor material of the second conductivity type and overlapping the base connection region, wherein t

Abstract: A thermoelectric semiconductor component, comprising an electrically insulating substrate surface and a plurality of spaced-apart, alternating p-type (4) and n-type semiconductor structural elements (5) which are disposed on said surface and which are connected to each other in series in an electrically conductive manner alternatingly at two opposite ends of the respective semiconductor structural elements by conductive structures, in such a way that a temperature difference (2?T) between the opposite ends produces an electrical voltage between the conductive structures or that a voltage difference between the conductive structures (7, 9; 13, 15) produces a temperature difference (2?T) between the opposite ends, characterized in that the semiconductor structural elements have a first boundary surface between a first and a second silicon layer, the lattice structures of which are considered ideal and are rotated by an angle of rotation relative to each other about a first axis perpendicular to the substrate su

Abstract: A method for fabricating an electronic component, comprising providing a substrate; and depositing a graphene layer; wherein the substrate is either provided with a van-der-Waals functional layer or a van-der-Waals functional layer is deposited on the substrate before depositing the graphene layer; a surface step contour is formed; and growth of the graphene layer is seeded at the step contour.

Abstract: The present invention relates to a protocol accelerator module for a data transmission protocol level of a transceiver, particularly but not exclusively for rapid forwarding of data packets in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The invention also relates to a method of transceiver operation for rapid forwarding of data packets, likewise particularly, but not exclusively, in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The core of the invention is a reference table which stores references from identifiers of second transceivers to identifiers of third transceivers as well as references from specific messages to identifiers of third transceivers. A transceiver can check during reception of a data packet whether it is a data packet to be forwarded, and can take appropriate precautions for rapid sending of a data packet to be forwarded.

Abstract: A hot hole transistor with a graphene base comprises on a substrate an emitter layer, a collector layer, and a base layer that comprises a graphene layer, wherein an emitter barrier layer is arranged between the base layer and the emitter layer, and a collector barrier layer is arranged between the base and the collector layers and adjacent to the graphene layer.

Abstract: A cryptography device which reduces side channel information including a first computing block adapted to either encrypt or decrypt received first input data and to output the encrypted or decrypted first input data as first output data at a first data output, a second computing block adapted to either encrypt or decrypt received second input data and to output the encrypted or decrypted second input data as second output data at a second data output, and a control unit connected to the first and second computing blocks and adapted in a first operating condition on the one hand to partially or completely assign the first output data to the first computing block as the first input data and on the other hand to completely or partially assign the first output data to the second computing block as part of the second input data.

Abstract: A cryptography device which reduces side channel information including a first computing block adapted to either encrypt or decrypt received first input data and to output the encrypted or decrypted first input data as first output data at a first data output, a second computing block adapted to either encrypt or decrypt received second input data and to output the encrypted or decrypted second input data as second output data at a second data output, and a control unit connected to the first and second computing blocks and adapted in a first operating condition on the one hand to partially or completely assign the first output data to the first computing block as the first input data and on the other hand to completely or partially assign the first output data to the second computing block as part of the second input data.

Abstract: A light emitting semiconductor device according the invention includes an SOI substrate, a collector and an injector. The SOI substrate includes a carrier layer, a buried oxide layer on the carrier layer, and a doped silicon layer structure with a conductivity type. The doped silicon layer structure with the conductivity type includes at least two silicon- or silicon germanium layers arranged adjacent to one another, wherein a dislocation network is configured in their interface portions at which dislocation network a radiative charge carrier combination with a light energy is provided, which light energy is smaller than a band gap energy of the silicon- or silicon germanium layers. The collector is formed as a pn-junction in a portion between the dislocation network and a surface of the silicon layer structure that is oriented away from the carrier layer, and wherein the injector is configured as a metal insulator semiconductor diode.

Abstract: A method for producing a MEMS component including the steps of simultaneously embedding structure elements during producing the multi-level conductive path layer stack which structure elements are to be subsequently exposed, subsequently producing a recess that extends from a substrate backside to the multi-level conductive path layer stack, exposing the micromechanical structure elements in the multi-level conductive path layer stack through the recess. In order to increase process precision a reference mask for defining a lateral position or a lateral extension of the micromechanical structure elements to be exposed is produced, wherein the reference mask is either arranged on the substrate front side between the substrate and the multi-level conductive path layer stack or in a layer of the multi-level conductive path layer stack which layer is more proximal to the substrate than the structure element to be exposed.

Abstract: An MEMS component including a monolithically integrated electronic component with a multi-plane conductor track layer stack which is arranged on a substrate and into which is integrated a cantilevered elastically movable metallic actuator which is arranged in the multi-plane conductor track layer stack at the level of a conductor track plane and is connected by via contacts to conductor track planes which are arranged thereabove or therebeneath and which apart from an opening in the region of the actuator are separated from the conductor track plane of the actuator by a respective intermediate plane insulator layer, wherein the actuator is formed from a metallically conductive layer or layer combination which is resistant to corrosive liquids or gases and which contains titanium nitride or consists of titanium nitride.

Abstract: A semiconductor component including a first integrated circuit in a substrate which is adapted to produce electrical signals with a high-frequency signal component, wherein the substrate is such that the high-frequency signal component can propagate on a substrate surface and/or in the substrate interior, a second integrated circuit in the same substrate which is such that its function can be compromised by high-frequency signals, and a countersignal circuit in the same substrate which is adapted to deliver an electrical countersignal which at least at a selected location of the substrate surface and/or the substrate interior attenuates or eliminates the high-frequency electrical signal component emanating from the first integrated circuit, wherein the countersignal circuit includes a receiver which is adapted to produce an electrical signal dependent on the instantaneous field strength of the high-frequency signal component, and a shielding transistor provided in the substrate and having a control electrode

Abstract: The invention relates to an upstream unit (1) for a switched power amplifier (2) for a high-frequency transmission circuit (16). The upstream unit (1) supplies a pulse-length modulated HF pulse signal (22) to the switched power amplifier (2), wherein the linearity of the pulse length modulation and of the high-frequency transmission circuit is improved. The upstream unit (1) according to the invention has a first signal input (3) for a high-frequency, phase-modulated first input signal (18), a second signal input (4) for a second input signal (19) having a low frequency in comparison with the first input signal, a controllable first delay unit (5), a controllable second delay unit (7), a pulse generator (9) and a control unit (10).

Abstract: The present invention relates to a protocol accelerator module for a data transmission protocol level of a transceiver, particularly but not exclusively for rapid forwarding of data packets in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The invention also relates to a method of transceiver operation for rapid forwarding of data packets, likewise particularly, but not exclusively, in wireless sensor networks using the time-division multiple access method according to the IEEE 802.15.4 standard. The core of the invention is a reference table which stores references from identifiers of second transceivers to identifiers of third transceivers as well as references from specific messages to identifiers of third transceivers. A transceiver can check during reception of a data packet whether it is a data packet to be forwarded, and can take appropriate precautions for rapid sending of a data packet to be forwarded.

Abstract: The present invention relates to a device (2000) and a method for encoding an input signal (102) into a digital pulse-width and/or phase modulated output signal (162). The present invention also relates to a transmission method, a power amplifier and a transmitter. With the aid of a mapping process comprising at least three-stages, a sequence of output pulses (162) is generated which corresponds on average over time to a theoretical, previously computed target pulse. In this way, the device (2000) or the method can be digitally implemented and a large part (100, 110) of the device (2000) can also be operated at a clock rate that is substantially lower than a clock rate of the output signal generator (200, 220).