Abstract: A CMOS-compatible DMOS transistor can be designed by virtue of a suitable layout configuration optionally for very high drain voltages or for power amplification at very high frequencies and which can be produced at a low level of additional cost in comparison with a conventional sub-?m production technology for CMOS circuits. A gate insulator of the transistor is of a unitary thickness under a control gate in the entire (active) region through which current flows. A zone of increased doping concentration (well region) which is near the surface and which determines the transistor threshold voltage is so arranged under the control gate that it occupies the entire area under the control gate which is on the active region and ends within a so-called drift space between the control gate and a highly doped drain region. The entire surface of the drift space is covered by a zone of the conductivity type of the drain region (VLDD), which is lowly doped in comparison with the highly doped drain region.

Abstract: A voltage-controlled oscillator device with an LC-resonant circuit, in particular for implementing integrated voltage-controlled oscillators for the lower GHz range, is disclosed. The device achieves continuous frequency tunability in a wide range in particular with a low level of phase noise and phase jitter. In the voltage-controlled oscillator, a second inductor can be periodically switched in parallel and/or in series with at least one first inductor of the LC-resonant circuit by way of a switching means actuated with the oscillator frequency. A control input of the switching means is connected to a variable dc voltage. In that respect the relationship of the duration of the conducting state and the duration of the non-conducting state of the switching means is variable within an oscillation period of the oscillator in dependence on the value of the control voltage.

Abstract: A silicon-germanium hetero bipolar transistor comprising a silicon collector layer, a boron-doped silicon-germanium base layer, a silicon emitter layer and an emitter contact area. The transistor is fabricated using an epitaxy process on a surface of pure silicon. An electrically inert material is incorporated into the epitaxial layers in order to link the defects in the semiconductor structure and to reduce the outdiffusion of the dopant. Thus, a transistor for high-frequency applications can be fabricated in two ways: to increase the dopant dose of the base region or to reduce the thickness of the base layer. In particular, an implantation or doped region having a T-shaped cross section profile is provided between the emitter layer and the emitter contact area.