Abstract: A method for enabling communication between a network element (NE) operating at a bit rate R1 and a NE operating at a bit rate R2 is disclosed. A ratio of R2 to R1 is represented by a ratio M:N, where M and N are positive integers and M>N. Information is received that is associated with distribution of electrical lanes of at least one of a number of M×K NEs operating at bit rate R1. A distribution of the electrical lanes of the at least one M×K NE based on the received information is determined. The electrical lanes of the at least one M×K NE are interconnected with lane ports of at least one M:N electrical interface of N×K transceivers based on the determined distribution. An indication is transmitted identifying the distribution to the at least one M×K NE.

Abstract: A system and method are provided for network proxying. The network proxying may occur in a node of a fabric or across nodes in the fabric. In the network proxying, the node has a processor with a low power mode and the system remaps, by a management processor of the node, a port identifier for a processor that is in a low power mode to the management processor. The management processor then processes a plurality of packets that contain the port identifier for the processor that is in the low power mode to maintain a network presence of the node.

Abstract: A system for a system and method for provisioning of modular compute resources within a system design are provided.

Abstract: A processing system to reduce energy consumption and improve performance in a processor, controlled by compiler inserted information ahead of a selected branch instruction, to statically expose and control how the prediction should be completed and which mechanism should be used to achieve energy and performance efficiency.

Abstract: A data center security system and method are provided that leverage server systems on a chip (SOCs) and/or server fabrics. In more detail, server interconnect fabrics may be leveraged and extended to dramatically improve security within a data center.

Abstract: A performance and power optimized computer system architecture and method leveraging power optimized tree fabric interconnect are disclosed. One embodiment builds low power server clusters leveraging the fabric with tiled building blocks while another embodiment implements storage solutions or cooling solutions. Yet another embodiment uses the fabric to switch non-Ethernet packets, switch multiple protocols for network processors and other devices.

Abstract: A method for enabling communication between a network element (NE) operating at a bit rate R1 and a NE operating at a bit rate R2 is disclosed. A ratio of R2 to R1 is represented by a ratio M:N, where M and N are positive integers and M>N. Information is received that is associated with distribution of electrical lanes of at least one of a number of M×K NEs operating at bit rate R1. A distribution of the electrical lanes of the at least one M×K NE based on the received information is determined. The electrical lanes of the at least one M×K NE are interconnected with lane ports of at least one M:N electrical interface of N×K transceivers based on the determined distribution. An indication is transmitted identifying the distribution to the at least one M×K NE.

Abstract: A system and method are provided that support a routing using a tree-like or graph topology that supports multiple links per node, where each link is designated as an Up, Down, or Lateral link, or both, within the topology. The system may use a segmented MAC architecture which may have a method of re-purposing MAC IP addresses for inside MACs and outside MACs, and leveraging what would normally be the physical signaling for the MAC to feed into the switch.

Abstract: A computer system and method of operation thereof are provided that allow interactive navigation and exploration of logical processes. The computer system employs a data architecture comprising a network of nodes connected by branches. Each node in the network represents a decision point in the process that allows the user to select the next step in the process and each branch in the network represents a step or a sequence of steps in the logical process. The network is constructed directly from the target logical process. Navigation data such as image frame sequences, stages in the logical process, and other related information are associated with the elements of the network. This establishes a direct relationship between steps in the process and the data that represent them. From such an organization, the user may tour the process, viewing the image sequences associated with each step and choosing among different steps at will.

Abstract: A system and method for provisioning of modular compute resources within a system design are provided. In one embodiment, a node card or a system board may be used.

Abstract: A data center security system and method are provided that leverage server systems on a chip (SOCs) and/or server fabrics. In more detail, server interconnect fabrics may be leveraged and extended to dramatically improve security within a data center.

Abstract: Implementations of discovery functionalities in accordance with the present invention are characterized by being exceptionally minimalistic. A primary reason and benefit for such minimalistic implementations relate to these discovery functionalities being implemented via a management processor and associated resources of a system on a chip (SoC) unit as opposed to them being implemented on data processing components of a cluster of nodes (i.e., central processing core components). By focusing on such a minimalist implementation, embodiments of the present invention allow discovery functionalities to be implemented on a relatively low-cost low-power management processor coupled to processing cores that provide for data serving functionality in the cluster of nodes.

Abstract: A method for enabling network elements (NEs) operating at a bit rate R1 to communicate with NEs operating at a bit rate R2 is described. A ratio of R2 to R1 is represented by a ratio M:N, M and N are positive integers, and M>N.

Abstract: A system and a method render internet multimedia content in a network using an application to render the internet multimedia content and/or locally stored multimedia content on one or more rendering devices in the network. The application may provide web browser functions, such as, for example, receiving, processing, decoding and/or rendering the internet multimedia content. The application may have an enhanced user interface which may enable a user to select the internet multimedia content and a rendering device in the network, send the internet multimedia content to the rendering device and/or control rendering of the internet multimedia content on the rendering device.

Abstract: User-submitted content (e.g., stories) may be associated with descriptive metadata (intersection metadata), such as a timeframe, location, tags, and so on. The user-submitted content may be browsed and/or searched using the descriptive metadata. Intersection criteria comprising a prevailing timeframe, a location, and/or other metadata criteria may be used to identify an intersection space comprising one or more stories. The stories may be ordered according to relative importance, which may be determined (at least in part) by comparing story metadata to the intersection criteria.

Abstract: A processing system to reduce energy consumption and improve performance in a processor, controlled by compiler inserted information ahead of a selected branch instruction, to statically expose and control how the prediction should be completed and which mechanism should be used to achieve energy and performance efficiency.

Abstract: A multi-protocol personality module enabling load/store from remote memory, remote Direct Memory Access (DMA) transactions, and remote interrupts, which permits enhanced performance, power utilization and functionality. In one form, the module is used as a node in a network fabric and adds a routing header to packets entering the fabric, maintains the routing header for efficient node-to-node transport, and strips the header when the packet leaves the fabric. In particular, a remote bus personality component is described. Several use cases of the Remote Bus Fabric Personality Module are disclosed: 1) memory sharing across a fabric connected set of servers; 2) the ability to access physically remote Input Output (I/O) devices across this fabric of connected servers; and 3) the sharing of such physically remote I/O devices, such as storage peripherals, by multiple fabric connected servers.

Abstract: A data processing node has an inter-node messaging module including a plurality of sets of registers each defining an instance of a GET/PUT context and a plurality of data processing cores each coupled to the inter-node messaging module. Each one of the data processing cores includes a mapping function for mapping each one of a plurality of user level processes to a different one of the sets of registers and thereby to a respective GET/PUT context instance. Mapping each one of the user level processes to the different one of the sets of registers enables a particular one of the user level processes to utilize the respective GET/PUT context instance thereof for performing a GET/PUT action to a ring buffer of a different data processing node coupled to the data processing node through a fabric without involvement of an operating system of any one of the data processing cores.

Abstract: A system and a method receive broadcast multimedia on a mobile device. The system and the method may use a broadcast receiver accessory that may connect to a mobile device. The system and the method may have a bidirectional data connection between the broadcast receiver accessory and the mobile device. The broadcast receiver accessory may translate, reformat and/or repackage content into a form that may be viewed on the mobile device. The broadcast receiver accessory may have a tuner component, an application processor, an audio rendering element and/or memory.

Abstract: Disclosed are various embodiments related to stacked memory devices, such as DRAMs, SRAMs, EEPROMs, ReRAMs, and CAMs. For example, stack position identifiers (SPIDs) are assigned or otherwise determined, and are used by each memory device to make a number of adjustments. In one embodiment, a self-refresh rate of a DRAM is adjusted based on the SPID of that device. In another embodiment, a latency of a DRAM or SRAM is adjusted based on the SPID. In another embodiment, internal regulation signals are shared with other devices via TSVs. In another embodiment, adjustments to internally regulated signals are made based on the SPID of a particular device. In another embodiment, serially connected signals can be controlled based on a chip SPID (e.g., an even or odd stack position), and whether the signal is an upstream or a downstream type of signal.