Patents Assigned to In-System Design, Inc.
  • Patent number: 6252375
    Abstract: The current augmentation method is for use with a computer powered peripheral subsystem including a dynamic load, the dynamic load requiring greater power, from time to time, than the specified power available from the computer and specified interconnect bus or interface. This method includes use of a power node supplying power as necessary from the battery to the dynamic load, such that the varying dynamic load does not exceed the specified power available from the computer and interconnect bus. The method includes monitoring the load current, and injecting current into the power node to augment the current drive capability of the computer and peripheral bus. Preferably, the injecting is performed selectively based upon the result of the monitoring, e.g. only when the sensed load current is approaching a defined threshold level. Further, battery charging is performed only when it is determined that no current is being drawn through the battery to avoid distorting the voltage reading.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: June 26, 2001
    Assignee: In-System Design, Inc.
    Inventors: Ronald J. Richter, Scott A. DeHart
  • Patent number: 6252576
    Abstract: A hybrid bilinear scaling (Qscale) scheme produces output images that have comparable quality to traditional bilinear interpolation algorithms, but requires a less complex hardware implementation. The Qscale system does not reverse-map output pixels back to arbitrary locations in the input space as defined by the mapping function. Rather all pixel values and locations are calculated after all of the original input pixels are mapped to the output. That is, all of the original image pixels are used “as-is” in the resultant scaled image. New pixels are generated from the original input pixels to meet the desired output pixel dimensions. Because only new pixels are computed, the Qscale system is less computationally complex. The computational requirements are further reduced because new pixels are computed between original pixel pairs meaning only two pixels are involved in the computation. Coefficients can be chosen to be fractional powers of two (0.5, 0.25, 0.
    Type: Grant
    Filed: August 6, 1998
    Date of Patent: June 26, 2001
    Assignee: In-System Design, Inc.
    Inventor: James R. Nottingham
  • Patent number: 6233640
    Abstract: A Universal Serial Bus to parallel bus bridge includes a Universal Serial Bus port that receives a serial bit stream of data and commands in a Universal Serial Bus protocol from a USB host computer. A parallel bus port on the bridge includes parallel port registers and state machines coupled to a peripheral device. A USB controller core is coupled between the Universal Serial Bus port and the parallel bus port and converts data and commands between the Universal Serial Bus protocol and the parallel bus protocol. A sequencer is coupled between the USB controller core and the parallel bus port. A sequence of sequencer commands is loaded into memory in the USB bridge and used by the sequencer to perform a sequence of parallel port operations. The sequencer performs the commands autonomously without intervention from the USB host computer.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: May 15, 2001
    Assignee: In-System Design, Inc.
    Inventors: David D. Luke, David C. Gilbert
  • Patent number: 6218969
    Abstract: A serial to parallel port signal converter for interconnection between a hosts utilizing Uniform Serial Bus communications protocols and a peripheral device uses IEEE 1284 complaint communications protocol. The signal converter appears to the host as a fully compliant bi-directional USB device, and to the peripheral device as a fully compliant IEEE 1284 host.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: April 17, 2001
    Assignee: In-System Design, Inc.
    Inventors: Lynn R. Watson, James E. Castleberry, David D. Luke, David C. Gilbert
  • Patent number: 6113984
    Abstract: A CVD reactor includes separate reaction and pressure chambers, where the reaction chamber is contained within and isolates process or reactant gases from the pressure chamber. The reactor also includes a gas injection system which pre-heats and injects diffused process gas(es) into the reaction chamber in a somewhat vertical direction through a bottom surface of the reaction chamber. The gas injection system injects hydrogen or other appropriate gas in a vertical direction through the bottom surface of the reaction chamber. The flow of hydrogen or other appropriate gas is intermediate the flow of the process gas(es) and a surface of the reaction chamber, thereby re-directing the process gas flow parallel to the top surface of a wafer therein. In this manner, the reaction chamber does not require a long entry length for the process gas(es). This flow of hydrogen or other suitable gas also minimizes undesirable deposition on the surface of the reaction chamber.
    Type: Grant
    Filed: June 16, 1997
    Date of Patent: September 5, 2000
    Assignee: Concept Systems Design, Inc.
    Inventors: Joseph H. MacLeish, Robert D. Mailho, Mahesh K. Sanganeria, Enrique Suarez del Solar
  • Patent number: 6099650
    Abstract: A semiconductor chemical vapor deposition reactor includes a susceptor and a cover above the susceptor to reflect and radiate heat from the susceptor back onto the top surfaces of the wafers held on the susceptor, thereby minimizing temperature gradients on the wafers and reducing slip. The cover has an opening in the center through which process gases are injected, creating a Bernouli effect to draw the process gases between the cover and susceptor, where the process gases then deposit on the wafers secured thereon.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: August 8, 2000
    Assignee: Concept Systems Design, Inc.
    Inventors: Alan Carbonaro, Glenn Pfefferkorn, Gary L. Evans
  • Patent number: 6096497
    Abstract: The device described herein is an enzyme-based biosensor for detecting and/or quantifying molecules of interest. The biosensor relies on the following properties shared by all enzymes: (1) that enzymes are highly specific molecules designed to bind with only one analyte type or one class of analyte molecules; (2) that enzymes contain charges; (3) that enzymes undergo significant spacial fluctuation during periods of interaction with substrates; and (4) that these spacial fluctuations cause the charged moieties on the enzyme to move and thus generate a measurable electrostatic potential (voltage) in both the enzyme and support layers. The instant device determines analyte presence/concentration through measurement of changes in voltage or current in a conducting or semiconducting support material as a result of changes in the position of immobilized charged enzyme molecules during their interaction with analyte.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: August 1, 2000
    Assignee: Biosensor Systems Design, Inc.
    Inventor: Alan Joseph Bauer
  • Patent number: 6040792
    Abstract: A serial to parallel port signal converter for interconnection between a hosts utilizing Uniform Serial Bus communications protocols and a peripheral device uses IEEE 1284 complaint communications protocol. The signal converter appears to the host as a fully compliant bi-directional USB device, and to the peripheral device as a fully compliant IEEE 1284 host.
    Type: Grant
    Filed: November 19, 1997
    Date of Patent: March 21, 2000
    Assignee: In-System Design, Inc.
    Inventors: Lynn R. Watson, James E. Castleberry, David D. Luke, David C. Gilbert
  • Patent number: 6031211
    Abstract: A structure and method are disclosed which allow for a tighter control of the temperature across a wafer substrate. In accordance with the present invention, a wafer to be processed is heated to a constant and uniform temperature by an RF induction coil including a plurality of heating zones each of which being shunted by an associated capacitor tuned to a specific frequency. By adjusting the time during which current of a particular frequency is provided to the induction coil, current flow within, and thus the heat generated in, each of the zones may be independently controlled. Since the heat generated in the susceptor quickly changes in response to changes in current flow therein, both deviations of the wafer temperature from the processing temperature and temperature gradients across the surface of the wafer may be quickly corrected. This superior thermal response results in the present invention maintaining a wafer at a uniform temperature during heating and cooling with increased accuracy and precision.
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: February 29, 2000
    Assignees: Concept Systems Design, Inc., Advanced Energy Industries, Inc.
    Inventors: Robert D. Mailho, Douglas S. Schatz
  • Patent number: 5430619
    Abstract: A terminal box comprising a block of non-conductive material such as polystyrene or other comparable material having a first bus bar embedded therein with terminal connections to connect the live or hot wire of a first circuit leading to an electrical source, of a second circuit leading to a first load, and of a third or more circuits leading to a second or more load, a second bus bar embedded therein with terminal connections to connect the neutral wire of the first circuit leading to the electrical source, of the second circuit leading to the first load, and of the third or more circuits leading to a second or more load, and a third bus bar embedded therein with terminal connections to connect the ground wire of the first, second, third or more circuits.
    Type: Grant
    Filed: March 18, 1994
    Date of Patent: July 4, 1995
    Assignee: Lindenbaum Systems Design, Inc.
    Inventor: Matthew J. Lindenbaum
  • Patent number: 5120942
    Abstract: A tour monitor system includes a portable tour monitor and a central programming/report generating computer. The tour monitor includes a bar code reader, an alphanumeric display, and an alphanumeric keyboard. The tour is organized into zones, each including a set of checkpoints, wherein each checkpoint is labeled by a bar code. The tour monitor is programmed to prompt the guard through the tour by displaying the names of successive zones. In addition, individual checkpoints can be designated as higher or lower priority checkpoints, and the tour monitor is programmed to alert the guard if higher priority checkpoints are missed, and to require the guard either to scan the missed higher priority checkpoint or to provided an override signal. The tour monitor also allows the guard to enter alphanumeric messages which are stored in combination with the scanned checkpoint codes in a log. This log is then transmitted to the programming/report generating computer for analysis.
    Type: Grant
    Filed: February 2, 1989
    Date of Patent: June 9, 1992
    Assignee: Computer Systems Design Inc.
    Inventors: Richard F. Holland, Jeffrey P. Coney
  • Patent number: 4720183
    Abstract: A wide-angle eyepiece designed to cover a field of view of 90.degree. with substantially perfect correction of spherical aberration, coma, astigmatism, field curvature, chromatic aberration, and spherical aberration of the exit pupil.
    Type: Grant
    Filed: February 27, 1986
    Date of Patent: January 19, 1988
    Assignee: Optical Systems Design, Inc.
    Inventor: Donald C. Dilworth