Abstract: A method of manufacturing a semiconductor device includes forming an amorphous silicon layer over a first isolation layer. The method further includes simultaneously forming a gate oxide layer of a transistor device and transforming the amorphous silicon layer into a polycrystalline silicon layer by a thermal oxidation process. Herein a cover oxide layer is formed on the polycrystalline silicon layer.

Abstract: An apparatus and a method for producing the apparatus are described, wherein the apparatus includes a substrate with a photodetector and a dielectric arranged on the substrate. Further, the apparatus includes a microlens arranged on a first side of the dielectric. The microlens is configured to steer incident radiation onto the photodetector. Moreover, the apparatus includes a carrier-free optical interference filter. The microlens is arranged between the photodetector and the interference filter, and the interference filter has a plane surface on a side facing away from the photodetector.

Abstract: A semiconductor device include a semiconductor body with a drain region of a first conductivity type, a drift region of the first conductivity type and having a doping concentration lower than a doping concentration of the drain region, a buffer region of the first conductivity type arranged between the drift region and the drain region, a source region of the first conductivity type, a body region of a second conductivity type arranged between the source region and the drift region and forming a first pn-junction with the source region and a second pn-junction with the drift region, and a charge compensation region of the second conductivity type extending from the body region towards the buffer region. A source metallization is in ohmic contact with the source region. A drain metallization is ohmic contact with the drain region.

Abstract: A microelectromechanical systems (MEMS) device is provided and includes a bulk semiconductor substrate, a cavity formed in the bulk semiconductor substrate, a movably suspended mass, a cap structure and a capacitive structure is shown. The movably suspended mass is defined in the bulk semiconductor substrate by one or more trenches extending from a main surface area of the bulk semiconductor substrate to the cavity. The cap is structure arranged on the main surface area of the bulk semiconductor substrate. The capacitive structure comprises a first electrode structure arranged on the movably suspended mass and a second electrode structure arranged at the cap structure such that the first electrode structure and the second electrode structure are spaced apart in a direction perpendicular to the main surface area of the bulk semiconductor substrate.

Abstract: Embodiments provide a method for manufacturing a bipolar junction transistor, comprising: providing a semiconductor substrate comprising a buried layer of a first conductive type; doping the semiconductor substrate in a collector implant region, to obtain a collector implant of the first conductive type extending parallel to a surface of the semiconductor substrate and from the surface of the semiconductor substrate to the buried layer; providing a base layer of a second conductive type on the surface of the semiconductor substrate, the base layer covering the collector implant; providing a sacrificial emitter structure on the base layer, wherein a projection of an area of the sacrificial emitter structure is enclosed by an area of the collector implant; and partially counter doping the collector implant through an area of the base layer surrounding an area of the base layer that is covered by the sacrificial emitter structure.

Abstract: A method for forming a microelectromechanical systems (MEMS) device may include performing a first silicon-on-nothing process to form a first cavity in a substrate. The method may include depositing an epitaxial layer on a surface of the substrate. The method may include performing a second silicon-on-nothing process to form a second cavity in the epitaxial layer. The method may include exposing the first cavity and the second cavity by removing a portion of the substrate and the epitaxial layer.

Abstract: A circuit has first and second semiconductor switches, each of which has a load path and control terminal connected in series. Each switch includes a first semiconductor device having a load path and a control terminal coupled to the control terminal of its switch, and a second semiconductor device having a load path between first and second load terminals, and a control terminal. Each second semiconductor device has its load path connected in series to the load path of the corresponding first semiconductor device. The semiconductor devices are coupled such that the second semiconductor devices are controlled by a load path voltage of the first semiconductor devices. The switches are integrated in a common semiconductor body. The first switch is implemented in a first area of the semiconductor body, and the second switch is implemented in a second area. In a horizontal plane, the first area surrounds the second area.

Abstract: An electronic circuit includes: a drive circuit having an output coupled to a control node of a first electronic switch; a switch circuit with second electronic switches, load paths of the second electronic switches being connected in series, and the switch circuit being connected between a first load node of the first electronic switch and a reference node; and a level shifter coupled between a first signal input and an input of the drive circuit and including cascaded level shifter cells. Each level shifter cell includes a signal input and output, and first and second supply nodes. Each level shifter cell is associated with a respective second electronic switch. The first supply node of each level shifter cell is coupled to a first load node of the associated second electronic switch, and the second supply node is coupled to a second load node of the associated second electronic switch.

Abstract: A method for forming a microelectromechanical device is shown. The method comprises forming a cavity in a semiconductor substrate material, wherein the semiconductor substrate material comprises an opening for providing access to the cavity through a main surface area of the semiconductor substrate material. In a further step, the method comprises forming a support structure having a support structure material different from the semiconductor substrate material to close the opening at least partially by mechanically connecting the main surface area of the semiconductor substrate material with the bottom of the cavity. Furthermore, the method comprises a step of forming a lamella structure in the main surface area above the cavity such that the lamella structure is held spaced apart from the bottom of the cavity by the support structure.

Abstract: The present disclosure relates to an integrated semiconductor device, comprising a semiconductor substrate; a cavity formed into the semiconductor substrate; a sensor portion of the semiconductor substrate deflectably suspended in the cavity at one side of the cavity via a suspension portion of the semiconductor substrate interconnecting the semiconductor substrate and the sensor portion thereof, wherein an extension of the suspension portion along the side of the cavity is smaller than an extension of said side of the cavity.

Abstract: An accelerometer may include a seismic mass to flex based on acceleration components perpendicular to a surface of a substrate. The seismic mass may include a first electrode and a portion of the substrate. A first surface of the seismic mass may be adjacent to a first cavity in the substrate, and a second surface of the seismic mass being adjacent to a second cavity. The first surface of the seismic mass and the second surface of the seismic mass may be on opposite sides of the seismic mass. The accelerometer may include a second electrode separated from the second surface of the seismic mass by at least the second cavity.

Abstract: A semiconductor device includes a semiconductor substrate having a first side, and a trench structure having a bottom and a sidewall. The bottom has at least first and second bottom portions laterally adjacent to one another. Each bottom portion has a concave shape with a ridge formed between the first and second bottom portions. An insulating material covers the sidewall and first bottom portion of the trench structure while leaving the second bottom portion uncovered. A mesa region extends to the first side of the substrate and forms the sidewall of the trench structure. The device also includes a first silicide layer on a top region of the mesa region, a second silicide layer on the second bottom portion of the trench structure, a first metal layer on and in contact with the first silicide layer, and a second metal layer on and in contact with the second silicide layer.

Abstract: A semiconductor device includes a semiconductor body. The semiconductor body has a first surface and a second surface opposite to the first surface. A transistor cell structure is provided in the semiconductor body. A gate contact structure includes a gate line electrically coupled to a gate electrode layer of the transistor cell structure, and a gate pad electrically coupled to the gate line. A gate resistor structure is electrically coupled between the gate pad and the gate electrode layer. An electric resistivity of the gate resistor structure is greater than the electric resistivity of the gate electrode layer.

Abstract: Embodiments provide a method for manufacturing a bipolar junction transistor. The method comprises a step of providing a layer stack, the layer stack comprising a semiconductor substrate having a trench isolation, a base contact layer stack, wherein the base contact layer stack comprises a recess forming an emitter window, lateral spacers arranged on sidewalls of the emitter window, the lateral spacers isolating a base contact layer of the base contact layer stack; and a base layer arranged in the emitter window on the semiconductor substrate, wherein the base layer at least partially protrudes under the lateral spacers. The method further comprises a step of providing an isolation layer on the base layer.

Abstract: The present disclosure relates to an integrated light emitting device. The integrated light emitting device comprises a substrate of semiconductor material, a light emitting unit integrated into the semiconductor material, and at least one cavity formed into the semiconductor material between the substrate and the light emitting unit. At least portions of the at least one cavity may be formed by Silicon-On-Nothing (SON) process steps.

Abstract: A semiconductor battery includes a substrate, a battery anode semiconductor material arranged in or over the substrate, a battery cathode material arranged in or over the substrate and a battery electrolyte disposed between the battery anode semiconductor material and the battery cathode material. An electrically insulating encapsulant has a first face and a second face. The substrate is at least partly embedded in the encapsulant. An anode electrode is electrically connected to the battery anode semiconductor material and is disposed over the second face of the encapsulant. A cathode electrode is electrically connected to the battery cathode material and is disposed over the first face of the encapsulant.

Abstract: A semiconductor device includes a semiconductor body having a first surface and a second surface opposite to the first surface. A first isolation layer is provided over the first surface of the semiconductor body. The semiconductor device further includes an electrostatic discharge protection structure over the first isolation layer. The electrostatic discharge protection structure has a first terminal region of a first conductivity type and a second terminal region of a second conductivity type opposite to the first conductivity type.

Abstract: A manufacturing method includes providing a semiconductor substrate having a pressure sensor structure; and forming, during a BEOL process (BEOL=back-end-of-line), a metal-insulator-stack arrangement on the semiconductor substrate, wherein the metal-insulator-stack arrangement is formed to comprise (1) a cavity adjacent to the pressure sensor structure and extending over the pressure sensor structure, and (2) a pressure port through the metal-insulator-stack arrangement for providing a fluidic connection between the cavity and an environmental atmosphere, wherein the pressure port has a cross-sectional area, which is smaller than 10% of a footprint area of the pressure sensor structure within the cavity.

Abstract: A semiconductor device and a method of manufacturing the same is provided. The semiconductor device including a transistor cell in a semiconductor substrate having a first main surface. The transistor cell includes a gate electrode in a gate trench in the first main surface adjacent to a body region. A longitudinal axis of the gate trench extends in a first direction parallel to the first main surface. A source region, a body region and a drain region are disposed along the first direction. A source contact comprises a first source contact portion and a second source contact portion. The second source contact portion is disposed at a second main surface of the semiconductor substrate. The first source contact portion includes a source conductive material in direct contact with the source region and a portion of the semiconductor substrate arranged between the source conductive material and the second source contact portion.

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.