Abstract: A power semiconductor module arrangement includes two or more individual semiconductor devices arranged on a base layer. Each semiconductor device includes a lead frame, a semiconductor body arranged on the lead frame, and a molding material enclosing the semiconductor body and at least part of the lead frame. A frame is arranged on the base layer such that the frame surrounds the two or more individual semiconductor devices. A casting compound at least partly fills a capacity formed by the base layer and the frame, such that the casting compound at least partly encloses the two or more individual semiconductor devices.

Abstract: A sensor arrangement comprises a communication device and a sensor element. The sensor element is configured to record a property and provide a sensor signal that represents the property. The sensor arrangement comprises a security element configured to provide a secret. The sensor arrangement is configured to link the sensor signal to the secret to obtain a linked sensor signal, transmit the linked sensor signal to a communication partner using the communication device, obtain a test signal from the communication partner using the communication device, and perform a check to determine whether the test signal comprises the secret.

Abstract: A semiconductor device package includes a printed circuit board including a first central area, a second lateral area, and a third lateral area, a semiconductor die including a first main face and a second main face opposite the first main face, a first contact pad on the first main face and a second contact pad on the second main face, the semiconductor die disposed in the first central area of the printed circuit board, a first metallic side wall of the semiconductor device package disposed in the second lateral area of the printed circuit board, a second metallic side wall of the semiconductor device package disposed in the third lateral area of the printed circuit board, wherein at least one of the first metallic side wall and the second metallic side wall is electrically connected with one of the first contact pad or the second contact pad.

Abstract: A radar system includes a signal generator configured to generate an RF signal; a modulator configured to generate an RF test signal by modulating the RF signal with a test signal; a transmitting channel configured to generate an RF output signal based on the RF signal; and a receiving channel configured to receive an antenna signal and the RF test signal and down-convert a superposition of the two signals to baseband by means of a mixer in order to obtain a baseband signal. The radar system further includes an analog-to-digital converter configured to generate a digital radar signal based on the baseband signal, and a computing unit configured to filter the digital radar signal by means of a digital filter, wherein the filter characteristic of the digital filter has a pass band, a transition band, and a stop band. The test signal has a frequency in the transition band.

Abstract: A power semiconductor module includes: an electrically insulative frame having opposite first and second mounting sides, and a border that defines a periphery of the electrically insulative frame; a first substrate seated in the electrically insulative frame; a plurality of power semiconductor dies attached to the first substrate; a plurality of signal pins attached to the first substrate and electrically connected to the power semiconductor dies; a plurality of busbars attached to the first substrate and extending through the border of the electrically insulative frame; a plurality of fixing positions at the first mounting side of the electrically insulative frame; and a plurality of electrically insulative protrusions jutting out from the second mounting side of the electrically insulative frame, wherein the protrusions are vertically aligned with the fixing positions.

Abstract: A method for a slave bus and a master bus includes receiving a first frame via a first data channel, wherein the first frame includes at least first header data, first payload data and first checksum. The method further includes implementing a function depending on the header data contained in the received first frame, and generating a second frame including second header data, second payload data, which are determined by the implemented function, and a second checksum. The second checksum is ascertained at least on the basis of the second payload data and the first header data contained in the received first frame. The method also includes transmitting the second frame via a second data channel simultaneously with receiving the first frame via the first data channel.

Abstract: An electronic chip is disclosed. In one example, the electronic chip comprises a substrate comprising a central portion and an edge portion around at least part of the central portion. An active region is arranged in the central portion. A crack guiding structure combined with a crack stop structure is provided, both being arranged in the edge portion.

Abstract: A gas sensing device includes one or more chemo-resistive gas sensors; one or more heat sources, wherein the gas sensors are heated according to one or more first temperature profiles during the recovery phases and according to one or more second temperature profiles during the sense phases; a preprocessing processor for generating preprocessed signal samples; a feature extraction processor for extracting one or more feature values from the received preprocessed signal samples; and a gas concentration processor for creating a sensing result, wherein the gas concentration processor includes a classification processor for outputting a class decision value, wherein the classification processor is configured for outputting a confidence value, wherein the classification processor includes a first trained model based algorithm processor, wherein the gas concentration processor comprises a quantification processor for creating an estimation value, and wherein the quantification processor comprises a second trained m

Abstract: A semiconductor arrangement includes at least two switching devices of a first type electrically coupled in parallel between first and second terminals, and at least two switching devices of a second type electrically coupled in parallel between the second terminal and a third terminal. One first diode is electrically coupled in parallel to each switching device of the first type. One second diode is electrically coupled in parallel to each switching device of the second type. The switching devices are arranged in a power semiconductor module having first and second longitudinal sides and first and second narrow sides. The first type switching devices and first diodes are arranged alternatingly in one row along the first longitudinal side. The second type switching devices and second diodes are arranged alternatingly in another row along the second longitudinal side. An axis of symmetry that extends perpendicular to the first and second narrow sides.

Abstract: A sensor system may include a first magnet arranged such that a position of the first magnet corresponds to a position of a trigger element on a linear trajectory. The sensor system may include a second magnet arranged such that a position of the second magnet corresponds to a selected position of a selection element. The sensor system may include a magnetic sensor to detect a strength of a first magnetic field component, a strength of a second magnetic field component, and a strength of a third magnetic field component. The magnetic sensor may be further to determine the position of the trigger element based on the strength of the first magnetic field component and the strength of the second magnetic field component, and to determine the selected position of the selection element based on the strength of the third magnetic field component.

Abstract: A magnetic field sensor includes a sensor and a processing circuit. The sensor is designed to generate on the basis of a varying magnetic field an oscillation signal that fluctuates around a mean value. The processing circuit is designed to generate an output signal on the basis of the oscillation signal. The processing circuit is designed, in a high-resolution mode different than a low-resolution mode, in each case to generate a mean value crossing pulse in the output signal when the oscillation signal attains the mean value, and to generate in each case a limit value crossing pulse in the output signal when the oscillation signal attains at least one limit value different than the mean value. A pulse width of at least either the mean value crossing pulse or the limit value crossing pulse is set to indicate that the magnetic field sensor is operating in the high-resolution mode.

Abstract: A semiconductor assembly includes a semiconductor package that includes first and second transistor dies embedded within a package body, the first and second transistor dies being arranged laterally side by side within the package body such that a first load terminal of the first transistor die faces an upper surface of the package body and such that a second load terminal of the second transistor die faces the upper surface of the package body, and a discrete capacitor mounted on the semiconductor package such that a first terminal of the discrete capacitor is directly over and electrically connected to the first load terminal of the first semiconductor die and such that a second terminal of the discrete capacitor is directly over and electrically connected with the second load terminal of the second semiconductor die.

Abstract: In accordance with an embodiment, a method of operating a radar system includes receiving radar configuration data from a host, and receiving a start command from the host after receiving the radar configuration data. The radar configuration data includes chirp parameters and frame sequence settings. After receiving the start command, configuring a frequency generation circuit is configured with the chirp parameters and radar frames are triggered at a preselected rate.

Abstract: A magnetic sensor system includes a toothed wheel configured to rotate about a rotation axis that extends in an axial direction, wherein the toothed wheel includes a plurality of teeth and a plurality of notches arranged that define a circumferential perimeter, wherein the toothed wheel further includes an interior cavity arranged within the circumferential perimeter; a front-bias magnet arranged within the interior cavity of the toothed wheel, wherein the front-bias magnet is rotationally fixed and is magnetized with a magnetization direction that extends along a radial axis of the toothed wheel; and a magnetic sensor arranged exterior to the toothed wheel, wherein the magnetic sensor includes a sensor element arranged on the radial axis that coincides with the magnetization direction of the front-bias magnet and the first sensor element is sensitive to a magnetic field of the front-bias magnet that is aligned with the radial axis.

Abstract: In accordance with an embodiment, a semiconductor device includes: an n-doped region disposed over an insulating layer; a p-doped region disposed over the insulating layer adjacent to the n-doped region, where an interface between the n-doped region and the p-doped region form a first diode junction; a plurality of segmented p-type anode regions disposed over the insulating layer, each of the plurality of segmented p-type anode regions being surrounded by the n-doped region, where a doping concentration of the plurality of segmented p-type anode regions is greater than a doping concentration of the p-doped region; and a plurality of segmented n-type cathode regions disposed over the insulating layer. Each of the plurality of segmented n-type cathode regions are surrounded by the p-doped region, where a doping concentration of the plurality of segmented n-type cathode regions is greater than a doping concentration of the n-doped region.

Abstract: A method for fabricating packaged semiconductor devices is disclosed. In one example the method comprises providing a plurality of semiconductor dies, the semiconductor dies being arranged in an array on a carrier such that a first side of the semiconductor dies faces the carrier and such that an empty space is arranged laterally besides each semiconductor die. A substrate comprising a plurality of conductive elements is arranged over the plurality of semiconductor dies such that a conductive element is arranged in the respective empty space besides each one of the semiconductor dies. The plurality of semiconductor dies are molded over to form a molded body, and singulating packaged semiconductor devices from the molded body by cutting through the molded body.

Abstract: Implementations relate to a sensor assembly for determining rotation about an axis and linear movement parallel to the axis. The sensor assembly comprises a magnetic structure comprising a north pole radially displaced from the axis and a south pole radially displaced from the axis and opposite to the north pole. The north pole and the south pole of the magnet extend radially into the direction of the axis at an axial end of the sensor assembly. The sensor assembly further comprises at least one sensor element sensitive to magnetic fields radially between the north pole and the south pole.

Abstract: A switch device including a semiconductor substrate is provided. A trench is formed in the substrate, and a phase change material is provided at least partially in the trench. A heater for heating the phase change material is also provided.

Abstract: An imaging system includes an illumination element for emitting light and an imaging sensor having at least one photo-sensitive element that includes a first element with a modifiable first charge level and a second element with a modifiable second charge level. Control circuitry is configured to, during a first phase, control the illumination element to emit light towards a scene and drive the photo-sensitive element such that charge carriers generated in the photo-sensitive element by light received from the scene modify the first charge level. The control circuitry is configured to, during a second phase, control the illumination element to pause emission of the light and drive the photo-sensitive element such that charge carriers generated in the photo-sensitive element by light received modify the second charge level, and to generate a gray-scale image of the scene based on the first and second charge levels.

Abstract: A method to secure boot an electronic device is disclosed according to some embodiments. The method includes receiving a request to initiate a boot sequence using memory content stored in a non-volatile memory circuit. A secure boot circuit receives verification data from the non-volatile memory circuit indicating the memory content. The verification data includes an error correction code for the memory content without including all of the memory content. A cryptographic hashing operation is performed to the error correction code in the secure boot circuit to obtain a digest of the error correction code. The digest is compared with a pre-stored reference digest to generate a verification signal. The verification signal is provided to the electronic device indicating whether the boot sequence passes the verification.