Patents Assigned to Infineon Technology Austria AG
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Patent number: 11728737Abstract: An apparatus may include an electric power converter and pre-charge circuitry. The electric power converter may include a first circuit, a second circuit and an energy transfer device. The first circuit may be connected to a power supply. The second circuit may be connected to a load. The energy transfer device may have a first side connected to the first circuit and a second side connected to the second circuit. The pre-charge circuitry may be connected to a capacitor of the first circuit. The capacitor may be connected to the first side of the energy transfer device. The pre-charge circuitry may be configured to charge the capacitor during a pre-charge mode of the electric power converter. The electric power converter may be configured to exit the pre-charge mode and enter an energy transfer mode responsive to a charge level of the capacitor reaching a threshold pre-charge level.Type: GrantFiled: September 20, 2020Date of Patent: August 15, 2023Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventors: Daniele Miatton, Kyrylo Cherniak, Hayri Verner Hasou, Erwin Huber, Sergio Morini, Volha Subotskaya
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Patent number: 11728753Abstract: According to some embodiments, a method for controlling a motor comprises generating a stall threshold based on a torque generating current parameter associated with the motor. A motor stall condition is identified based on a torque generating voltage parameter associated with the motor violating the stall threshold. Operation of the motor is adjusted responsive to identifying the motor stall condition.Type: GrantFiled: June 24, 2021Date of Patent: August 15, 2023Assignee: INFINEON TECHNOLOGIES AUSTRIA AGInventor: Vedant Sadashiv Chendake
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Patent number: 11728721Abstract: A voltage converter powers a load. The voltage converter includes a first power converter and a second power converter. The first power converter produces an intermediate voltage and a first output current derived from an input voltage. The first power converter supplies the intermediate voltage to the second power converter. The second power converter produces a second output current based on the intermediate voltage received from the first power converter. An output node of the voltage converter outputs a sum of the first output current and the second output current to produce an output voltage.Type: GrantFiled: February 18, 2021Date of Patent: August 15, 2023Assignee: Infineon Technologies Austria AGInventors: Stefano Saggini, Mario Ursino, Roberto Rizzolatti, Gerald Deboy
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Patent number: 11728746Abstract: Disclosed is a current source inverter that includes a combination of normally-on and normally-off switches configured to provide free-wheeling paths for current in case of loss of control signals or gate drive power.Type: GrantFiled: April 14, 2020Date of Patent: August 15, 2023Assignee: Infineon Technologies Austria AGInventors: Gerald Deboy, Johann Kolar, Matthias Joachim Kasper, Dominik Bortis, Mattia Guacci
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Patent number: 11728427Abstract: A semiconductor device is described. The semiconductor device includes: a semiconductor substrate; an electrode structure on or in the semiconductor substrate, the electrode structure including an electrode and an insulating material that separates the electrode from the semiconductor substrate; and a strain-inducing material embedded in the electrode. The electrode structure adjoins a region of the semiconductor substrate through which current flows in a first direction during operation of the semiconductor device. The electrode is under either tensile or compressive stress in the first direction. The strain-inducing material either enhances or at least partly counteracts the stress of the electrode in the first direction. Methods of producing the semiconductor device are also described.Type: GrantFiled: June 21, 2021Date of Patent: August 15, 2023Assignee: Infineon Technologies Austria AGInventors: Stefan Karner, Oliver Blank, Günter Denifl, Germano Galasso, Saurabh Roy, Hans-Joachim Schulze, Michael Stadtmueller
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Patent number: 11721616Abstract: A semiconductor package includes a die pad comprising a die attach surface, a first lead extending away from the die pad, one or more semiconductor dies mounted on the die attach surface, the one or more semiconductor dies comprising first and second bond pads that each face away from the die attach surface, and a distribution element that provides a first transmission path for a first electrical signal between the first lead and the first bond pad of the one or more semiconductor dies and a second transmission path for the first electrical signal between the first lead and the second bond pad of the one or more semiconductor dies. The distribution element comprises at least one integrally formed circuit element that creates a difference in transmission characteristics between the first and second transmission paths.Type: GrantFiled: June 4, 2020Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventors: Stephan Voss, Edward Fuergut, Martin Gruber, Andreas Huerner, Anton Mauder
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Patent number: 11722053Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.Type: GrantFiled: December 23, 2021Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventors: Stefan Hermann Groiss, Emanuele Bodano
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Patent number: 11721638Abstract: A semiconductor wafer has a semiconductor body, an insulation layer on the semiconductor body, a scribeline region designated to be subjected to a wafer separation processing stage, and an optically detectable reference feature laterally spaced inward from the scribeline region and configured to serve as a reference position during the wafer separation processing stage. A corresponding method of processing the semiconductor wafer, a power semiconductor die and a semiconductor wafer separation apparatus are also described.Type: GrantFiled: December 18, 2020Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventor: Oliver Blank
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Patent number: 11721537Abstract: A device for controlling trapped ions includes a first substrate. A second substrate is disposed over the first substrate. One or a plurality of first level ion traps is configured to trap ions in a space between the first substrate and the second substrate. One or a plurality of second level ion traps is configured to trap ions in a space above the second substrate. An opening in the second substrate is provided through which ions can be transferred between a first level ion trap and a second level ion trap.Type: GrantFiled: September 29, 2021Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventors: Clemens Roessler, Silke Auchter, Johanna Elisabeth Roessler, Gerald Stocker
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Patent number: 11722056Abstract: An apparatus includes a controller. The controller receives feedback associated with a device powered by a power source. Sampling of the feedback associated with the device is susceptible to noise caused by a power converter in a vicinity of the controller. To achieve more accurate sampling of the feedback, the controller adjusts operation of the power converter during a window of time in which the power source powers the device. The adjusted operation reduces noise caused by the power converter such that, during the window of time in which the operation of the power converter is adjusted, the controller derives one or more accurate sample values from the received feedback.Type: GrantFiled: August 11, 2020Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventor: Pablo Yelamos Ruiz
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Patent number: 11721754Abstract: An enhancement mode Group III nitride-based transistor device includes a body having a first surface and a Group III nitride barrier layer arranged on a Group III nitride channel layer and forming a heterojunction therebetween. A first cell field includes transistor cells and an edge region. Each transistor cell includes source, gate and drain fingers extending substantially parallel to one another on the first surface in a longitudinal direction. The gate finger, arranged laterally between the source and drain fingers, includes a p-doped Group III nitride finger arranged between a metallic gate finger and the first surface. The edge region surrounds the transistor cells and includes an edge termination structure having an isolation ring and a p-doped Group III nitride runner. The isolation ring locally interrupts the heterojunction. The runner, extending transversely to the longitudinal direction, is located laterally between the isolation ring and an end of the drain finger.Type: GrantFiled: July 7, 2022Date of Patent: August 8, 2023Assignee: Infineon Technologies Austria AGInventors: Gerhard Prechtl, Gilberto Curatola, Oliver Haeberlen
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Patent number: 11716026Abstract: According to one configuration, an inductor device comprises: core material and one or more electrically conductive paths. The core material is magnetically permeable and surrounds (envelops) the one or more electrically conductive paths. Each of the electrically conductive paths extends through the core material of the inductor device from a first end of the inductor device to a second end of the inductor device. The magnetically permeable core material is operative to confine (guide, carry, convey, localize, etc.) respective magnetic flux generated from current flowing through a respective electrically conductive path. The core material stores the magnetic flux energy (i.e., first magnetic flux) generated from the current flowing through the first electrically conductive path.Type: GrantFiled: May 4, 2021Date of Patent: August 1, 2023Assignee: Infineon Technologies Austria AGInventors: Kennith K. Leong, Matthias J. Kasper, Luca Peluso, Gerald Deboy
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Patent number: 11705810Abstract: An apparatus includes a first power converter and a second power converter. The first power converter converts an input voltage into a first output voltage; the second power converter converts the first output voltage into a second output voltage that powers a load. The second power converter includes a switched-capacitor converter combined with a magnetic device. The switched-capacitor converter provides capacitive energy transfer; the magnetic device provides magnetic energy transfer. Additionally, the second power converter provides unregulated conversion of the first output voltage into the second output voltage via the capacitive energy transfer and the magnetic energy transfer. To maintain the magnitude of the second output voltage within a desired range or setpoint value, the first power converter regulates a magnitude of the first output voltage based on comparison of a magnitude of the second output voltage with respect to a desired setpoint reference voltage.Type: GrantFiled: May 16, 2022Date of Patent: July 18, 2023Assignee: Infineon Technologies Austria AGInventors: Roberto Rizzolatti, Christian Rainer
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Patent number: 11699725Abstract: A semiconductor device includes a gate structure extending from a first surface of a semiconductor portion into a mesa section between neighboring field electrode structures and an alignment layer formed on the first surface. The alignment layer includes mask pits formed in the alignment layer in a vertical projection of the field electrode structures. Sidewalls of the mask pits have a smaller tilt angle with respect to the first surface than sidewalls of the field electrode structures. The gate structure is in the vertical projection of a gap between neighboring mask pits.Type: GrantFiled: December 11, 2020Date of Patent: July 11, 2023Assignee: Infineon Technologies Austria AGInventors: Martin Poelzl, Oliver Blank, Franz Hirler, Maximilian Roesch, Li Juin Yip
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Patent number: 11699726Abstract: The application relates to a semiconductor die having a semiconductor body including an active region, an insulation layer on the semiconductor body, and a sodium stopper formed in the insulation layer. The sodium stopper is arranged in an insulation layer groove which intersects the insulation layer vertically and extends around the active region. The sodium stopper is formed of a tungsten material filling the insulation layer groove.Type: GrantFiled: January 25, 2021Date of Patent: July 11, 2023Assignee: Infineon Technologies Austria AGInventors: Oliver Blank, Christof Altstaetter, Ingmar Neumann
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Patent number: 11695083Abstract: A method of processing a power diode includes: creating an anode region and a drift region in a semiconductor body; and forming, by a single ion implantation processing step, each of an anode contact zone and an anode damage zone in the anode region. Power diodes manufactured by the method are also described.Type: GrantFiled: March 17, 2021Date of Patent: July 4, 2023Assignee: Infineon Technologies Austria AGInventors: Anton Mauder, Mario Barusic, Markus Beninger-Bina, Matteo Dainese
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Patent number: 11695329Abstract: A circuit for use in a switched mode power supply includes a dual-boost power-factor correction converter having an active rectifier stage with first and second rectifier transistors and first and second boost stages each with an inductor and transistor. An active rectifier controller circuit generates control signals for driving the rectifier transistors, respectively, on and off in accordance with an AC input voltage. A PFC controller circuit generates a pulse-width-modulated (PWM) control signal that is based on an output voltage of the boost stages and which is further based on a current sense signal representing the current passing through the active rectifier stage. A logic circuit generates a control signal for the transistor of the first boost stage and a control signal for the transistor of the second boost stage, based on the PWM control signal and at least one of the control signals for the rectifier transistors.Type: GrantFiled: December 1, 2021Date of Patent: July 4, 2023Assignee: Infineon Technologies Austria AGInventor: Alessandro Pevere
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Publication number: 20230208280Abstract: A method is provided for driving a half bridge circuit that includes a first transistor and a second transistor that are switched in a complementary manner. The method includes generating an off-current during a plurality of turn-off switching events to control a gate voltage of the second transistor; measuring a transistor parameter of the second transistor during a first turn-off switching event during which the second transistor is transitioned to an off state, wherein the transistor parameter is indicative of an oscillation at the first transistor during a corresponding turn-on switching event during which the first transistor is transitioned to an on state; and activating a portion of the off-current for the second turn-off switching event, including regulating an interval length of the second portion for the second turn-off switching event based on the measured transistor parameter measured during the first turn-off switching event.Type: ApplicationFiled: December 23, 2021Publication date: June 29, 2023Applicant: Infineon Technologies Austria AGInventors: Stefan Hermann GROISS, Emanuele BODANO
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Patent number: 11688713Abstract: A method for fabricating a semiconductor die package includes: providing a semiconductor transistor die, the semiconductor transistor die having a first contact pad on a first lower main face and/or a second contact pad on an upper main face; fabricating a frontside electrical conductor onto the second contact pad and a backside electrical conductor onto the first contact pad; and applying an encapsulant covering the semiconductor die and at least a portion of the electrical conductor, wherein the frontside electrical conductor and/or the backside electrical conductor is fabricated by laser-assisted structuring of a metallic structure.Type: GrantFiled: January 15, 2021Date of Patent: June 27, 2023Assignee: Infineon Technologies Austria AGInventors: Edward Fuergut, Irmgard Escher-Poeppel, Martin Gruber, Ivan Nikitin, Hans-Joachim Schulze
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Patent number: 11688732Abstract: A single chip power semiconductor device includes: first and second load terminals; a semiconductor body integrated in the single chip and coupled to the load terminals and configured to conduct a load current along a load current path between the load terminals; a control terminal and at least one control electrode electrically connected thereto, the at least one control electrode being electrically insulated from the semiconductor body and configured to control the load current based on a control voltage between the control terminal and the first load terminal; a protection structure integrated, separately from the load current path, in the single chip and including a series connection of pn junctions with first semiconductor regions of a first conductivity type and second semiconductor regions of a second conductivity type. The series connection of the pn-junctions is connected in forward bias between the control terminal and the first load terminal.Type: GrantFiled: December 14, 2020Date of Patent: June 27, 2023Assignee: Infineon Technologies Austria AGInventors: Guang Zeng, Anton Mauder, Joachim Weyers