Patents Assigned to Instruments Incorporated
  • Publication number: 20070254404
    Abstract: A semiconductor system (300) has one or more packaged active subsystems (310, 330); each subsystem has a substrate with electrical contact pads and one or more semiconductor chips stacked on top of each other, assembled on the substrate. The system further has a packaged passive subsystem (320) including a substrate with electrical contacts and passive electrical components, such as resistors, capacitors, and indictors. The passive subsystem is stacked with the active subsystems and connected to them by solder bodies.
    Type: Application
    Filed: May 1, 2006
    Publication date: November 1, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Mark Gerber, Kurt Wachtler, Abram Castro
  • Patent number: 7289047
    Abstract: In one aspect, code-words of variable lengths are decoded using a multi-stage decoding approach, with different stages being of different sizes (and thus accepting input data of corresponding number of bits). According to another aspect, the same bit positions are used for storing symbol information and offset value in case of hit and miss results respectively, thereby reducing the width of the entries of the decoding table. According to yet another aspect, conditional processing is avoided by providing a common arithmetic operation when decoding code-words in various escape modes, but using neutral operand values in case the operation is not required.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Soyeb N Nagori
  • Patent number: 7289570
    Abstract: A wireless system (e.g., Bluetooth, WCDMA, etc.) with multiple antenna communication channel eigenvector weighted transmissions including possibly differing order symbol constellations for differing eigenvectors. Comparison of maximizations of minimum received symbol distances provides for selection of eigenvector combinations and symbol constellations.
    Type: Grant
    Filed: April 10, 2001
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Timothy Schmidl, Mohammed Nafie, Anand G. Dabak
  • Patent number: 7290246
    Abstract: Systems and methods for improved power profiling of embedded applications are presented. These inventions provide the ability to measure the power consumption of an embedded application at varying levels of software granularity as the application is executing on the target hardware. Methods and apparatus are provided to permit such measurements in both real-time and non-real-time.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Robert J. Cyran, Edward A. Anderson
  • Patent number: 7289958
    Abstract: A method for training acoustic models for a new target language is provided using a phonetic table, which characterizes the phones, used in one or more reference language(s) with respect to their articulatory properties; a phonetic table, which characterizes the phones used in the target language with respect to their articulatory properties; a set of trained monophones for the reference language(s); and a database of sentences in the target language and its phonetic transcription. With these inputs, the new method completely and automatically takes care of the steps of monophone seeding and triphone clustering and machine intensive training steps involved in triphone acoustic training.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Alexis P. Bernard, Lorin P. Netsch
  • Patent number: 7288800
    Abstract: The present invention provides a system for providing a cross-lateral junction field effect transistor (114) having desired high-performance desired voltage, frequency or current characteristics. The cross-lateral transistor is formed on a commercial semiconductor substrate (102). A channel structure (124) is formed along the substrate, having source (120) and drain (122) structures laterally formed on opposites sides thereof. A first gate structure (116) is formed along the substrate, laterally adjoining the channel structure orthogonal to the source and drain structures. A second gate structure (118) is formed along the substrate, laterally adjoining the channel structure, orthogonal to the source and drain structures and opposite the first gate structure.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Gregory E. Howard, Leland Swanson
  • Patent number: 7289354
    Abstract: Methods and a circuit for writing to an SRAM memory cell of an array are discussed that provide improved static noise margin, and minimal risk of data upsets during write operations. The write method first rapidly raises the wordline to a lower read voltage level for access, then after a time delay that allows the cells in the selected row to establish a stabilizing differential voltage on the associated bitlines, raises the wordline voltage to a boosted or higher write voltage level. An SRAM bitline enhancement circuit may also be utilized in association with the SRAM memory array and writing method, for enhancing the differential voltage produced by an SRAM memory cell of the array on associated first and second bitlines of the array of conventional SRAM cells (e.g., a conventional 6T differential cell). In one implementation, the SRAM bitline enhancement circuit comprises a half-latch or a sense amplifier connected to associated bitline pairs of the array for amplifying the differential voltage.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Theodore W. Houston
  • Patent number: 7289090
    Abstract: A display apparatus 200 includes a substrate 219 and a number of light emitting diodes (LEDs) 202 coupled to the substrate. An optical element 207 such as a shroud or an integrator rod is located adjacent to at least one of the LEDs. In operation, the optical element and the LEDs are movable relative to one another so that the optical element is adjacent to different ones of the LEDs at different times.
    Type: Grant
    Filed: December 10, 2003
    Date of Patent: October 30, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Daniel J. Morgan
  • Publication number: 20070246796
    Abstract: One aspect of the invention provides an integrated circuit (IC). The IC comprises transistors and contact fuses. The contact fuses each comprise a conducting layer, a frustum-shaped contact has a narrower end that contacts the conducting layer and a first metal layer that is located over the conducting layer. A wider end of the frustum-shaped contact contacts the first metal layer. The frustum-shaped contact has a ratio of an opening of the wider end to the narrower end that is at least about 1.2. The contact fuses each further include a heat sink that is located over and contacts the first metal layer.
    Type: Application
    Filed: April 25, 2006
    Publication date: October 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Honglin Guo, Dongmei Li, Brian Goodlin, Joe McPherson
  • Publication number: 20070246773
    Abstract: A transistor comprises a source region of a first conductivity type and electrically communicating with a first semiconductor region. The transistor also comprises a drain region of the first conductivity type and electrically communicating with a second semiconductor region that differs from the first semiconductor region. An interface exists between the first semiconductor region and the second semiconductor region. The transistor also comprises a voltage tap region comprising at least a portion located in a position that is closer to the interface than the drain region. A mixed technology circuit is also described.
    Type: Application
    Filed: April 20, 2006
    Publication date: October 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventor: Sameer Pendharkar
  • Publication number: 20070248068
    Abstract: The present invention provides a method of operating a base station transmitter. The method includes providing a cellular downlink synchronization signal having primary and secondary portions, wherein the primary portion employs a corresponding one of a plurality of different primary signals allocated to adjoining transmission cells. The method also includes further providing cell-specific information in the secondary portion and transmitting the cellular downlink synchronization signal. In one embodiment, the primary portion explicitly indicates a partial cell identification information and the remaining cell identification information is carried in the secondary portion. In another embodiment, the plurality of different primary signals are simply used to avoid the channel mismatch effect. The present invention also provides a method of operating user equipment.
    Type: Application
    Filed: April 19, 2007
    Publication date: October 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Eko N. Onggosanusi, Anand G. Dabak, Badri N. Varadarajan
  • Publication number: 20070247705
    Abstract: The disclosed embodiments combine an electrothermal actuator system with an electrostatic attraction system, in order to orient bistable micromirrors in digital micromirror devices (DMDs). The micromirror, pivotally supported, can switch between two orientations. While typical DMD systems use electrostatic electrodes to orient the micromirror, stiction forces can restrict micromirror motion, affecting optical performance. The disclosed embodiments use an electrothermal actuation system to mechanically assist the electrodes, overcoming stiction without the need for a high-voltage reset pulse.
    Type: Application
    Filed: April 25, 2006
    Publication date: October 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventor: Ivan Kmecko
  • Publication number: 20070249168
    Abstract: A semiconductor device 100 comprising a gate structure 105 on a semiconductor substrate 110 and a recessed-region 115 in the semiconductor substrate. The recessed-region has a widest lateral opening 120 that is near a top surface 122 of the semiconductor substrate. The widest lateral opening undercuts the gate structure.
    Type: Application
    Filed: April 20, 2006
    Publication date: October 25, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Antonio Rotondaro, Trace Hurd, Elisabeth Koontz
  • Patent number: 7285830
    Abstract: An improved lateral bipolar junction transistor and a method of forming such a lateral bipolar transistor without added mask in CMOS flow on a p-substrate are disclosed. The CMOS flow includes patterning and n-well implants; pattern and implant pocket implants for core nMOS and MOS; pattern and implants pocket implants I/O nMOS and pMOS; sidewall deposit and etch and then source/drain pattern and implant for nMOS and pMOS. The bipolar transistor is formed by forming emitter and collector contacts by implants used in source/drain regions; forming an emitter by implants done in core pMOS during core pMOS LDD extender; and forming part of an base by pocket implant steps.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Amitava Chatterjee
  • Patent number: 7286623
    Abstract: Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode inputs. The data communication circuits have data inputs, data outputs, a clock input for timing or synchronizing the data input and/or output communication, and a mode input for controlling the data input and/or output communication. A clock/mode signal connects to the clock input of one circuit and to the mode input of the other circuit. A mode/clock signal connects to the mode input of the one circuit and to the clock input of the other circuit. The role of the mode and clock signals on the mode/clock and clock/mode signals, or their reversal, selects one or the other of the data communication circuits.
    Type: Grant
    Filed: January 16, 2007
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Patent number: 7287096
    Abstract: A communications system 400 includes a transmitter 410 that transmits information to a receiver 440 over communication channels 420 and 430. The receiver 440 determines reconfiguration transceive parameters, ack/comply timing information and implementation timing information and provides this information to the transmitter 410, e.g., over an OAM channel 420. The transmitter 410 returns an ack/comply to the receiver 440, e.g., over a lower layer OAM channel 430, at a time in accordance with the ack/comply timing information. If the acknowledgment indicates acceptance of the reconfiguration transceive parameters, both the transmitter 410 and the receiver 440 implement the reconfiguration transceive parameters at a time in accordance with the implementation delay timing information.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventor: Grant Wunsch
  • Patent number: 7286019
    Abstract: According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Solti Peng, Chien-Chung Chen, Abdellatif Bellaouar, Heng-Chih Lin
  • Patent number: 7286179
    Abstract: Defective pixels in a CMOS array give rise to spot noise that diminishes the integrity of the resulting image. Because CMOS arrays and digital logic can be fabricated on the same integrated circuit using the same processing technology and relatively inexpensive and fast circuit can be employed to digitally filter the pixel data stream and to identify pixels having values that do not fall in the range defined by the immediately neighboring pixels and the deviate from the neighboring pixels by more than a threshold amount. Such conditions would indicate that the deviation is caused by a defective pixel rather than by desired image data. The threshold amount can be preprogrammed or can be provided by a user or can be dynamically set using feedback indicating image quality. The filter would also provide a solution for other sensors such as CCD, although a single chip solution would likely not be possible.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Zhiliang Julian Chen, Eugene G. Dierschke, Steven Derek Clynes, Anli Liu
  • Patent number: 7286278
    Abstract: A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Satyadev R. Patel, Andrew G. Huibers, Steve S. Chiang
  • Publication number: 20070243683
    Abstract: The present invention provides a method for manufacturing a semiconductor device. The method, in one embodiment, includes forming a silicon oxide masking layer over a substrate in a first active region and a second active region of a semiconductor device, patterning the silicon oxide masking layer to expose the substrate in the first active region. The method further includes forming a layer of dielectric material over the substrate in the first active region, the patterned silicon oxide masking layer protecting the substrate from the layer of dielectric material in the second active region.
    Type: Application
    Filed: April 13, 2006
    Publication date: October 18, 2007
    Applicant: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Reima Laaksonen