Patents Assigned to Integrated Technology, Inc.
  • Patent number: 11972587
    Abstract: An establishing method of semantic distance map for a moving device, includes capturing an image; obtaining a single-point distance measurement result of the image; performing recognition for the image to obtain a recognition result of each obstacle in the image; and determining a semantic distance map corresponding to the image according to the image, the single-point distance measurement result and the recognition result of each obstacle of in the image; wherein each pixel of the semantic distance map includes an obstacle information, which includes a distance between the moving device and an obstacle, a type of the obstacle, and a recognition probability of the obstacle.
    Type: Grant
    Filed: May 22, 2022
    Date of Patent: April 30, 2024
    Assignee: FITIPOWER INTEGRATED TECHNOLOGY INC.
    Inventors: Hsueh-Tse Lin, Wei-Hung Hsu, Shang-Yu Yeh
  • Patent number: 11886950
    Abstract: A method and system for validating compliance with the terms of a transaction, includes gathering sensor and human-sourced data and analyzing and grading the data for compliance with each element and with the transaction as a whole.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: January 30, 2024
    Assignee: Healthcare Integrated Technologies Inc.
    Inventors: Kenneth M. Greenwood, Scott Michael Boruff, Jurgen Vollrath
  • Patent number: 11587423
    Abstract: A method and system for detecting a person falling, confirming a potential fall, and taking action to mitigate the effects of a fall.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: February 21, 2023
    Assignee: Healthcare Integrated Technologies, Inc.
    Inventors: Kenneth M. Greenwood, Scott Michael Boruff, Jurgen Klaus Vollrath
  • Patent number: 11455931
    Abstract: A source driving circuit of a display includes a gamma resistor strings, a digital to analog (DAC) circuit, and an output buffer circuit. The output buffer circuit includes input stage module, gain stage module, and output stage module. The input stage module includes main input stage unit and auxiliary input stage unit. Sizes of elements in main input stage unit are larger than sizes of elements in the auxiliary input stage unit, smaller sizes presenting smaller parasitic capacitances. During the switching period, the auxiliary input stage unit, gain stage module, and output stage module form a first unity gain amplifier outputting the driving voltages. During the stable period, the main input stage unit, gain stage module, and output stage module form a second unity gain amplifier outputting the driving voltages. A display device is also disclosed.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: September 27, 2022
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Li-Wei Liu, Bo-Wen Huang, Chun-Yung Cho
  • Patent number: 11004421
    Abstract: An operational amplifier circuit in a display apparatus which is fast-acting to prevent voltage overshoot comprises a pre-operational amplifier module, an output operational amplifier module, and an output module. Driving current from the pre-operational amplifier module is the basis of the output operational amplifier module generating a dynamic bias voltage to the output module. The output operational amplifier module detects the dynamic bias voltage and adjusts the bias voltage to be level with a specified voltage based on at least one control voltage. When the dynamic bias voltage is less than the specified voltage, the output operational amplifier module pulls up the bias voltage and when the bias voltage is larger than the specified voltage, the output operational amplifier module pulls down the bias voltage. The pull up and pull down speeds are proportional to the at least one control voltage.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: May 11, 2021
    Assignee: Fitipower Integrated Technology, Inc.
    Inventor: Kun-Tsung Lin
  • Publication number: 20210090520
    Abstract: An operational amplifier circuit in a display apparatus which is fast-acting to prevent voltage overshoot comprises a pre-operational amplifier module, an output operational amplifier module, and an output module. Driving current from the pre-operational amplifier module is the basis of the output operational amplifier module generating a dynamic bias voltage to the output module. The output operational amplifier module detects the dynamic bias voltage and adjusts the bias voltage to be level with a specified voltage based on at least one control voltage. When the dynamic bias voltage is less than the specified voltage, the output operational amplifier module pulls up the bias voltage and when the bias voltage is larger than the specified voltage, the output operational amplifier module pulls down the bias voltage. The pull up and pull down speeds are proportional to the at least one control voltage.
    Type: Application
    Filed: November 25, 2019
    Publication date: March 25, 2021
    Applicant: Fitipower Integrated Technology, Inc.
    Inventor: KUN-TSUNG LIN
  • Patent number: 10958688
    Abstract: Described herein are technologies related to an implementation of a decentralized discovery system that utilizes a plurality of fuse-nodes to facilitate delivery of content specific data to a user. The plurality of fuse-nodes is a proprietary owned database (or modules) that include relationship links to another fuse-node (s), and/or a particular channel, media, and contents, which further include social network-friends and social network activities of the social network-friend, etc.
    Type: Grant
    Filed: March 29, 2017
    Date of Patent: March 23, 2021
    Assignee: ZYX Integrated Technologies, Inc.
    Inventors: Dante Carmelo Cullari, Mark Gregory Valente
  • Patent number: 10163407
    Abstract: A scanning method of a display of the present invention changes a driving order of a plurality of gate driver lines according to a image data so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: December 25, 2018
    Assignee: FITIPOWER INTEGRATED TECHNOLOGY INC.
    Inventors: Kuei-Kai Chang, Chun-Fu Liu, Li-Shen Chang, Lu-Yao Wu
  • Publication number: 20180288096
    Abstract: Described herein are technologies related to an implementation of a decentralized discovery system that utilizes a plurality of fuse—nodes to facilitate delivery of content specific data to a user. The plurality of fuse—nodes is a proprietary owned database (or modules) that include relationship links to another fuse—node (s), and/or a particular channel, media, and contents, which further include social network—friends and social network activities of the social network—friend, etc.
    Type: Application
    Filed: March 29, 2017
    Publication date: October 4, 2018
    Applicant: ZYX Integrated Technologies, Inc.
    Inventors: Dante Carmelo Cullari, Mark Gregory Valente
  • Patent number: 10087005
    Abstract: A shunting device used to transport workpieces comprises a plurality of rotating shafts parallel to one another and arranged in arrays, a plurality of first omnidirectional wheels, and a plurality of second omnidirectional wheels. The first omnidirectional wheels and the second omnidirectional wheels are each wrapped around a corresponding one of the rotating shafts in a matrix. The first omnidirectional wheels and the second omnidirectional wheels are alternatively arranged along the corresponding one of the plurality of rotating shafts and a second direction perpendicular to the plurality of rotating shafts. A plurality of first driven rollers of the first omnidirectional wheels and a plurality of second driven rollers of the second omnidirectional wheels are mirror-symmetrical along at least one of a third direction parallel to the plurality of rotating shafts and the second direction.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: October 2, 2018
    Assignee: FOXSEMICON INTEGRATED TECHNOLOGY, INC.
    Inventors: Yi-Chun Chiu, Chun-Kai Huang, Chih-Cheng Lu, Chun-Chung Chen
  • Patent number: 10037739
    Abstract: A gate driving and modulating circuit, for reduced flicker on a display, includes a first discharge circuit and a plurality of interconnected gate drivers. The plurality of gate drivers is electrically coupled to ground through the first discharge circuit. Each of the plurality of gate drivers includes a second discharge circuit. The gate driving circuit performs a chamfering of a gate signal by being simultaneously discharged through the first discharge circuit and the second discharge circuit.
    Type: Grant
    Filed: September 1, 2016
    Date of Patent: July 31, 2018
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Li-Shen Chang, Chen-Chi Yang
  • Patent number: 9959817
    Abstract: A scanning method of a display of the present invention changes a driving order of a plurality of gate driver lines according to a frame data so as to reduce switching currents generated while a plurality of voltages on a plurality of source driver lines are changed. Thereby, the goal of saving power can be reached.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: May 1, 2018
    Assignee: Fitipower Integrated Technology Inc.
    Inventors: Kuei-Kai Chang, Chun-Fu Liu, Li-Shen Chang, Lu-Yao Wu
  • Patent number: 9748221
    Abstract: An electrostatic discharge (ESD) protection device includes two N-metal oxide semiconductor (NMOS) elements and a doped region. The two NMOS elements are arranged on a P-substrate, and each NMOS element includes a gate, a source, and a drain. The source and the drain are arranged on two opposite sides of the gate. The doped region is implanted into an outer space of the two NMOS surrounding the two NMOS, and a PN junction is formed by the doped region and the P-substrate.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: August 29, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventor: Chih-Nan Cheng
  • Patent number: 9742273
    Abstract: A power switching voltage regulator includes a high-side switch, a low-side switch, an inductor, a detection circuit, and a gate voltage adjusting unit. The high-side switch is coupled to a voltage source; the low-side switch is coupled between the high-side switch and a ground. A connection node is located between the high-side switch and the low-side switch. The inductor is coupled between the connection node and a power output terminal of the power switching voltage regulator. The detection circuit detects an output voltage of the power output terminal, when the output voltage swings out of a predetermined range. The gate voltage adjusting unit dynamically adjusts a gate voltage on-resistances of the high-side switch and the low-side switch.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: August 22, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventor: Shang-Cheng Yu
  • Patent number: 9742282
    Abstract: A switching power voltage regulator includes a pulse width modulation (PWM) signal generator, an output circuit and a feedback circuit. The PWM signal generator is configured to generate a PWM signal. The feedback circuit is configured to provide a feedback signal to the output circuit according to an output voltage of the output circuit. The output circuit includes an inductor, a plurality of inverters, and a driver. Each of the inverters includes a first transistor and a second transistor. When the inductor needs to be charged, the driver selectively switches one or more corresponding first transistors on according to the feedback signal.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: August 22, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Chih-Nan Cheng, Shang-Cheng Yu
  • Patent number: 9583050
    Abstract: A display apparatus includes a receiving module, a processing module, a selecting module, a power circuit, and a backlight module. The receiving module receives a pulse width modulating (PWM) signal from an external component. The processing module processes the PWM signal in a predetermined time duration. The selecting module outputs the unadjusted PWM signal to the power circuit in the predetermined time duration, and outputs an adjusted signal after the predetermined duration. The power circuit generates a first driving current for driving the backlight module to emit lights in response to the unadjusted PWM signal while the processing module processes the PWM signal. The backlight module remains a predetermined brightness after the predetermined time.
    Type: Grant
    Filed: April 20, 2015
    Date of Patent: February 28, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Chung-Hsiao Hsieh, Chung-Hao Chang
  • Patent number: 9568935
    Abstract: A current detection circuit includes a first detection circuit, a second detection circuit, and a control selection circuit. The first detection circuit electrically connects between an input terminal and an output terminal and outputs a first detection signal. The second detection circuit electrically connects between the input terminal and the output terminal and outputs a second detection signal. The control selection circuit electrically connects the output terminal, the first detection circuit, and the second detection circuit and selects one of the first and second detection signals as a detection signal.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: February 14, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Chih-Ho Lin, Wen-Yen Lee, Yi-Sheng Liu, Chio-Yi Ho
  • Patent number: 9570039
    Abstract: A display device includes a timing control circuit and a data driving circuit. The data driving circuit receives the first clock embedded training data from the timing control circuit, performs a first clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a first clock signal, and receives the first clock embedded image data from the timing control circuit. The data driving circuit also receives a second clock embedded training data from the timing control circuit, performs a second clock training to adjust a work frequency of the data driving circuit to be equal to the frequency of a second clock signal, and receives the second clock embedded image data from the timing control circuit. The frequency of the first clock signal is different from a frequency of the second clock signal.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: February 14, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Wen-Shian Shie, Tung-Shuan Cheng
  • Patent number: 9543238
    Abstract: A semiconductor device includes a center semiconductor chip with a plurality of die pads, a plurality of lead frames, and a plurality of connecting components. The lead frame encapsulates the center semiconductor chip. Each connecting components establishes an electrical connection between the center semiconductor chip and the lead frame. At least one of the center semiconductor chip, the lead frame, and the connecting component forms an indicator.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 10, 2017
    Assignee: Fitipower Integrated Technology, Inc.
    Inventors: Shang-Cheng Yu, Chih-Nan Cheng
  • Patent number: RE49211
    Abstract: Described herein are technologies related to an implementation of a decentralized discovery system that utilizes a plurality of fuse-nodes to facilitate delivery of content specific data to a user. The plurality of fuse-nodes is a proprietary owned database (or modules) that include relationship links to another fuse-node (s), and/or a particular channel, media, and contents, which further include social network-friends and social network activities of the social network-friend, etc.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: September 13, 2022
    Assignee: ZYX Integrated Technologies, Inc.
    Inventors: Dante Carmelo Cullari, Mark Gregory Valente