Abstract: Embodiments of user equipment and methods for reducing delay in a radio-access network (RAN) are generally described herein. Embodiments disclosed herein provide enhancements that may be applicable to a 3GPP LTE RAN for reducing delay that may be particularly beneficial for real-time over-the-top (OTT) applications. Some embodiments provide for an uplink delayed buffer status report. Some embodiments provide for a downlink congestion and buffer report. Some embodiments provide for traffic characteristic based inter-UE prioritization.
Abstract: A method is disclosed for associating network devices to a network. The method can include receiving a beacon from a source by an antenna array, allocating resources to beamform and beamforming after receiving at least a portion of the beacon. The beamforming can be accomplished prior to completion of an association request and prior to receipt of an acceptance signal in response to the association request. Accordingly directional transmissions can be utilized transmit at least part of an association request and to transmit an acceptance signal corresponding to the association request.
Type:
Grant
Filed:
August 15, 2008
Date of Patent:
December 2, 2014
Assignee:
Intel Corporation
Inventors:
Carlos Cordeiro, Alex Kesselman, Solomon Trainin
Abstract: A data processing system may comprise a primary basic input/output system (BIOS) image in a primary BIOS region and a rollback BIOS image in a rollback BIOS region. In one example method for upgrading the BIOS, the data processing system may establish a measured launch environment (MLE). In response to a BIOS update request, the data processing system may replace the primary BIOS image with a new BIOS image while running the MLE. After a reset operation, the data processing system may automatically boot to the rollback BIOS image and may use the rollback BIOS to automatically determine whether the new BIOS image is authentic. In response to a determination that the new BIOS image is authentic, the data processing system may copy the new BIOS image from the primary BIOS region to the rollback BIOS region. Other embodiments are described and claimed.
Type:
Grant
Filed:
August 1, 2012
Date of Patent:
December 2, 2014
Assignee:
Intel Corporation
Inventors:
William T. Futral, Thanunathan Rangarajan, Raghavendra Y K
Abstract: Methods and apparatus for tunneling platform management messages through inter-processor interconnects. Platform management messages are received from a management entity such as a management engine (ME) at a management component of a first processor targeted for a managed device operatively coupled to a second processor. Management message content is encapsulated in a tunnel message that is tunneled from the first processor to a second management component in the second processor via a socket-to-socket interconnect link between the processors. Once received at the second management component the encapsulated management message content is extracted and the original management message is recreated. The recreated management message is then used to manage the targeted device in a manner similar to if the ME was directly connected to the second processor. The disclosed techniques enable management of platform devices operatively coupled to processors in a multi-processor platform via a single management entity.
Type:
Grant
Filed:
June 25, 2012
Date of Patent:
December 2, 2014
Assignee:
Intel Corporation
Inventors:
Luke Chang, Mahesh S. Natu, James R. Vash, Michelle M. Sebot, Robert J. Safranek
Abstract: Methods and apparatus for provision of equalization effort-balancing of transmit (TX) Finite Impulse Response (FIR) and receive (RX) Linear Equalizer (LE) or RX Decision Feedback Equalizer (DFE) structures in high-speed serial interconnects are described. In some embodiments, data corresponding to a plurality of transmit equalization values and a plurality of receive equalization values for each lane of a link having a plurality of lanes is detected. At least one of the plurality of the transmit equalization values and at least one of the plurality of the receive equalization values are selected for each lane of the plurality of lanes of the link based on detection of saturation in a Decision Feedback Equalizer (DFE) tap of a corresponding lane of the link. Other embodiments are also claimed and/or disclosed.
Type:
Grant
Filed:
September 29, 2012
Date of Patent:
December 2, 2014
Assignee:
Intel Corporation
Inventors:
Manuel A. Aguilar-Arreola, Eric J. Msechu
Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.
Type:
Application
Filed:
August 8, 2014
Publication date:
November 27, 2014
Applicant:
Intel Corporation
Inventors:
Ohad Falik, Ben-Zion Friedman, Jacob Doweck, Eliezer Weissmann, James B Crossland
Abstract: Embodiments of the invention are generally directed to systems, methods, and apparatuses for linear to physical address translation with support for page attributes. In some embodiments, a system receives an instruction to translate a memory pointer to a physical memory address for a memory location. The system may return the physical memory address and one or more page attributes. Other embodiments are described and claimed.
Type:
Application
Filed:
August 8, 2014
Publication date:
November 27, 2014
Applicant:
Intel Corporation
Inventors:
Ohad Falik, Ben-Zion Friedman, Jacob Doweck, Eliezer Weissmann, James B Crossland
Abstract: A wireless device, such as a laptop computer or a cellular phone, may contain confidential information which may be secured by an internal security system. When the device is stolen, the user can provide a portion of a kill code to a wireless service provider. The wireless service provider provides its own portion of the kill code and combines it with the user's supplied code. Then, the service provider may transmit the combined kill code to the wireless device. Upon receipt, the wireless device may erase all confidential information on the device. In other embodiments, it may erase any unlocked block of memory. As still another alternative, the system may also, upon receipt of the combined kill code, disable the operating system.
Abstract: Methods and apparatus relating to ring protocols and techniques are described. In one embodiment, a first agent generates a request to write to a cache line of a cache over a first ring of a computing platform. A second agent that receives the write request forwards it to a third agent over the first ring of the computing platform. In turn, a third agent (e.g., a home agent) receives data corresponding to the write request over a second, different ring of the computing platform and writes the data to the cache. Other embodiments are also disclosed.
Type:
Grant
Filed:
May 23, 2013
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Meenakshisundaram R. Chinthamani, R. Guru Prasadh, Hari K. Nagpal, Phanindra K. Mannava
Abstract: Integrated circuits including MOSFETs with selectively recessed gate electrodes. Transistors having recessed gate electrodes with reduced capacitive coupling area to adjacent source and drain contact metallization are provided alongside transistors with gate electrodes that are non-recessed and have greater z-height. In embodiments, analog circuits employ transistors with gate electrodes of a given z-height while logic gates employ transistors with recessed gate electrodes of lesser z-height. In embodiments, subsets of substantially planar gate electrodes are selectively etched back to differentiate a height of the gate electrode based on a given transistor's application within a circuit.
Type:
Grant
Filed:
September 7, 2012
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Srijit Mukherjee, Christopher J. Wiegand, Tyler J. Weeks, Mark Y. Liu, Michael L. Hattendorf
Abstract: An analog associative memory, which includes an array of coupled voltage or current controlled oscillators, matches patterns based on shifting frequencies away from a center frequency of the oscillators. Test and memorized patterns are programmed into the oscillators by varying the voltage or current that controls the oscillators. Matching patterns result in smaller shifts of frequencies and enable synchronization of oscillators. Non-matching patterns result in larger shifts and preclude synchronization of oscillators. The patterns may each include binary data and the pattern matching may be based on discrete shifts. The patterns may each include grayscale data and the pattern matching may be based on continuously-varied shifts. Other embodiments are described herein.
Type:
Grant
Filed:
September 28, 2012
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
George I. Bourianoff, Dmitri E. Nikonov
Abstract: An approach is provided to mitigate phase noise by correcting common phase error and inter-carrier-interference in a received signal. The approach involves determining a received signal includes phase noise comprising at least a common phase error component and an inter-carrier-interference component. The approach also involves causing the common phase error to be corrected based on one or more pilot carriers. The approach further involves causing an estimate of a main signal component to be subtracted from the one or more pilot carriers. The approach additionally involves determining a sequence of estimated coefficients of a multiplicative phase noise sequence. The approach also involves causing the inter-carrier-inference to be corrected by processing the multiplicative phase noise sequence using the sequence of estimated coefficients. The approach further involves causing an equalized data signal to be output based on the corrected common phase error and the corrected inter-carrier-interference.
Type:
Grant
Filed:
December 14, 2012
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Thushara Hewavithana, Bernard Arambepola
Abstract: A system and a method for a mobility measurement in a wireless network comprises determining at a wireless terminal a channel power estimation ES for a carrier signal based on Channel State Information Reference Signals (CSI-RS), and determining at the wireless terminal a noise plus interference I+N for the carrier signal based on a muted CSI-RS. The carrier signal is an additional carrier without the presence of a Cell-specific Reference Signal. In one exemplary embodiment, the periodicity of the CSI-RS is selected to be 1, 2 or 3 subframes.
Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for surface treatment of an integrated circuit (IC) substrate. In one embodiment, an apparatus includes an integrated circuit substrate, an interconnect structure disposed on the integrated circuit substrate, the interconnect structure being configured to route electrical signals to or from the integrated circuit substrate and comprising a metal surface, and a protective layer disposed on the metal surface of the interconnect structure, the protective layer comprising a first functional group bonded with the metal surface and a second functional group bonded with the first functional group, wherein the second functional group is hydrophobic to inhibit contamination of the metal surface by hydrophilic materials and further inhibits oxidation of the metal surface. Other embodiments may be described and/or claimed.
Type:
Grant
Filed:
August 31, 2012
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Suriyakala Ramalingam, Rajen S. Sidhu, Nisha Ananthakrishnan, Sivakumar Nagarajan, Wei Tan, Sandeep Razdan, Vipul V. Mehta
Abstract: In an embodiment, a processor includes a graphics domain including a graphics engines each having at least one execution unit. The graphics domain is to schedule a touch application offloaded from a core domain to at least one of the plurality of graphics engines. The touch application is to execute responsive to an update to a doorbell location in a system memory coupled to the processor, where the doorbell location is written responsive to a user input to the touch input device. Other embodiments are described and claimed.
Type:
Grant
Filed:
March 5, 2013
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Balaji Vembu, David I. Poisner, Arvind Kumar, Chaitanya R. Gandra
Abstract: Some demonstrative embodiments include devices, systems and/or methods of wireless communication via multiple antenna assemblies. For example, a device may include a wireless communication unit to transmit and receive signals via one or more quasi-omnidirectional antenna assemblies, wherein the wireless communication unit is to transmit, via each quasi-omnidirectional antenna assembly, a plurality of first transmissions, to receive, in response to the first transmissions, a plurality of second transmissions from another device via one or more of the quasi-omnidirectional antenna assemblies, and, based on the second transmissions, to select at least one selected transmit antenna assembly for transmitting to the other device and a selected receive antenna assembly for receiving transmissions from the other device. Other embodiments are described and claimed.
Abstract: An embodiment of the present invention provides an apparatus, comprising a transceiver operable in a wireless personal area network, wherein the transceiver is configured to communicate with a coordinator and at least one receiver and wherein the transceiver and the coordinator use a directional reservation of free channel time blocks using contention-based slots, by selecting uniformly at random contention slots by the transceiver and transmitting a bandwidth reservation request message specifying the requested reservation period using directional transmission pointed towards the coordinator.
Type:
Grant
Filed:
August 21, 2008
Date of Patent:
November 25, 2014
Assignee:
Intel Corporation
Inventors:
Alex Kesselman, Solomon Trainin, Yuval Bachrach
Abstract: A navigation system and method involving wireless communications technology and speech processing technology is presented. In accordance with an embodiment of the invention, the navigation system includes a subscriber unit communicating with a service provider. The subscriber unit includes a global positioning system mechanism to determine subscriber position information and a speech processing mechanism to receive destination information spoken by a subscriber. The subscriber unit transmits the subscriber position and destination information to the service provider, which gathers navigation information, including a map and a route from the subscriber position to the specified destination. The service provider transmits the navigation information to the subscriber unit. The subscriber unit conveys the received navigation information to the subscriber via an output mechanism, such as a speech synthesis unit or a graphical display.