Abstract: Systems, methods, processors, media, and other embodiments associated with integer rounding a floating point number in one micro-operation (uop) are described. One system embodiment includes a memory to store an integer rounding floating point instruction and a processor to perform the integer rounding floating point instruction. The processor may include a floating point unit that includes circuits and/or logics that integer round the floating point number.
Type:
Grant
Filed:
June 6, 2006
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Mohammad Abdallah, Chad D. Hancock, Kwok W. Lui
Abstract: A method includes the operations of buffering group-addressed frames; generating a first signal field comprising a first rate code selected from a plurality of invalid rate codes; receiving a trigger frame from a wireless station; and transmitting the first signal field in combination with the buffered group-addressed frames in response to the trigger frame.
Abstract: A method and system for implementing a gain control with fine resolution and minimal additional circuitry. The fine digital gain control may be deployed in conjunction with a coarse switched gain at the front end of a sampling receiver. The fine digital gain control mechanism is configured to receive an input signal and moderate gains applied to the received input signal. The output of a low noise amplifier (LNA) is connected to a switched attenuator which provides fine gain stepped gain control. The output of this stage is connected to the switch stage whose output is connected to a charge redistribution successive approximation register digital-to-analog converter (SAR ADC) configured to convert an analog waveform into a digital representation.
Type:
Grant
Filed:
January 14, 2013
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Nicholas P. Cowley, Isaac Ali, Viatcheslav I. Suetinov, Keith Pinson
Abstract: A method and system for supporting personal computing in a public computing infrastructure. The system includes a plurality of computers to be used by patrons of the public computing infrastructure. The system includes a server coupled to the plurality of computers via a network connection. Each of the plurality of computers includes a virtual machine monitor, which includes a plurality of base virtual machine images. Each of the base virtual machine images is customized for a particular hardware and software configuration representing a specific computing environment. The virtual machine monitor launches one of the plurality of base virtual machine images, arbitrates access to system resources via the launched virtual machine image, stores the changes in the state of the virtual machine image when a user terminates a session, and returns a computer to an appropriate state to enable the user to resume the terminated session in subsequent sessions.
Abstract: A method for fabricating a semiconductor chip module and a semiconductor chip package is disclosed. One embodiment provides a first layer, a second layer, and a base layer. The first layer is disposed on the base layer, and the second layer is disposed on the first layer. A plurality of semiconductor chips is applied above the second layer, and the second layer with the applied semiconductor chips is separated from the first layer.
Abstract: A method and apparatus to perform Cyclic Redundancy Check (CRC) operations on a data block using a plurality of different n-bit polynomials is provided. A flexible CRC instruction performs a CRC operation using a programmable n-bit polynomial. The n-bit polynomial is provided to the CRC instruction by storing the n-bit polynomial in one of two operands.
Abstract: Method and apparatus for expedited virtual machine (VM) launch in VM cluster environment. In one embodiment, at least one VM is launched within a host platform. Once initialized, a VM may issue a hypercall to a VM monitor (VMM) of a VM host platform. In response, the VMM may capture a runtime image of the VM. In one embodiment, the VMM loads the runtime image of the VM within a node of the host platform as a child VM. In an alternative embodiment, the VMM issues a VM clone command to a VMM of a next host platform including the runtime image of the VM. In response, the VMM of the next platform loads the runtime image of the first VM within a node of the second host platform as a cloned VM. Other embodiments are described and claimed.
Abstract: In some embodiments, a method includes receiving a plurality of video signal fields, characterizing at least one portion of at least one of the plurality of video signal fields, determining a value for a pixel using inter-field de-interlacing if the characterization satisfies a first criteria, determining a value for a pixel using motion compensated de-interlacing if the characterization satisfies a second criteria, and determining a value for a pixel using intra-field de-interlacing if the characterization satisfies a third criteria. In some embodiments, an apparatus includes a storage medium having stored instructions that when executed by a machine result in the method.
Abstract: The present disclosure relates to the fabrication of non-volatile memory devices. In at least one embodiment, a single transistor may be used to drive each address line, either a wordline or a bitline. Both an inhibit voltage and a selection voltage may be driven through these single transistor devices, which may be achieved with the introduction of odd and even designations for the address lines. In one operating embodiment, a selected address line may be driven to a selection voltage, and the address lines of the odd or even designation which is the same as the selected address line are allowed to float. The address lines of the odd or even designation with is different from the selected address lines are driven to an inhibit voltage, wherein adjacent floating address lines may act as shielding lines to the selected address line.
Abstract: A memory device has multiple dielectric barrier regions. A memory device has multiple barrier regions that provide higher or lower current-voltage slope compared to a memory device having a single barrier region. The device also has electrode regions that provide further control over the current-voltage relationship.
Abstract: A technique to retain cached information during a low power mode, according to at least one embodiment. In one embodiment, information stored in a processor's local cache is saved to a shared cache before the processor is placed into a low power mode, such that other processors may access information from the shared cache instead of causing the low power mode processor to return from the low power mode to service an access to its local cache.
Type:
Grant
Filed:
March 6, 2013
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Sanjeev Jahagirdar, Varghese George, Jose P. Allarey
Abstract: A system includes a host and a network controller coupled to the host by a bus. The system includes logic to classify Transmission Control Protocol/Internet Protocol (TCP/IP) receive packets based on the network source, network destination, port source, and port destination of the respective receive packets; and cause queuing of the receive packets in a one of multiple receive queues based on the classifying such that receive packets having the same network source, network destination, port source, and port destination are to be queued to the same one of the multiple queues for processing.
Type:
Grant
Filed:
May 2, 2011
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Erik K. Mann, Patrick L. Connor, Diamant Nimrod
Abstract: According to various embodiments, a computer-implemented method is disclosed that includes receiving a field in a frame or a frame from the one or more STAs, wherein the field in a frame or the frame includes information on buffered traffic and a timeout value for a given access category (AC); and scheduling the one or more STAs to transmit uplink traffic simultaneously through a polling frame.
Abstract: Embodiments of the present disclosure provide optical connection techniques and configurations. In one embodiment, an apparatus includes a substrate, a laser device formed on the substrate, the laser device including an active layer configured to emit light, and a mode-expander waveguide disposed on the substrate and butt-coupled with the active layer to receive and route the light to a waveguide formed on another substrate. Other embodiments may be described and/or claimed.
Type:
Grant
Filed:
June 28, 2012
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Jia-Hung Tseng, Peter L. Chang, Miriam R. Reshotko, Ibrahim Ban, Mauro J. Kobrinsky, Brian Corbett, Roberto Pagano
Abstract: Embodiments of methods and apparatus for providing a handover control system associated with a wireless communication network are generally described herein. Other embodiments may be described and claimed.
Abstract: Some demonstrative embodiments include devices, systems and/or methods of detecting transmitter power. For example, a device may include a power detection circuit, coupled by a first coupler to a transmit chain, to provide a first output representing a measured non-calibrated transmission power over the transmit chain; a reference circuit, coupled to a reference voltage by a second coupler, to provide a second output representing a measured reference coupling factor; and a calibrator to determine a calibrated transmission power over the transmit chain based on the first and second outputs.
Abstract: Techniques are disclosed that involve the indication of neighbor base stations. For instance, a base station may generate and wirelessly transmit a message that indicates a plurality of neighboring base stations. This message may include an indicator having one or more wildcard values. Through the employment of such wildcard values, the indicator may provide information corresponding to the plurality of neighboring base stations. For instance, the indicator may indicate a plurality of base station identifiers (BSIDs). Alternatively, the indicator may indicate a plurality of preamble indices. As a further alternative, the indicator may indicate a plurality of carrier frequencies. Through the employment of such techniques, overhead can be saved without causing ambiguity in mobility management.
Type:
Grant
Filed:
October 28, 2010
Date of Patent:
May 20, 2014
Assignee:
Intel Corporation
Inventors:
Avishay Sharaga, Muthaiah Venkatachalam, Xiangying Yang
Abstract: A method of removing a first data race condition by generating a list of suggested solutions is provided. The method comprises detecting the first data race condition involving a shared resource that is accessed first by a first thread and then by a second thread; suggesting one or more solutions using a lockset mechanism; suggesting one or more solutions using a vector clock mechanism; suggesting that a user create a new synchronization object; suggesting that a user replicate the shared resource; and displaying the list to the user.
Abstract: Navigation systems for use in indoor environments may include a navigation system that can calculate the time of flight of signals between a navigation device and a WiFi Access Point. Such a calculation can be more accurate not just by using more accurate oscillators in devices, but by correcting the relative error between two devices. This error may be found by determining a timing offset correction, the difference in accuracy between the navigation device and the WiFi Access Point. This may be performed by performing a fine frequency estimation on a long training field or by receiving the PPM offset from another device. Once the PPM offset is determined, the accuracy of the navigation device can be improved by a factor of 50 using a series of equations described in the disclosure.
Type:
Application
Filed:
June 25, 2013
Publication date:
May 15, 2014
Applicant:
Intel Corporation
Inventors:
Leor Banin, Yuval Amizur, Uri Schatzberg, Adrian P. Stephens
Abstract: Frame rate conversion may be implemented using motion estimation results. Specifically, as part of the motion estimation, pixels may be labeled based on the number of matching pixels in subsequent frames. For example, pixels may be labeled as to whether they have no matching pixels, one matching pixels, or multiple matching pixels. The motion estimation and pixel labeling may then be used to interpolate pixels for frame rate conversion.