Abstract: A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations on data elements in said first packed data and said second packed data to generate a third packed data in response to receiving an instruction. At least two of the data elements in this third packed data storing the result of performing multiply-add operations on data elements in the first and second packed data.

Abstract: A method and apparatus may be used for exchanging measurements in wireless communications. The apparatus may receive a request. The request may be a measurement request, and may include a request for a measurement of a parameter. The apparatus may transmit a report. The report may be a measurement report, and may include the requested measurement of a parameter. The apparatus may store the requested measurement of the parameter in a management information base (MIB).

Abstract: A system is disclosed. An input interface is configured to receive pixel data from two or more images. A pixel handling processor disposed on the substrate is configured to convert the pixel data into depth and intensity pixel data. In some embodiments, a foreground detector processor disposed on the substrate is configured to classify pixels as background or not background. In some embodiments, a projection generator disposed on the substrate is configured to generate a projection in space of the depth and intensity pixel data.

Abstract: Described are embodiments of methods, apparatus, and systems for detecting incompressible data and selectively compressing compressible data without compressing the incompressible data. A method may include determining a first compressibility value of first data of a plurality of input data and a second compressibility value of second data of the plurality of input data, determining that the first data is incompressible based at least in part on the first compressibility value relative to a compressibility threshold, and compressing the second data of the plurality of input data. Other embodiments may be described and claimed.

Abstract: A method according to one embodiment may include discovering, by software, at least one variable from at least one component populated on a shelf system. The method may also include performing, by the software, at least one shelf management function based on at least one variable. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: Systems and methods of managing power provide for issuing a first operating requirement from a first processor core and issuing a second operating requirement from a second processor core. In one embodiment, the operating requirements can reflect either a power policy or a performance policy, depending upon the factor that is currently most important to software. Hardware coordination logic is used to coordinate a shared resource setting with the operating requirements. The hardware coordination logic is also able to coordinate the shared resource setting with independent resource settings of the first and second processor cores based on the operating requirements.

Abstract: Methods and systems to authenticate and load a plurality of boot logic modules in corresponding access protected memory regions of memory, and to maintain the access protections in run-time environments. Access protection may be implemented with access control list (ACL) policies expressed in terms of page boundaries to distinguish between read, write, and execute access requests.

Abstract: In one embodiment, a processor can perform a function call from a main program to a function that is to operate on at least one vector-type operand, in which only scalar values are passed to the function, and input values to the function including the at least one vector-type operand are to be renamed from virtual registers identified in the function to physical registers of a vector register file, and output values from the function including the at least one vector-type operand are to be renamed from virtual registers identified in the function to physical registers of the vector register file. Other embodiments are described and claimed.

Abstract: A method to provide a transistor or memory cell structure. The method comprises: providing a substrate including a lower Si substrate and an insulating layer on the substrate; providing a first projection extending above the insulating layer, the first projection including an Si material and a Si1-xGex material; and exposing the first projection to preferential oxidation to yield a second projection including a center region comprising Ge/Si1-yGey and a covering region comprising SiO2 and enclosing the center region.

Abstract: Embodiments of apparatus, computer-implemented methods, systems, and computer-readable media are described herein for a virtual machine manager, wherein the virtual machine manager is configured to selectively employ different views with different permissions to map guest physical memory of a virtual machine of the apparatus to host physical memory of the apparatus, to regulate access to and protect different portions of an application of the virtual machine that resides in different portions of the physical memory. Other embodiments may be described and/or claimed.

Abstract: Methods, apparatuses and storage medium associated with securely provisioning a digital content protection scheme are disclosed. In various embodiments, a method may include forming a trust relationship between a media application within an application execution environment of a device and a security controller of the device. The application execution environment may include an operating system, and the operating system may control resources within the application execution environment. Additionally, the security controller may be outside the application execution environment, enabling components of the security controller to be secured from components of the operating system. Further, the method may include the security controller in enabling a digital content protection scheme for the media application to provide digital content to a digital content protection enabled transmitter within the application execution environment for provision to a digital content protection enabled receiver.

Abstract: Systems, devices and methods for performing luma-based chroma ultra prediction are described. Down-sample filters may be applied to luma values of luma pixel positions to generate reconstructed luma values for chroma pixel positions in a prediction unit of an intra frame. The down-sampled reconstructed luma values may then be used to predict chroma values for the chroma pixel positions. In some implementations, a reconstructed luma value of a chroma position may be used to predict that position's chroma value. In other implementations, reconstructed luma values of neighboring chroma pixel positions may be analyzed to adaptively predict a chroma value for a chroma pixel position.

Abstract: A method of manufacturing an embedded passive device for a microelectronic application comprises steps of providing a substrate (110, 210, 310), nanolithographically forming a first section (121, 221, 321) of the embedded passive device over the substrate, and nanolithographically forming subsequent sections (122, 222, 322) the embedded passive device adjacent to the first section. The resulting embedded passive device may contain features less than approximately 100 nm in size.

Abstract: Disclosed herein are systems, methods and storage medium associated with native cloud computing. In embodiments, a system may include a number of clusters of computing nodes, and a data communication network configured to couple the clusters of computing nodes. The system may further include a control node configured to segment or cause segmentation of the data communication network to isolate a cluster of the computing nodes from other clusters of the computing nodes, t for allocation for native execution of a computation task. The system may further include a control network coupled to the data communication network and the control node. Other embodiments may be disclosed and claimed.

Abstract: A speech processing engine is provided that in some embodiments, employs Kalman filtering with a particular speaker's glottal information to clean up an audio speech signal for more efficient automatic speech recognition.

Abstract: Photodetectors operable to achieve multiplication of photogenerated carriers at ultralow voltages. Embodiments include a first p-i-n semiconductor junction combined with a second p-i-n semiconductor junction to form a monolithic photodetector having at least three terminals. The two p-i-n structures may share either the p-type region or the n-type region as a first terminal. Regions of the two p-i-n structures doped complementary to that of the shared terminal form second and third terminals so that the first and second p-i-n structures are operable in parallel. A multiplication region of the first p-i-n structure is to multiply charge carriers photogenerated within an absorption region of the second p-i-n structure with voltage drops between the shared first terminal and each of the second and third terminals being noncumulative.

Abstract: An embodiment of the present invention provides a method, comprising optimizing the location and configuration of relay stations in a wireless network that includes at least one base station and at least one relay station by taking into account at least one or more of the following: the distinct antenna heights of said at least one base station and said at least one relay station; the data dependency between said at least one relay station and said at least one base station; the service outage of said wireless network; and the network throughput of said wireless network.

Abstract: Methods and apparatus are disclosed for virtualizable, forward-compatible hardware-software interfaces. Embodiments may be used in a driver whether it is a physical driver or a virtual driver. Commands are queued from the driver and fetched to the device. An actions table is accessed to determine if drivers are permitted to perform commands. Events are queued for the drivers responsive to commands. If drivers are not permitted to perform a command, device firmware may forward the command to a privileged driver to perform the required command. If a driver is only permitted to perform a command with assistance the command is forwarded for corrections and execution. If a command is to be dropped, a completion event may be queued as if the command had executed. Drivers may have no indication of which actions were taken. The actions table may be changed for hardware/software modifications or dynamically according to configuration changes.

Abstract: Embodiments of techniques and systems for using substitute virtualized-memory page tables are described. In embodiments, a virtual machine monitor (VMM) may determine that a virtualized memory access to be performed by an instruction executing on a guest software virtual machine is not allowed in accordance with a current virtualized-memory page table (VMPT). The VMM may select a substitute VMPT that permits the virtualized memory access, In scenarios where a data access length for the instruction is known, the substitute VMPT may include full execute, read, and write permissions for the entire guest software address space. In scenarios where a data access length for the instruction is not known, the substitute VMPT may include less than full execute, read, and write permissions for the entire guest software address space, and may be modified to allow the requested virtualized memory access. Other embodiments may be described and claimed.

Abstract: A method for operating a cache that includes both robust cells and standard cells may include receiving a data to be written to the cache, determining whether a type of the data is unmodified data or modified data, and writing the data to robust cells or standard cells as a function of the type of the data. A processor includes a core that includes a cache including both robust cells and standard cells for receiving data, wherein the data is written to robust cells or standard cells as a function of whether a type of the data is determined to be unmodified data or modified data.