Abstract: Semiconductor packages with programmable routing pathways are disclosed. The semiconductor package may have a source trace that may be electrically coupled to two or more different electrical pathways, where any of the electrical pathways may be activated to provide an electrical connection between the source trace and one or more destination nodes. Each of the electrical pathways may have a corresponding metal well with a correspond airgap overlying the metal well, as well as corresponding heating elements. If a particular heating element is energized, the heating element may melt metal in a corresponding metal well and the molten metal may migrate by capillary action into the overlying airgap to complete an electrical connection between the source trace and a destination node.

Abstract: Systems and methods for tracking cache line consumption. An example system may comprise: a cache comprising a plurality of cache entries for storing a plurality of cache lines; a processing core, operatively coupled to the cache; and a cache control logic, to: responsive to detecting an update operation with respect to a cache line of the plurality of cache lines, set a cache line access tracking flag associated with the cache line to a first state indicating that the cache line has been produced; and responsive to detecting a read operation with respect to the cache line, set the cache line access tracking flag associated with the cache line to a second state indicating that the cache line has been consumed.

Abstract: An apparatus is described having an electrical interface that supports a first specification and a second specification. The first specification specifies differentially transmitted data. The second specification specifies at least three transmitted data signals. The electrical interface includes a plurality of modular transmitter circuits where each transmitter circuit includes a single ended driver and a select circuit. The select circuit is to select either one end of a differential signal associated with the first specification or one of the at least three transmitted data signals associated with the second specification.

Abstract: Techniques are provided for segmentation of a hand from a forearm in an image frame. A methodology implementing the techniques according to an embodiment includes estimating a wrist line within an image shape that includes a forearm and a hand. The wrist line estimation is based on a search for a minimum width region of the shape that is surrounded by adjacent regions of greater width on each side of the minimum width region. The method also includes determining a forearm segment, and a hand segment that is separated from the forearm segment by the wrist line. The method further includes labeling the forearm segment and the hand segment. The labeling is based on a connected component analysis of the forearm segment and the hand segment. The method further includes removing the labeled forearm segment from the image frame to generate the image segmentation of the hand.

Abstract: Apparatuses and methods associated with an antenna formed on a transparent substrate are disclosed herein. In embodiments, an electronic device may include a substrate, wherein at least a first region of a plurality of regions of the substrate is transparent; and a plurality of layers formed on the substrate, the plurality of layers including: a first transparent layer formed over the first region; and a second metal layer formed over a second region of the plurality of regions of the substrate, wherein the second metal layer comprises an antenna. Other embodiments may be disclosed or claimed.

Abstract: A flexible aes instruction for a general purpose processor is provided that performs aes encryption or decryption using n rounds, where n includes the standard aes set of rounds {10, 12, 14}. A parameter is provided to allow the type of aes round to be selected, that is, whether it is a “last round”. In addition to standard aes, the flexible aes instruction allows an AES-like cipher with 20 rounds to be specified or a “one round” pass.

Abstract: An embodiment of a semiconductor apparatus may include technology to determine a differentiator associated with an access request for two or more memory devices, and set a target order for the two or more memory devices based on the differentiator. Other embodiments are disclosed and claimed.

Abstract: Techniques are disclosed to provide a data dependent delay for a multi-phase transmitter architectures. These techniques include identifying a current segment occupied by a symbol associated with in-phase (I) and quadrature phase (Q) data within a data constellation based upon the number of phases used. Once the segment is identified, vector components are calculated as a function of the segment used to re-map the symbol within the constellation defined in accordance with the number of phases. The data delay may be performed in the baseband or at the RF rate to time-align local oscillator clocks with the delayed data, which is represented as the calculated vector components, for transmission. Further modifications to the RF-DAC operation to facilitate operation with the multi-phase system are also disclosed.

Abstract: A method and system to provide user-level multithreading are disclosed. The method according to the present techniques comprises receiving programming instructions to execute one or more shared resource threads (shreds) via an instruction set architecture (ISA). One or more instruction pointers are configured via the ISA; and the one or more shreds are executed simultaneously with a microprocessor, wherein the microprocessor includes multiple instruction sequencers.

Abstract: An example apparatus for depth sensing includes an image data receiver to receive image data from a communication camera and an augmented reality (AR) camera. The apparatus also includes a modulated light detector to detect one or more modulated lights in the image data from the communication camera. The apparatus further includes a representation generator to generate a visual representation of a local image region for each of the detected modulated lights. The apparatus includes a region matcher to match the visual representation for each of the detected modulated lights with a region in the image data received from the AR camera. The apparatus also further includes a distance estimator to estimate a distance between a dual camera receiver and the one or more modulated lights based on a disparity between a position of the visual representation and a position of the matched region in the image data.

Abstract: Techniques are provided for radio frequency interconnections between oscillators and transmission lines for oscillatory neural networks (ONNs). An ONN gate implementing the techniques according to an embodiment includes a transmission line, a first oscillator circuit tuned to a first frequency based on a first tuning voltage associated with a first synapse weight, and a first capacitive coupler to couple the first oscillator circuit to the transmission line to generate an oscillating signal in the transmission line. The ONN gate further includes a second oscillator circuit tuned to a second frequency based on a second tuning voltage associated with a second synapse weight, and a second capacitive coupler to couple the second oscillator circuit to the transmission line to adjust the oscillating signal in the transmission line such that the amplitude of the adjusted oscillating signal is associated with a degree of match between the first frequency and the second frequency.

Abstract: Described herein are ferroelectric (FE) memory cells that include transistors having gates with FE capacitors integrated therein. An example memory cell includes a transistor having a semiconductor channel material, a gate dielectric over the semiconductor material, a first conductor material over the gate dielectric, a FE material over the first conductor material, and a second conductor material over the FE material. The first and second conductor materials form, respectively, first and second capacitor electrodes of a capacitor, where the first and second capacitor electrodes are separated by the FE material (hence, a “FE capacitor”). Separating a FE material from a semiconductor channel material of a transistor with a layer of a gate dielectric and a layer of a first conductor material eliminates the FE-semiconductor interface that may cause endurance issues in some other FE memory cells.

Abstract: A method and apparatus for auto range control are described. In one embodiment, the apparatus comprises a projector configured to project a sequence of light patterns on an object; a first camera configured to capture a sequence of images of the object illuminated with the projected light patterns; a controller coupled to the projector and first camera and operable to receive the sequence of images and perform range control by controlling power of the sequence of light patterns being projected on the object and exposure time of a camera based on information obtained from the sequence of images captured by the camera.

Abstract: Disclosed herein are selector devices and related devices and techniques. For example, in some embodiments, a selector device may include a first electrode, a second electrode, and a selector material stack between the first electrode and the second electrode. The selector material stack may include a dielectric material layer between a first conductive material layer and a second conductive material layer. A first material layer may be present between the first electrode and the first conductive material layer, and a second material layer may be present between the first conductive material layer and the dielectric layer. The first material layer and the second material layer may be diffusion barriers, and the second material layer may be a weaker diffusion barrier than the first material layer.

Abstract: Systems, apparatuses and methods may provide for technology that conducts a real-time analysis of interior sensor data associated with a vehicle, exterior sensor data associated with the vehicle and environmental data associated with the vehicle. Additionally, the technology may determine whether a hazard condition exists based on the real-time analysis, wherein the hazard condition includes a deviation of a current behavior waveform from a reference behavior waveform by a predetermined amount. In one example, a safety measure is triggered with respect to the vehicle if the hazard condition exists. The safety measure may be selected based on a reaction time constraint associated with the hazard condition.

Abstract: A mechanism is described for facilitating deep learning inference acceleration in computing environments. An apparatus of embodiments, as described herein, includes one or more processors to compare a current input value associated with a layer of a plurality of layers of a neural network to a cached input value associated with the layer. The one or more processors are further to import the cached input value for the layer for further processing within the neural network, if the current input value and the cached input value are equal.

Abstract: In embodiments, a semiconductor package may include a first die and a second die. The package may additionally include a serializer/deserializer (SerDes) die coupled with the first and the second dies. The SerDes die may be configured to serialize signals transmitted from the first die to the second die, and deserialize signals received from the second die. Other embodiments may be described and/or claimed.

Abstract: Electronic device package technology is disclosed. An electronic device package can comprise a substrate. The electronic device package can also comprise a thermally conductive post extending from the substrate. In addition, the electronic device package can comprise an electronic component supported by the thermally conductive post. The thermally conductive post can facilitate heat transfer between the electronic component and the substrate. Associated systems and methods are also disclosed.

Abstract: An apparatus to facilitate register sharing is disclosed.

Abstract: Technologies for cross-device shared web resource caching include a client device (102a) and a shared cache device (102b). The client device (102a) scans for a shared cache device (102b) in local proximity to the client device (102a) and, in response to the scan, registers with the shared cache device (102b). After registering, the client device (102a) requests a cached web resource from the shared cache device (102b). The shared cache device (102b) determines whether a cached web resource that matches the request is installed in a shared cache (102b). The shared cache device (102b) may determine whether an origin of the request matches the origin of the cached web resource. If installed, the shared cache device (102b) sends a found response and the cached web resource to the client device (102a). If not installed, the shared cache device (102b) sends a not-found response and the client device (102a) may request the web resource from a remote web server. Other embodiments are described and claimed.