Patents Assigned to Intel Corporations
  • Patent number: 9430640
    Abstract: A method, device, and system for browser-based application security verification is disclosed. A client device requests a browser-based application from a web server. An application security module of the client device intervenes and transmits an application verification request to a cloud service system. The cloud service system retrieves data regarding the security of the application and source from cloud resources and a local database of the cloud server. The cloud service system then uses the data to authenticate the source and verify the security of the browser-based application. The cloud service system provides the client device with a recommendation regarding the security of the browser-based application and updates its local database. The client device may then consider the recommendation in determining whether to download or execute the browser-based application and provide feedback to the cloud service system.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Hong Li, James R. Blakley, Rita H. Wouhaybi, John B. Vicente, Mark D. Yarvis
  • Patent number: 9430384
    Abstract: Instructions and logic provide advanced paging capabilities for secure enclave page caches. Embodiments include multiple hardware threads or processing cores, a cache to store secure data for a shared page address allocated to a secure enclave accessible by the hardware threads. A decode stage decodes a first instruction specifying said shared page address as an operand, and execution units mark an entry corresponding to an enclave page cache mapping for the shared page address to block creation of a new translation for either of said first or second hardware threads to access the shared page. A second instruction is decoded for execution, the second instruction specifying said secure enclave as an operand, and execution units record hardware threads currently accessing secure data in the enclave page cache corresponding to the secure enclave, and decrement the recorded number of hardware threads when any of the hardware threads exits the secure enclave.
    Type: Grant
    Filed: March 31, 2013
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Carlos V Rozas, Ilya Alexandrovich, Ittai Anati, Alex Berenzon, Michael A Goldsmith, Barry E Huntley, Anton Ivanov, Simon P Johnson, Rebekah M. Leslie-Hurd, Francis X. McKeen, Gilbert Neiger, Rinat Rappoport, Scott Dion Rodgers, Uday R. Savagaonkar, Vincent R. Scarlata, Vedvyas Shanbhogue, Wesley H Smith, William Colin Wood
  • Patent number: 9432682
    Abstract: A video system for coding a stream of video data that includes a stream of video frames divides each video frame into a matrix of a plurality of subblocks, wherein each subblock includes a plurality of pixels. The video system operates in accordance with nine prediction modes. Each prediction mode determines a prediction mode according to which a present subblock is to be coded. One of the nine prediction modes is selected to encode the present subblock, wherein the selected prediction mode provides for a minimum error value in the present subblock.
    Type: Grant
    Filed: December 24, 2013
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventor: Gregory J. Conklin
  • Patent number: 9432840
    Abstract: Methods and systems of managing radio based power may include a mobile platform having a plurality of radios and logic to detect changes in location for the mobile platform. The logic may also deactivate at least one of the plurality of radios in response to the changes in location. The changes in location may be detected based on location information obtained from one or more active radios in the plurality of radios and connection losses with respect to active radios in the plurality of radios.
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Kevin Traynor, Mark D. Gray
  • Patent number: 9432115
    Abstract: Some demonstrative embodiments include apparatuses, systems and/or methods of communicating positioning transmissions. For example, an apparatus may include a controller to control at least one light transmitter to transmit from a mobile object Intensity-Modulated (IM) optical signals including On-Off-Keying (OOK) signals of one or more positioning transmissions, the controller is to control the at least one light transmitter to transmit from the mobile object one or more first OOK signals over a first ranging frequency, and to transmit from the mobile object one or more second OOK signals over a second ranging frequency, the second ranging frequency is different from the first ranging frequency.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventor: Richard D. Roberts
  • Patent number: 9430435
    Abstract: Described are embodiments of methods, apparatuses, and systems for multi-protocol tunneling across a multi-protocol I/O interconnect of computer apparatus. A method for multi-protocol tunneling may include establishing a first communication path between ports of a switching fabric of a multi-protocol interconnect of a computer apparatus in response to a peripheral device being connected to the computer apparatus, establishing a second communication path between the switching fabric and a protocol-specific controller, and routing, by the multi-protocol interconnect, packets of a protocol of the peripheral device from the peripheral device to the protocol-specific controller over the first and second communication paths. Other embodiments may be described and claimed.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventors: Prashant R. Chandra, Kevin C. Kahn, Eran Galil, Efraim Kugman, Naama Zolotov, Vladimir Yudovich, Yoni Dishon, Elli Bagelman
  • Patent number: 9432155
    Abstract: An access point in a wireless network communicates with multiple mobile stations simultaneously using spatial-division multiple access.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventors: Qinghua Li, Minnie Ho, Adrian P. Stephens
  • Patent number: 9432229
    Abstract: One embodiment provides a network controller. The network controller includes a modulation module. The modulation module includes a high rate (HR) bit sequence generator configured to generate a first high rate bit sequence, encoder circuitry configured to encode a first low rate bit stream, the first low rate bit stream comprising backchannel information, and modulation circuitry configured to modulate the encoded first low rate bit stream onto the first high rate bit sequence. The network controller further includes transmit circuitry configured to transmit the modulated first HR bit sequence to a link partner during a link initialization period.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Frank N. Cornett, Brent R. Rothermel
  • Patent number: 9432465
    Abstract: Embodiments of techniques, apparatuses, systems and computer-readable media for consuming services for a user equipment (UE) apparatus are disclosed. In some embodiments, a first signal at a second signal are received respectively from a first and a second beacon apparatus, the signals indicating a service associated with the respective beacon apparatuses, and a list of neighboring services proximately disposed to the respective beacon apparatuses, a list is generated and displayed at the UE apparatus in accordance with ranking criterion of the lists and the first and second signal strengths of the first and second signals received at the UE. Other embodiments may be disclosed and/or claimed.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventor: Ulf Bjorkengren
  • Patent number: 9430818
    Abstract: A rasterizer, based on time-dependent edge equations, computes analytical visibility in order to render accurate motion blur. An oracle-based compression algorithm for the time intervals lowers the frame buffer requirements. High quality motion blurred scenes can be rendered using a rasterizer with rather low memory requirements. The resulting images may contain motion blur for both opaque and transparent objects.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Carl Johan Gribel, Michael Doggett, Tomas G. Akenine-Moller
  • Patent number: 9432093
    Abstract: Examples are disclosed for coordinating transmission of one or more protocol data units to a wireless device from a coordinating set of base stations. In some examples, coordinating may include exchanging information via a backhaul communication channel coupling or interconnecting the base stations included in the coordinating set of base stations. For these examples, one or more protocol data units may be transmitted to the wireless device from the coordinating set of base stations via a plurality of separate communication links based on the exchanged information. Other examples are described and claimed.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventors: Alexander Sirotkin, Alexei Davydov
  • Patent number: 9432522
    Abstract: The present invention is directed to an improved operations method for a wireless communication system. The improved business method, operations method, network and system of the present invention includes the steps of delivering cellular services to the mass market, reducing peak capacity, increasing overall capacity utilization, improving capital utilization, providing an “all-you-can-eat” pricing model, and designing capacity based upon where the users live, work, and play.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: S. Douglas Hutcheson, Michael Brink, Scot Jarvis
  • Patent number: 9430347
    Abstract: A chassis platform, such as processor or a system-on-chip (SoC), includes logic to implement a debug chassis security system including a policy generator to control access from a test access port. The policy generator may distribute a debug policy to at least one logic block that locally enforces the debug policy. The debug policy may include a delayed authentication policy in which debug assets are distributed and the chassis platform is initially locked to prevent debug access via the test access port. An authenticated debug user may unlock the chassis platform at a later time to enable debugging operations. The debug policy may also include a live execution policy and an immediate debug policy.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Michael Neve De Mevergnies, Hermann W. Gartler, Michael S. Bair
  • Patent number: 9430035
    Abstract: Interactive drawing recognition is described. In one example, a command is received indicating a type of drawing and a user drawing is observed. A library of drawing templates associated with the drawing type is accessed based on the command. The observed drawing is compared to the drawing templates to identify the observed drawing, and attributes are assigned to the identified drawing.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Glen J. Anderson, Cory J. Booth
  • Patent number: 9433017
    Abstract: Techniques for media access in wireless networks are disclosed. For instance, embodiments may provide a time interval for accessing a wireless communications channel. In addition, embodiments may prevent channel access during the time interval by stations incapable of employing a first channel access technique. This access technique employs an access probability P.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventors: Jing Zhu, Adrian Stephens, Ganesh Venkatesan
  • Patent number: 9431110
    Abstract: Methods, memories and systems to access a memory may include generating an address during a first time period, decoding the address during the first time period, and selecting one or more cells of a buffer coupled to a memory array based, at least in part, on the decoded address, during a second time period.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventor: Chang W. Ha
  • Patent number: 9430414
    Abstract: A disclosed computer system includes a processor, an I/O hub including a first host bus interface to communicate via a first transport bus, and a sensor hub. The sensor hub includes a first transport bus interface and a sensor hub microcontroller. The sensor hub microcontroller includes a peripheral stack that includes a second transport bus driver to communicate with a peripheral device via a second transport bus. The peripheral device may comply with a device specification such as the human interface device (HID) standard. The peripheral stack further includes a second transport bus plugin to adapt bus-specific operations to generic operations for the device specification, a device class driver to communicate bus-independent peripheral reports based on the generic operations, and a peripheral management module to coalesce multiple peripheral reports into a single instance visible to the I/O hub via the first transport bus interface and the first host bus interface.
    Type: Grant
    Filed: March 16, 2013
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventor: James Trethewey
  • Patent number: 9431518
    Abstract: Directed self-assembly (DSA) material, or di-block co-polymer, to pattern features that ultimately define a channel region a gate electrode of a vertical nanowire transistor, potentially based on one lithographic operation. In embodiments, DSA material is confined within a guide opening patterned using convention lithography. In embodiments, channel regions and gate electrode materials are aligned to edges of segregated regions within the DSA material.
    Type: Grant
    Filed: January 15, 2016
    Date of Patent: August 30, 2016
    Assignee: Intel Corporation
    Inventors: Paul A. Nyhus, Swaminathan Sivakumar
  • Patent number: 9432456
    Abstract: A method and apparatus for synchronizing time between a master device and a target device arranged across a network, wherein the target device communicates to the master device through a PCIe interconnect includes transmitting a first message at a first time from the master device to the target device, the first message including a message indicator; and receiving a reply message at a subsequent time from the target device to the master device, the reply message including the message indicator.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: August 30, 2016
    Assignee: INTEL CORPORATION
    Inventors: Kevin Stanton, David Harriman
  • Publication number: 20160249405
    Abstract: Coordination techniques for discontinuous reception (DRX) operations in dual-connectivity architectures are described. In one embodiment, for example, user equipment (UE) may comprise logic, at least a portion of which is in hardware, the logic to receive a radio resource control (RRC) configuration message during operation in a dually-connected UE state, determine whether UE assistance information reporting is enabled for the UE based on the RRC configuration message, and in response to a determination that UE assistance information reporting is enabled for the UE, send one or more UE assistance information messages to report a macro cell power preference and a small cell power preference. Other embodiments are described and claimed.
    Type: Application
    Filed: November 28, 2014
    Publication date: August 25, 2016
    Applicant: INTEL CORPORATION
    Inventors: Ali T. KOC, Satish C. JHA, Kathiravetpillai SIVANESAN, Rath VANNITHAMBY