Patents Assigned to Intel Mobile Communications GmbH
  • Patent number: 8363767
    Abstract: The invention relates to a method including a step of providing a clock having a clock period, wherein an integer multiple of the clock period defines a periodic time grid. In a further step, data packets are transferred between a baseband assembly and a radio-frequency assembly, wherein the times of the start of the transfers are offset with respect to the times of the periodic time grid.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Dietmar Wenzel, Berndt Pilgram
  • Patent number: 8364103
    Abstract: One embodiment of the present invention relates to a transmission circuit configured to dynamically adjust a number of active transistor cells within a power amplifier based upon a signal quality measurement determined from a feedback. The transmission circuit comprises a transmission chain having a power amplifier configured to provide an output signal. A feedback loop extends from the output of the power amplifier to a control circuit and is configured to provide measured information about output signal (e.g., phase, amplitude, etc.) to the control circuit. The control circuit utilizes the measured signal information to evaluate a measured signal quality of the output signal. The control circuit dynamically adjusts a number of active transistor cells within a power amplifier based upon a signal quality measurement until the power amplifier is optimized to operate at an operating point for low current and good transmission quality.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Sandro Pinarello, Andrea Camuffo, Chi-Tao Goe, Nick Shute, Jan-Erik Mueller
  • Patent number: 8365269
    Abstract: An embedded communication terminal equipped with an interface device which performs security tasks, driver tasks, power management tasks and handover tasks, and thus relieves the application processor of the embedded communication terminal.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Carsten Mielenz, Hans-Georg Gruber
  • Patent number: 8362747
    Abstract: A method of operating a mobile device, an apparatus and a wireless device are provided. The method of operating a mobile device comprises receiving an external supply voltage, converting the external supply voltage into an operating voltage and operating a circuit with the operating voltage. The method may include disconnecting a rechargeable battery from the operating voltage. The method may include charging a rechargeable battery in a trickle charge manner or in a continuos manner depending on a battery voltage. An apparatus is configured to carry out the method. The method may be used by a wireless device.
    Type: Grant
    Filed: September 10, 2008
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventor: Robert Parish
  • Patent number: 8364108
    Abstract: A control circuit may be provided. In this case, an output of the control circuit is connected to a control input of a signal generator. Depending on internal signals which identify an operating state of a signal processing device, the control circuit generates a regulating signal at the output. The operating point of the signal generator is thereby set in such a way that a current consumption of the signal processing device is reduced, so that the signal quality is ensured in a sufficient manner.
    Type: Grant
    Filed: August 18, 2009
    Date of Patent: January 29, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Christian Muenker, Bernd-Ulrich Klepser
  • Publication number: 20130016982
    Abstract: An adjustable delayer for adjustably delaying an input signal based on a delay adjustment input information describing a desired delay includes a plurality of series-connected tunable delay circuits, wherein a first of the tunable delay circuits is configured to receive the input signal. The adjustable delayer also includes a closed-loop control circuit configured to provide a first delay tuning information to tune a combined delay of the plurality of tunable delay circuits to fulfill a predetermined condition. The adjustable delayer also includes a combiner to combine the first delay tuning information with a second delay tuning information, that is based on the delay adjustment input information, to obtain a combined delay tuning information. The adjustable delayer is configured to tune a delay of one or more of the tunable delay circuits based on the combined delay tuning information.
    Type: Application
    Filed: July 15, 2011
    Publication date: January 17, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventor: Stephan Henzler
  • Patent number: 8355461
    Abstract: A description is given of a device and a method for the noise shaping of a transmission signal such as are employed, for example, in a data transmission system.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: January 15, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventor: Andreas Schmid
  • Patent number: 8351488
    Abstract: A receiver, includes a plurality of antennas to receive radio signals from a plurality of transmission paths, and a plurality of sets of RAKE fingers to generate first signals. Each set of RAKE fingers is coupled to a respective one of the plurality of antennas, and a weighting factor generator generates weighting factors for weighting the first signals, wherein the weighting factor for one of the first signals is generated by using first signals generated by at least two of the plurality of sets of RAKE fingers. Further, at least two of the first signals used to generate the weighting factor are received from the same transmission path.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: January 8, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventors: Herbert Dawid, Juergen Niederholz, Christian Drewes, Thorsten Clevorn
  • Publication number: 20130003570
    Abstract: A transmitter circuit includes a first unit configured to determine a transmission power of the transmitter circuit, and a second unit configured to determine whether a transmission of data for a signaling radio bearer is scheduled by the transmitter circuit. The transmitter circuit further includes a third unit configured to suppress a transmission of transmission data by the transmitter circuit if the transmission power exceeds a threshold value and if the transmission of data for the signaling radio bearer is scheduled.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventors: Tilman Giese, Juergen Kreuchauf, Bernd Schiele, Tobias Scholand, Alberto Perez, Ulrich Mennchen, Ralf Itjeshorst
  • Publication number: 20130003907
    Abstract: One embodiment of the present invention relates to a phase alignment system including a plurality of samplers, a clock distributor, a phase detector and a phase alignment control. The samplers are configured to receive an incoming signal and a phase adjusted clock signal and to provide samples according to the incoming signal. The clock distributor receives a clock adjustment signal and generates the phase adjusted clock signal, which triggers sampling of the incoming signal. The clock adjustment signal indicates a direction of phase adjustment and can include an amount of phase adjustment. The phase detector receives the samples and provides extended phase alignment commands derived from the samples. The phase alignment control receives the extended phase alignment commands and provides the clock adjustment signal to the clock distributor.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventor: Holger Wenske
  • Publication number: 20130002370
    Abstract: A circuit arrangement includes a component having a closed signal path, that closed signal path connected to a first port, a second port and at least a third port. The component has a directed signal flow of a signal applied to one of that ports. Such a coupling device can be connected to a transmitter and to a receiver path, respectively.
    Type: Application
    Filed: September 7, 2012
    Publication date: January 3, 2013
    Applicant: Intel Mobile Communications GmbH
    Inventors: Bernd Adler, Zdravko Boos
  • Publication number: 20120328059
    Abstract: A receiver circuit includes an estimation unit configured to estimate a noise power of a transmission channel, a calculation unit configured to calculate a decision variable based on the noise power, and a decision unit configured to make a ternary decision based on the decision variable.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Applicant: Intel Mobile Communications GmbH
    Inventors: Rajarajan Balraj, Thorsten Clevorn, Herbert Dawid
  • Publication number: 20120329487
    Abstract: According to one embodiment, a communication device is described that comprises a determining circuit configured to determine a type of an information indicated by a first message, wherein the first message is formed in accordance with a first transmission protocol; a selecting circuit configured to select a type of message according to a second transmission protocol based on the determined type of information; and a message generating circuit configured to generate a second message of the selected type according to the second transmission protocol indicating the information.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Applicant: Intel Mobile Communications GmbH
    Inventor: Frank Kowalewski
  • Publication number: 20120331026
    Abstract: A first stage of a digital filter receives input data to be filtered, the first stage of a digital filter operating at a first clock; a second stage of the digital filter outputs filtered output data, the second stage of the digital filter operating on a second clock, wherein a ratio of a frequency of the first clock and a frequency of the second clock is a fractional number, and a frequency of the second clock is higher than a frequency of the first clock; the first stage receives an indication of a ratio of the first clock and the second clock; and the first stage receives an indication of a time offset between (1) a clock pulse of the second clock, which occurs between a first clock pulse and a second clock pulse of the first clock, and (2) the first clock pulse of the first clock.
    Type: Application
    Filed: August 22, 2012
    Publication date: December 27, 2012
    Applicant: INTEL MOBILE COMMUNICATIONS GMBH
    Inventor: Andreas Menkhoff
  • Publication number: 20120331068
    Abstract: According to one embodiment, a communication device is described that comprises a determining circuit configured to determine a type of an information indicated by a first message, wherein the first message is formed in accordance with a first transmission protocol; a selecting circuit configured to select a type of message according to a second transmission protocol based on the determined type of information; and a message generating circuit configured to generate a second message of the selected type according to the second transmission protocol indicating the information.
    Type: Application
    Filed: June 27, 2011
    Publication date: December 27, 2012
    Applicant: INTEL MOBILE COMMUNICATIONS GMBH
    Inventor: Frank Kowalewski
  • Patent number: 8340170
    Abstract: A receiver for receiving a data signal having a channel profile may include an equalizer, to which the data signal is feedable, the equalizer having a plurality of filters and a switching device coupled to the filters, a selection device, which is disposed such that it determines a first number and a second number in dependence on the channel profile, and the switching device is disposed such that it connects a number of linear filters corresponding to the first number to form a first overall filter and connects a number of linear filters corresponding to the second number to form a second overall filter.
    Type: Grant
    Filed: August 17, 2007
    Date of Patent: December 25, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Herbert Dawid, Matthias Hillebrand, Steffen Paul, Lothar Winkler, Manfred Zimmermann
  • Publication number: 20120319749
    Abstract: One embodiment of the present invention relates to a digital phase locked loop (ADPLL) configured to generate a plurality of time-aligned output clock signals having different frequency values. The ADPLL comprises a digital controlled oscillator configured to generate a variable clock signal that is separated into two signal paths operating according to two separate clock domains. A first signal path is configured to generate a feedback signal that synchronizes the variable clock signal with a reference signal. A second signal path comprises a clock divider circuit configured to synchronously divide the variable clock signal to automatically generate a plurality of time-aligned output clock signals having different frequencies.
    Type: Application
    Filed: June 20, 2011
    Publication date: December 20, 2012
    Applicant: Intel Mobile Communications GmbH
    Inventors: Edwin Thaller, Stefano Marsili, Giuseppe Li Puma
  • Patent number: 8330509
    Abstract: The disclosed invention provides a structure and method for improving performance of a phase locked loop by suppressing low-frequency noise produced by a phase detector. This is achieved by up-conversion of the in-band frequency components in the phase difference between reference signal and feedback signal to a higher frequency range where noise performance of a phase detector is improved. The up-converted phase difference is provided to a phase detector that is configured to determine an error signal based upon this phase difference. The error signal is output to a down-converter configured to down-convert the error signal (e.g., back to the original frequency range), thereby intrinsically up-converting the error signal's low-frequency noise (produced by the phase detector), prior to being provided to a filter configured to filter the up-converted noise, thereby resulting in an improved PLL noise performance.
    Type: Grant
    Filed: April 12, 2010
    Date of Patent: December 11, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventor: Andreas Leistner
  • Patent number: 8331889
    Abstract: An automatic fuse architecture is described. An incoming signal is received and detected to determine whether the signal exceeds a threshold value.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: December 11, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventors: Mikael Bergholz Knudsen, Feridoon Jalili, Michael Wilhelm, Bernd Adler
  • Patent number: 8331388
    Abstract: A circuit arrangement and a method of operating a circuit arrangement. The circuit arrangement includes an amplifier having an output port, a duplexer having an input port coupled to the output port of the amplifier and having a combined input/output port to couple to an antenna, and a switch configured to create an impedance load mismatch at the input port of the duplexer independent of the impedance of the output port of the amplifier by acting on a connecting line between the output port of the amplifier and the input port of the duplexer.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: December 11, 2012
    Assignee: Intel Mobile Communications GmbH
    Inventor: Walter Kodim