Abstract: A hold-down assembly for retaining a portable electronic unit within an avionics equipment mounting tray includes a shaft, a locking collar, and an actuator knob. The shaft is coupled to pivot with the mounting tray. The locking collar slides along the shaft to engage the portable electronic unit. The actuator knob includes a knob body, a ratchet plate having detent holes within the knob body, a ball bearing, and a compression spring within the knob body. As the actuator knob is rotated to move along the shaft, the knob body and the ball bearing rotate with respect to the ratchet plate, and the ball bearing is forced against a spring bias of the compression spring as the ball bearing travels between adjacent detent holes.

Abstract: An electrical connector includes an electrically conductive housing for inhibiting electromagnetic interference. A latch device is mounted to opposite sides of the housing and extends from the housing for positively latching together the electrical connector with a mating connector. The latch device includes a biasing member for driving a latching end of the latch device toward a catch of the mating connector to securely retain the connectors in a mated configuration. The housing further includes a skirt on a mating end, the skirt having a plurality of cantilevered tangs for bearing against a corresponding skirt of the mating connector.

Abstract: An electrical connector system includes a pin connector and a socket connector that each attach to a cable having multiple twisted pairs of wires. The connectors include features for shielding each pair of pin or socket contacts from the other pairs of pin or socket contacts to reduce interference and crosstalk. A contact-retaining shell of one of the connectors includes an integrally formed insertion plug having cantilever elements that electrically contact a conductive surface of the mating connector to provide a low-impedance pathway between the shell and the mating connector for purposes of grounding and/or shielding. The electrical connector system is designed to be readily disassembled and reassembled for repair or re-work without the use of special tools.

Abstract: A conducting paste and method of forming the paste for device level interconnection. The conducting paste contains metal loading in the range 80-95% that is useful for making five micron device level interconnects. The conducting paste is made by mixing two different conducting pastes, each paste maintaining its micro level individual rich region in the mixed paste even after final curing. One paste contains at least one low melting point alloy and the other paste contains noble metal fillers such as gold or silver flakes. In general, average flake size below five micron is suitable for five micron interconnects. However, 1 micron or smaller silver flakes and an LMP mixture is preferred for five micron interconnects. The amount of LMP based paste in the final mixture is preferably 20-50% by weight. The nano micro paste embodiment shows good electrical yield (81%) and low contact resistance.

Abstract: A splicing member for sealing a crimped wire splice sleeve without application of high temperatures or chemical reactions is disclosed. The splicing member includes a cylindrical locking member having one or more lock tabs and/or one or more retaining clips. The lock tabs and/or retaining clips are engaged by the insertion of a crimped wire splice sleeve into the splicing member and lock the crimped wire splice sleeve into the splicing member. A rubber sheath is formed around the cylindrical locking member including sealing sections having parallel circular openings concentric with the outer surface of the sheath. The sealing sections prevent environmental conditions from reaching the crimped wire splice sleeve locked inside the cylindrical locking member. For example, moisture is prevented from reaching the crimped wire splice sleeve.

Abstract: A method of making a circuitized substrate which includes at least one and possibly several capacitors as part thereof. In one embodiment, the substrate is produced by forming a layer of capacitive dielectric material on a dielectric layer and thereafter forming channels with the capacitive material, e.g., using a laser. The channels are then filled with conductive material, e.g., copper, using selected deposition techniques, e.g., sputtering, electro-less plating and electroplating. A second dielectric layer is then formed atop the capacitor and a capacitor “core” results. This “core” may then be combined with other dielectric and conductive layers to form a larger, multilayered PCB or chip carrier. In an alternative approach, the capacitive dielectric material may be photo-imageable, with the channels being formed using conventional exposure and development processing known in the art.

Abstract: A structure for minimizing resistance between a semi-insulating x-ray detector crystal and an electrically conducting substrate. Electrical contact pads are disposed on the detector crystal and on the substrate with an electrical interconnect between the contact pads formed from a conductive adhesive and washed solder in electrical and mechanical communication with the pads.

Abstract: A mechanism for attaching a structure to a relatively flat panel includes a housing containing an outer button which contains an inner button. Displacement of the inner button into the outer button causes a moveable attachment portion to partially collapse toward a centerline which permits the moveable attachment portion to pass through an engagement aperture in the panel. Movement of the outer button into the housing permits the moveable engagement portion to extend past a back surface of the panel to engage the back surface and hold the attaching structure to the panel via forces exerted by biasing members once the buttons are released.

Abstract: A push-on connector system includes a male push-on bore including a center conductor pin, and a female push-on core including a socket. The male push-on bore receives the female push-on core. A second bore is configured forwardly of the male push-on bore, and a latch track is positioned in the second bore and forms a plurality of inclined latch surfaces. A movable collar is mounted rearwardly of the female push-on core with a plurality of bayonet pins as is configured for engaging the second bore. The bayonet pins slide along the inclined latch surfaces to axially drive the movable collar into the second bore and secure the female push-on core into the male push-on bore. A resilient member is coupled between the movable collar and female push-on core to bias the female push-on core into the male push-on bore.

Abstract: An electronic package with two circuitized substrates which sandwich an interposer therebetween, the interposer electrically interconnecting the substrates while including at least one electrical component (e.g., a power module) substantially therein to provide even further operational capabilities for the resulting package.

Abstract: A method of making a semiconductor radiation detector wherein the metal layers which serve as the cathode and anode electrodes are recessed from the designated prospective dice lines which define the total upper and lower surface areas for each detector such that the dicing blade will not directly engage the metal during dicing and therefore prevent metal from intruding upon (smearing) the vertical side walls of the detector substrate.

Abstract: A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin.

Abstract: A substrate for use in a PCB or PWB board having a coreless buildup layer and at least one metal and at least one dielectric layer. The coreless buildup dielectric layers can consist of at least partially cured thermoset resin and thermoplastic resin. The substrate may also contain land grid array (LGA) packaging.

Abstract: A one piece integral electrical terminal has a mount portion and a wire receiving portion. The wire receiving portion has a continuous annular interior wall having a contact portion with an integral oxide breaker especially suited to breaking through the oxide layer on aluminum wire. The wire receiving portion also has a sealing portion with at least one integral seal ring. An electrical cable is made by crimping the electrical terminal to an aluminum wire using a modified hexagonal crimp.

Abstract: Printed conductive lines and a method of preparing them using polymer nanocomposites with low resistivity and high current carrying capacity. Plasma treatment selectively removes polymers/organics from nanocomposites. Subsequent selective metal is deposited on top of the exposed metal surface of the printed conductive lines in order to improve current carrying capacity of the conductive printed lines. The printed conductive lines use a conductive ink or printing process and are then cured thermally and/or by a lamination process. Next, the printed conductive lines are treated with the plasma for 5-15 minutes in order to remove organics. E-less copper (Cu) is selectively deposited only at the conducting particle surface of the printed conductive lines. If desired, e-less gold, silver, tin, or tin-lead can be deposited on top of the e-less Cu.

Abstract: A circuitized substrate in which three conductive layers (e.g., electroplated copper foil) are bonded (e.g., laminated) to two dielectric layers. Each of the foil surfaces which physically bond to a respective dielectric layer are smooth (e.g., preferably by chemical processing) and may include a thin, organic layer thereon. One of the conductive layers may function as a ground or voltage (power) plane while the other two may function as signal planes with a plurality of individual signal lines as part thereof. An electrical assembly and an information handling system utilizing such a circuitized substrate are also provided, as is a method of making the substrate.

Abstract: A method of making a circuitized substrate including a composite layer having a first dielectric sub-layer including a halogen-free resin and fibers dispersed therein and a second dielectric sub-layer without fibers but also including a halogen-free resin with inorganic particulates therein.

Abstract: Methods of forming embedded, multilayer capacitors in printed circuit boards wherein copper or other electrically conductive channels are formed on a dielectric substrate. The channels may be preformed using etching or deposition techniques. A photoimageable dielectric is an upper surface of the laminate. Exposing and etching the photoimageable dielectric exposes the space between the copper traces. These spaces are then filled with a capacitor material. Finally, copper is either laminated or deposited atop the structure. This upper copper layer is then etched to provide electrical interconnections to the capacitor elements. Traces may be formed to a height to meet a plane defining the upper surface of the dielectric substrate or thin traces may be formed on the remaining dielectric surface and a secondary copper plating process is utilized to raise the height of the traces.

Abstract: A fiber optic socket contact includes a socket contact body and a capped sleeve containing a spring and a retention clip that engages a socket contact body. A fiber optic pin contact includes a pin contact body. One optical fiber is gripped by the socket contact body and another optical fiber is gripped by the pin contact body. When connector housings holding the fiber optic socket contact and the fiber optic pin contact are connected together, the fiber optic pin contact enters the capped sleeve which aligns the fiber optic pin contact with the fiber optic socket contact. The spring applies a force to keep the optical fibers pressed together. In preferred arrangements the fiber optic socket contact and the fiber optic pin contact have outer dimensions that substantially match outer dimensions specified for electrical socket and pin contacts.

Abstract: A method of forming a buried resistor within a cavity for use in electronic packages using two glass impregnated dielectric layers, one with a clearance hole, the second with a resistor core, the clearance hole being placed over the resistor core and the assembly fusion bonded. The space remaining around the resistor core is filled with a soldermask material and the assembly is coated with metal. Thru-holes are drilled, cleaned, and plated and then the metal coating is etched and partially removed. The soldermask is then removed and a layer of gold plating is applied to the exposed metal surfaces. The use of glass impregnated dielectric layers and fusion bonding eliminates the fluorinated ethylene propylene resin (FEP) bleed problem associated with previous buried resistor cavity assemblies.