Abstract: A computer system having suspend and resume capabilities using a plurality of suspend files to save multiple system states. Provision is made for use of multiple operating systems requiring multiple swap files. Also, a cross-session data file monitor prevents corruption of data files from one session to another.

Abstract: A duty cycle correction circuit that facilitates correction of clock signal duty cycles, including correcting for errors introduced by intervening devices in the clock signal distribution network. The duty cycle correction circuit of the preferred embodiment comprises a clock chopper circuit, a duty cycle comparator circuit, and a control circuit. The duty cycle comparator circuit compares the duty cycle of the clock signal with the duty cycle of a reference signal. The control circuit adjusts the clock chopper circuit based upon the duty cycle comparison, resulting in an output with a corrected duty cycle.

Abstract: An damascene x-ray mask comprises an oxide membrane layer having trenches formed therein defining an x-ray mask pattern. The trenches are filled with collimated, sputtered tungsten sputtered in a relatively high pressure environment. The result is a dense, low stress tungsten film completely filling the trenches. Damascene refers to the process by which the mask is formed. The mask is formed on a silicon substrate and then the substrate is etched away from the bottom side leaving substantially just the oxide layer and the collimated tungsten. The oxide layer is transparent to x-rays and the collimated tungsten layer is opaque to x-rays.

Abstract: An FET isolated on either side by a trench. The FET has a dielectric layer in the isolating trench along at least one side. The dielectric layer which may be an ONO layer has an oxidation catalyst diffused into it. The oxidation catalyst may be potassium. A gate oxide along the side of the FET in close proximity to the ONO layer is thicker than gate oxide between both sides.

Abstract: A method and apparatus is provided in a data processing system for securing access to particular files which are stored in a computer-accessible memory media. A file management program is provided as an operating system component of the data processing system. A plurality of files are stored in a computer-accessible memory media, including at least one encrypted file and at least one unencrypted file. For each encrypted file, a preselected portion of the file is recorded in memory, a decryption block is generated which includes information which can be utilized to decrypt the file, and the decryption block is incorporated in the file in lieu of the preselected portion which has been recorded in memory. Then, a file management program is utilized to monitor data processing system calls for files stored in the computer-accessible memory media. The file management program determines whether the called file has an associated decryption block.

Abstract: Low voltage DRAMs are used on higher voltage memory modules in a way that requires no modification of the DRAMs. "Bus switch" technology and compact low voltage regulators are used at the module level. The low voltage regulator provides a lowered, regulated voltage to DRAMs. The bus switches are used at the inputs and outputs of the DRAMs and effectively protect the DRAM circuitry from voltage swings that could otherwise be damaging.

Abstract: Screen interpolation is done without using an expensive line buffer, etc., to enlarge and display an original image without incongruity. Rather than computing an interpolated pixel value as an average of adjacent pixel values and displaying the computed average pixel value in each frame, in accordance with this invention a pixel to be interpolated assumes one of the adjacent pixel values in each frame, but in successive frames assumes different adjacent pixel values in a mix such that the average value of the interpolated pixel over many frames becomes the desired interpolated value. Since successive frames are displayed very rapidly, to the human eye the afterglow (or visual persistence) phenomenon causes the screen to appear as if an enlarged image is being displayed at all times without incongruity (i.e., the varying values of the interpolated pixels are not noticed by the human eye).

Abstract: A baseline correction circuit (BCC) compensates for the offset present on a pulse width modulated (PWM) signal in an optical readback system when associated transients first appear in the PWM signal, then compensates for the decay in the PWM signal so that significant baseline variations are minimized. The BCC includes a BCC switch coupled to switch the PWM signal responsive to a control unit and a low pass filter coupled through the BCC switch to receive the PWM signal. The low pass filter includes a capacitor coupled between the PWM signal and a ground reference, which stores the voltage of the baseline variation. A difference amplifier is connected to receive the low pass filtered output and also the PWM signal, and to provide a difference signal responsive to the difference between these two signals. The resultant signal is a high-pass filtered version of the PWM signal originally supplied to the BCC.

Abstract: A servo address is encoded in a disk drive system having at least one disk for storing data. A servo address associated with a sector in a track, or cylinder, on a surface of a disk and comprised of a sector number, a track number, and in multiple disk systems, a head number is encoded into the encoded servo address. Encoding the servo address saves disk storage space because the encoded servo address uses fewer bits than a conventional servo address while still enabling the disk drive system to locate positions on the disk.

Abstract: Advantage is taken of the presence of identity submatrices in a parity check matrix to achieve correction of errors in a single symbol and detection of errors in a single symbol together with a single bit error in another symbol for use in computer memory systems. The code structure enhances utilization of chip real estate and specifically provides for the utilization of a (76,64) code which employs 19 chips per computer memory word as opposed to 20 chips per word.

Abstract: I/O control unit (CU) features for supporting multiple host operating systems (OSs) which use missing interrupt handler (MIH) timeout functions for detecting potential failures of requested I/O device operations. These CU features support multiple host OSs by preventing them from falsely indicating I/O device failures, when in fact the device has not failed but is merely processing one or more other requests for other host Oss.

Abstract: Various data storage formats help to efficiently locate, read, and write user data stored on magnetic tape media. A tape is formatted by writing multiple segment-headers, free from any interleaved access of user data. Adjacent segment-headers are spaced by a predetermined interval to define multiple data storage segments. Segment-headers all contain a unique key, which is copied into a key index to identify valid segments. After formatting, normal tape accesses can be performed. Without erasing any old headers or data, a new formatting scheme can be established by writing new segment-headers on the tape. The new segment-headers include a new unique key, replacing the previous key in the key index. Previous segment-headers stored on the tape are ignored, since they lack the updated key. Segments may be selectively grouped to provide independently addressable partitions. Mapping between segments and partitions can use a fixed relationship (e.g.

Abstract: A method and program for use with a massively parallel processor (MPP) system or a distributed computer system for providing a physical design layout database across several nodes of the system. A user inputs a first datafile representing the physical configuration of the distributed processor system, and inputs a second datafile representing application tablespaces and/or database system files to be stored in the distributed processor system. The program optionally assigns the tablespaces in the second datafile to the physical configuration of the distributed processor system as specified in the first datafile and per the number of nodes, number of disks per node, and the size of the disks. The user may optionally use the physical design layout of the program, may change a portion of the intermediate physical design layout, or may provide the entire physical database design layout, as desired.

Abstract: A media stackloader processes removable data storage media such as optical disks, magnetic diskettes, or tape media. The stackloader removably couples to a storage drive, such as by plugging into a slot of the host computer. The stackloader has a plug portion integral with a housing portion, the plug portion plugging into the host computer and the housing portion housing a magazine containing the removable media. The stackloader includes a device for moving the magazine vertically within the housing to align selected cartridges with an opening in one of the drives of the personal computer. After the cartridge is aligned, a device is employed for moving the cartridge horizontally into the drive for processing and, after processing, for withdrawing the cartridge from the drive back into the magazine. A locking mechanism selectively locks and unlocks the cartridges to prevent improper removal of cartridges from the magazine.

Abstract: A system for managing data storage devices of a data storage subsystem. A data storage system includes a controller coupled to multiple data storage devices. In response to a request, the controller allocates the devices' storage space into a number of storage partitions or "virtual devices." The request specifies the size and function mode for each storage partition. Each storage partition, having the requested size, is operated according to its requested function mode. This involves mapping access commands, which specify virtual addresses, to the proper physical addresses of the appropriate data storage devices.

Abstract: Improved field effect transistor (FET) structures are described. They include a thin film transistor (TFT), wherein a contact layer directly connects a diffusion region of the TFT to an active site of another device, e.g., another transistor. This invention is especially suitable for TFT's which are built on one or more conductive studs. Static random access memory (SRAM) cells incorporating one or more of the TFT's are also described. Moreover, this invention is directed to methods for preventing or alleviating the problems associated with gouging during formation of contact layers.

Abstract: A method and data presentation apparatus for accelerated presentation of segmented data to a user are disclosed. According to the present invention, a data set, including a plurality of data segments each delimited by a segment boundary, is provided. In response to an invocation of an accelerated presentation of the data set, data within the data set is presented to the user at a generally accelerated data rate while a preselected group of data adjacent to each segment boundary is presented at a slower data rate than the generally accelerated data rate, thereby enabling individual data segments within the data set to be distinguished during accelerated presentation. In a first preferred embodiment of the present invention, the accelerated presentation of the data set is accomplished by presenting fewer than all data within the data set. Alternatively, in a second embodiment, accelerated presentation is accomplished by decreasing the duration of presentation of each datum within the data set.

Abstract: There is provided a digital processor that includes a recursive filter having means for using fixed point arithmetic for performing division. The recursive filter includes means for saving a remainder after each division and multiplication operation and for adding the remainder to a dividend in the subsequent division operation.

Abstract: A computer processing system stores sequences of instructions in a memory for execution by a processor unit. An out-of-order load instruction may be created, either statically or dynamically, by moving a load instruction from its original position in a sequence of instructions to an earlier position in said sequence of instructions. Such out-of-order load instruction identifies a location in memory from which to read a datum and a first destination register in which to place the datum. The present invention is a method and corresponding apparatus that utilizes data comparison to detect coherence among memory and the datum read by an out-of-order load operation. More specifically, the method consists of an interference test which controls the processor unit to read a datum from the same location in memory identified by the out-of-order load instruction and compare the newly read datum with the datum saved in the first destination register.

Abstract: Laser light is focused in an accurate manner on selected layers in a multilayer optical disk recording system by means of an analysis of output electrical signals from a dithered source which results in the production of an electrical signal which is proportional to an amount by which the parts of the system are to be relatively moved in order to achieve the desired focus on one of the layers.