Patents Assigned to International Business Machines Corp.
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Patent number: 5136465Abstract: This invention relates to personal computers in which provision is made for effective cooling of components capable of generating significant heat during operation, such as certain high performance microprocessors. The personal computer has an enclosure for enclosing operating components, a printed circuit board mounted within the enclosure for supporting and interconnecting operating components of the personal computer, heat generating components mounted on the printed circuit board for performing operating functions for the personal computer, a fan for inducing air to flow into the enclosure, a fan for expelling air from the enclosure, and an air flow directing baffle mounted within the enclosure in the path of air flow from one fan toward the other fan and adjacent the heat generating components for directing the flow of air through the enclosure to pass over and cool the heat generating components.Type: GrantFiled: October 29, 1990Date of Patent: August 4, 1992Assignee: International Business Machines Corp.Inventors: Jeffrey W. Benck, Mohanlal S. Mansuria, Michael S. Miller, Richard D. Musa, Brian A. Trumbo
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Patent number: 5134696Abstract: A virtual lookaside faclity is provided for maintaining named data objects in class-related data spaces in virtual storage, readily retrievable by user programs. A search order is associated with each user, specifying an ordered list of "major names" which are, in effect, sequentially searched for a specified "minor name", or data object, to obtain a virtual storage copy of that data object. As data objects are placed into a virtual cache, existence information, implicit in the naming structure, is captured and saved. This information is relied on later in retrieving objects from the cache. The data isolation provided by maintaining class data and control blocks in individual data spaces is exploited to prevent failures relating to one class of objects from affecting the others, and to handle latent program users, following failures, effectively.An LRU-like trimming technique is used to remove less useful objects from the cache when cache space is fully utilized.Type: GrantFiled: July 28, 1988Date of Patent: July 28, 1992Assignee: International Business Machines Corp.Inventors: David D. Brown, Wayne J. Morschhauser, Rick F. Reinheimer, Michael D. Swanson
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Patent number: 5132963Abstract: In the echo-cancelling device of the invention new decision-error directed algorithms are developed which permit to maintain adaptivity of the echo coefficients and perform precise tracking of the far-end echo phase in a computationally efficent manner during full-duplex operation. The echo-cancelling device comprises an adjust device (40) performing the minimization of the mean-square error obtained as the difference between the signal at the output of the equalizer (Z) and the data-symbol decision (a), for providing the adjustment of the near echo estimator (20) coefficients, of the far echo estimator (22) coefficients, and of the phase (26) of the estimated far echo.Type: GrantFiled: May 11, 1990Date of Patent: July 21, 1992Assignee: International Business Machines Corp.Inventor: Gottfried Ungerboeck
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Patent number: 5132617Abstract: The present invention relates to a method and apparatus for remotely detecting impedance. It is specifically adapted for use on a polishing machine wherein the end point of polishing for removing a surface layer during the processing of semiconductor substrates is detected. A first, or stationary coil having a high permeability core is wound having an air gap and an AC voltage is applied to the stationary coil to provide a magnetic flux in the air gap. A second coil is mounted for rotation on the polishing table, in a position to periodically pass through the air gap of the stationary coil as the table rotates. The second coil is connected at its opposite ends to contacts which are embedded in the surface of the polishing wheel. The contacts are positioned to engage the surface of the substrate which is being polished and provide a load on the second or rotating coil.Type: GrantFiled: May 16, 1990Date of Patent: July 21, 1992Assignee: International Business Machines Corp.Inventors: Michael A. Leach, Brian J. Machesney, Edward J. Nowak
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Patent number: 5131061Abstract: A modular active fiber optic coupler unit system comprising: a plurality of modular active fiber optic coupler units; each modular active fiber optic coupler unit having an optical input port; an optical output port; an optical transmitter coupled to said optical output port; an optical receiver coupled to said optical input port, an electrical input port; an electrical output port; and logic control elements coupling the said optical transmitter, said optical receiver, said electrical output port and said electrical input port coupled for preventing any electrical input signal on said electrical input port from appearing at the electrical output port; but allowing an electrical input signal to be transmitted as an optical output signal and allowing an optical input signal to become an electrical output; and the system has the electrical output ports of a modular coupler unit of the system coupled to the electrical input ports of a plurality of other couplers, and it the system may be coupled to an unlimitedType: GrantFiled: February 13, 1991Date of Patent: July 14, 1992Assignee: International Business Machines Corp.Inventor: Robert Betts
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Patent number: 5129087Abstract: A method and system of monitoring data structures in a computer system. A control block is established when a user obtains access to the computer system and is released when the user releases access to the computer system. A control program is provided to control operation of the computer system, and the control program has a plurality of process modules to service the control blocks. The method comprises the steps of invoking one process module to service one control block, and temporarily suspending operation of that one process module and invoking another process module to control operation of the computer system. A monitoring unit is established to indicate whether that one control block remains established. When control of the computer system is passed from the other process module back to said one process module, the monitoring unit is searched to determine whether the one control block is still established.Type: GrantFiled: February 3, 1988Date of Patent: July 7, 1992Assignee: International Business Machines, Corp.Inventor: Robert C. Will
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Patent number: 5128995Abstract: A personal computer system according to the present invention comprises a system processor, a random access memory, a read only memory, and at least one direct access storage device. A direct access storage device controller coupled between the system processor and direct access storage device includes a protection mechanism for protecting a region of the storage device. The protected region of the storage device includes a master boot record, a BIOS image and a system reference diskette image. The BIOS image includes a section known as Power on Self Test (POST). POST is used to test and initialize a system. Upon detecting any configuration error, system utilities from the system reference diskette image, such as set configuration programs, diagnostic programs and utility programs can be automatically activated from the direct access storage device.Type: GrantFiled: July 23, 1990Date of Patent: July 7, 1992Assignee: International Business Machines Corp.Inventors: Lisa R. Arnold, Richard Bealkowski, John W. Blackledge, Jr., Doyle S. Cronk, Richard A. Dayan, Douglas R. Geisler, Matthew T. Mittelstedt, Matthew S. Palka, Jr., John D. Paul, Robert Sachsenmaier, Kenneth D. Smeltzer, Peter A. Woytovech, Kevin M. Zyvoloski
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Patent number: 5128568Abstract: A timing circuit in which an output can be held at a certain level or state for a particular time after the circuit is enabled. The time is established by an external resistor and capacitor. The timing circuit is self-biasing to permit operation after associated power supplies have dropped to zero. The timing of the circuit is independent of supply voltage and substantially independent of temperature variations. The timing circuit includes a number of MOSFET's which are diode connected between two nodes, and another MOSFET having a gate and one conduction electrode connected across the two nodes. The voltage between the two nodes at the beginning of the timing interval is the sum of the threshold voltages of the diode connected MOSFET's. At the end of the timing interval, the voltage between the two nodes has fallen to the threshold voltage of the single MOSFET.Type: GrantFiled: October 3, 1990Date of Patent: July 7, 1992Assignee: International Business Machines Corp.Inventor: Gary D. Carpenter
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Patent number: 5126006Abstract: A sequence of masking steps reduces the amount of transference of a workpiece among work stations and reduces certain tolerances required for mask alignment in the construction of integrated circuits, and a gray level mask suitable for photolithography. In the integrated circuit, masking layers are developed directly in a wafer for delineating vertical and horizontal portions of an electrically conductive path. The mask is constructed of a transparent glass substrate which supports plural levels of materials having different optical transmissivities. In the case of a mask employing only two of these levels, one level may be constructed of a glass made partially transmissive by substitution of silver ions in place of metal ions of alkali metal silicates employed in the construction of the glass. The second layer may be made opaque by construction of the layer of a metal such as chromium.Type: GrantFiled: May 31, 1991Date of Patent: June 30, 1992Assignee: International Business Machines Corp.Inventors: John E. Cronin, Paul A. Farrar, Sr., Robert M. Geffken, William H. Guthrie, Carter W. Kaanta, Rosemary A. Previti-Kelly, James G. Ryan, Ronald R. Uttecht, Andrew J. Watts
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Patent number: 5124927Abstract: Measurement apparatus and procedure for use with lithographic equipment is provided for the construction of electronic and other devices wherein a photoresist is deposited as a layer upon a substrate. A Nomarski differential interference contrast microscope in conjunction with a scanned image detector is employed to examine verification marks produced by projection of an overlay, such as the mask or reticle, upon the photoresist layer. The projection results in a production of verification marks in the form of a latent image which, while invisible with conventional viewing means, can be viewed by phase-contrast imaging employing differential phase shift. Various characteristics of the resultant image are employed to align secondary verification marks with primary verification marks previously provided on the substrate, and to allow for a checking of line width, dosage, focusing, temperature control, and global alignment.Type: GrantFiled: March 2, 1990Date of Patent: June 23, 1992Assignee: International Business Machines Corp.Inventors: William D. Hopewell, Robert R. Jackson, Jerry C. Shaw, Theodore G. Van Kessel
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Patent number: 5122065Abstract: A connector for terminating wires and cables is constructed of two mating thermoplastic members. One of the members carries a pattern of conductive material which forms edge contact pads, signal lines, ground lines and a ground buss interconnecting all ground lines. The other thermoplastic member is formed to include a series of ribs that parallel and contact the ground lines and ground buss. The surface of the thermoplastic member carrying the ribs and the ribs are plated with a copper layer and when assembled with the mating member forms grounded tunnel-like passages enclosing the signal lines and into which the signal conductors of the wires or cables extend to terminate on the signal lines.Type: GrantFiled: August 12, 1991Date of Patent: June 16, 1992Assignee: International Business Machines Corp.Inventors: Thomas J. Dudek, George M. Jordhamo, Basil D. Washo
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Patent number: 5122439Abstract: A pattern is formed on a substrate by providing on the substrate a dielectric composition; defining a pattern in said dielectric; depositing metal and then micromachining the metal to provide the desired pattern on the substrate.Type: GrantFiled: August 28, 1989Date of Patent: June 16, 1992Assignee: International Business Machines Corp.Inventors: Ekkehard F. Miersch, Jae M. Park
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Patent number: 5121001Abstract: A push-pull driver circuit operative with two input logic signals of opposite sense has a first bipolar transistor with a base terminal connected to a first input signal, and an emitter terminal connected to a second bipolar transistor which takes the place of the emitter resistor in the usual construction of an emitter follower circuit. During an activation of the first transistor to pass current, this being the pull-up stage, the second transistor is in a quiescent state to develop a voltage drop provided by current flow from the first transistor. A current mirror maintains a small quiescent current in the second transistor so that it can be activated rapidly upon occurrence of the pull-down transition. During a deactivation of the first transistor to terminate current flow in the first transistor, the voltage drop across the second transistor decreases, this being the pull-down stage. The voltage drop across the second transistor serves as an output signal of the driver circuit.Type: GrantFiled: February 12, 1991Date of Patent: June 9, 1992Assignee: International Business Machines, Corp.Inventors: Allan H. Dansky, Allan L. Mullgrav, Jr.
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Patent number: 5121499Abstract: A mechanism allows for programming the order of cells for an operator to enter data in a spreadsheet. Each cell of the spreadsheet may be provided with a "next cell" attribute, and these attributes as well as other attributes for the cells are stored in a table. The "next cell" attribute may be a constant, such as the name of the next cell, or it may be a logic expression so that the next cell to be edited can be different depending on some condition. When the operator presses the NEXT CELL key, the "next cell" attribute is searched by accessing the attribute table, and if a "next cell" attribute is found, it is evaluated to determine the next cell to be edited.Type: GrantFiled: July 25, 1991Date of Patent: June 9, 1992Assignee: International Business Machines Corp.Inventors: Rex A. McCaskill, Beverly H. Machart, Harry E. O'Steen
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Patent number: 5121354Abstract: A word addressable random access memory includes additional logic permitting accessing on bit boundaries during read/write operations requiring only one memory cycle. During each memory cycle, two "adjacent" word locations are selected for access concurrently in response to the decoding of one address. Logic responsive to bit boundary select signals determine which memory cells of the two "adjacent" word locations are in fact accessed to store or retrieve a word of data. In one preferred embodiment, the boundary select logic controls the data in/out lines of a pair of odd/even arrays. In another preferred embodiment, the boundary select logic includes logic within each cell of a single memory array.Type: GrantFiled: March 12, 1990Date of Patent: June 9, 1992Assignee: International Business Machines Corp.Inventor: Baiju D. Mandalia
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Patent number: 5121190Abstract: Solder interconnection whereby the gap created by solder connections between an organic substrate and semiconductor device is filled with a composition obtained from curing a thermosetting preparation containing a thermosetting binder; and filler having a maximum particle size of 50 microns.Type: GrantFiled: March 14, 1990Date of Patent: June 9, 1992Assignee: International Business Machines Corp.Inventors: Richard Hsiao, Jack M. McCreary, Voya R. Markovich, Donald P. Seraphim
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Patent number: 5121396Abstract: In complex networks, data frames may be routed through different systems having different frame or addressing requirements. When the frames are transferred or bridged between such systems, known changes may have to be made in the frame contents to accommodate these requirements. To maintain the integrity of error checking provided by Cyclical Redundancy Checking (CRC) techniques, a system receiving a frame uses an improved Frame Check Sequence value modification technique which modifies a Frame Check Sequence (FCS) field value only as a function of the known or planned changes to be made in the frame. If unplanned changes (that is, errors) are introduced at the receiving system, application of standard CRC error checking techniques at the next system to receive the frame will indicate those errors.Type: GrantFiled: October 27, 1988Date of Patent: June 9, 1992Assignee: International Business Machines Corp.Inventors: David R. Irvin, Kian-Bon Sy
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Patent number: 5119474Abstract: A user/PC interface system is described which enables the creation and performance of a synchronized audio/visual story on the PC. The interface enables the initial storage of a plurality of visual images. Then, it enables the creation of an audio presentation which includes labels and time indications, certain of which are employed for synchronization purposes. The system is responsive to a label to execute a predetermined command upon the appearance of the label in the audio presentation. The PC is then operated to perform the audio presentation, that performance automatically causing the display of visual images upon the occurrence of labels and time indications. A table-based authoring system is also described for preparation of both the above noted audio and visual presentations. The system relies upon columnar presentations of a tabular form, each column indicating a separate control function (or comment) relating to the audio/visual presentation.Type: GrantFiled: July 11, 1991Date of Patent: June 2, 1992Assignee: International Business Machines Corp.Inventors: Bradley J. Beitel, Mark S. Bishop, John J. Deacon, Robert D. Gordon, Kenneth B. Smith, Lonnie S. Walling, Michael D. Wilkes, Peter C. Yanker, Nancy A. Burns, Charles L. Haug
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Patent number: 5117486Abstract: A bus-to-bus adapter is provided for coupling the input/output bus of a first data processor to the input/output bus of a second and different type of data processor. The adapter enables the transfer of data and messages from the first processor to the second processor and vice versa. The adapter includes a buffer storage unit and control logic for enabling multiple data buffers to be provided for enabling multiple independent data transfer operations to be performed in a concurrent manner. The control logic also includes a mechanism for allowing the reading out of data from a data buffer to begin before such data buffer has received all of its incoming data. The adapter further includes a programmable service time allocation mechanism for limiting message service time relative to data transfer service time and for providing different amounts of data transfer service time for different ones of the multiple data buffers.Type: GrantFiled: April 21, 1989Date of Patent: May 26, 1992Assignee: International Business Machines Corp.Inventors: Alan R. Clark, Joseph P. Higham, James E. Hughes, James W. Valashinas
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Patent number: D328067Type: GrantFiled: October 26, 1990Date of Patent: July 21, 1992Assignee: International Business Machines Corp.Inventor: Vincent S. Garmon