Abstract: A backplane system allowing a very large number of interconnections between high-connectivity printed circuit boards and a backplane is disclosed. The backplane is fragmented into a plurality of backplane parts that comprise connectors on their edges to mate connectors arranged on the high-connectivity printed circuit boards. These backplane parts may also include other connectors on their edges to couple to extension printed circuit boards requiring less interconnections or cables. Interposers can be used to link several backplane parts and provide enhanced air circulation.

Abstract: A computer-implemented method for clustering related data pages in close physical proximity to each other on a magnetic disk drive or other storage device. The method includes identifying relationships between the pages, with the relationships being established not simply by time of page access, but rather by user access patterns. The pages are clustered based on the relationships. To undertake the clustering, the pages and references can be represented and analyzed as respective vertices and edges in edge graphs.

Abstract: An integrated circuit having either or both ESD and noise suppression devices that use the inherent resistance in the substrate as an ESD trigger and/or part of the noise suppression.

Abstract: A semiconductor method integrates a DTC on SOI for the purpose of accomplishing a robust circuit design with low noise while reducing the silicon area used. The DTC for SOI devices comprises a buried oxide layer on a silicon substrate with a silicon layer over the buried oxide layer. Shallow trench insulation extends to the buried oxide layer in the silicon layer. A first trench is formed in the shallow trench insulation and extends through the buried oxide layer into the silicon substrate. The first trench has formed on the walls thereof an oxide insulating layer and is then filled with polysilicon to form the DTC. A second trench is formed in the silicon layer adjacent to the first trench and extends through the buried oxide layer into the silicon substrate. The second trench is filled with polysilicon and forms the substrate contact for the DTC.

Abstract: Testing J2EE applications, wherein J2EE applications comprise modules, the testing including identifying (204), from an application deployment descriptor, modules comprised within the J2EE application; identifying, from an identified module, at least one QOS element; and identifying, from the identified QOS element, a software resource to be tested. Typical embodiments further including generating Java test code; identifying, for the software resource to be tested, a user identification and a user password for a user that is a member of a role intended to protect the software resource; and testing the software resource to be tested by use of the Java test code, including passing as parameters to the Java test code at run time the user identification and user password.

Abstract: A system and method for automatically providing quality assurance for user enrollment in a recognition system. Advantageously, the quality a new enrollment (i.e., a newly trained user-dependent prototype) is assessed before the new enrollment is accepted in place of a current enrollment. This quality check is performed by decoding stored user test data using the new enrollment, comparing the decoding results of the new enrollment to the known script used to generate the test data to obtain an accuracy score for the new enrollment, and then comparing the accuracy score for the new enrollment with an accuracy score of a previous qualified enrollment (or, in the case where there is no previous, qualified enrollment, to the accuracy of the speaker independent model). If the decoding results of the new enrollment are acceptable, the new enrollment will be used for recognition; otherwise it will be rejected and discarded.

Abstract: A write head has a variable throat height wherein the throat height is dependent upon the frequency of operation of the write head. At high frequency operation the throat height is small and at low frequency operation the throat height is large. The write head writes hard into a circular track of a rotating magnetic disk at all frequencies but not overly hard at low frequencies thereby avoiding excessive erase bands and adjacent track interference (ATI) on each side of the track being written.

Abstract: A method and system for reducing power in a snooping cache based environment. A memory may be coupled to a plurality of processing units via a bus. Each processing unit may comprise a cache controller coupled to a cache associated with the processing unit. The cache controller may comprise a segment register comprising N bits where each bit in the segment register may be associated with a segment of memory divided into N segments. The cache controller may be configured to snoop a requested address on the bus. Upon determining which bit in the segment register is associated with the snooped requested address, the segment register may determine if the bit associated with the snooped requested address is set. If the bit is not set, then a cache search may not be performed thereby mitigating the power consumption associated with a snooped request cache search.

Abstract: Data rate control systems, methods, and computer program products in which an error counter is maintained that contains an error count. The error counter is periodically sampled to determine a sampling interval error count corresponding to a change in the error count since a previous read of the error counter. The sampling interval error count is provided to a first filter that is characterized by a slow time-constant and a second filter that is characterized by a fast time-constant. The first filter generates a slow-filtered sampling interval error count while the second filter generates a fast-filtered sampling interval error count, which are used as a basis for generating a data rate slowdown request signal. More specifically, the data rate slowdown request signal is generated if either the slow-filtered sampling interval error count or the fast-filtered sampling interval error count exceeds a threshold respectively associated therewith.

Abstract: A synchronous dynamic random access memory (SDRAM) semiconductor device which uses a command cancel function to improve reliability and speed of a memory system. The CC function takes advantage of the intrinsic delays associated with memory read operations at high clock frequencies, and the increased write latency commensurate with increased read latencies where non-zero latencies for read and write operations are the norm by permitting address and command ECC structures to operate in parallel with the address and command re-drive circuits. The CC function is extendable to future DDR2 and DDR3 operating requirements in which latency of higher frequency modes will increase due to a shift from 2 bit pre-fetch to 4 and 8 bit pre-fetch architecture.

Abstract: A system and method is provided for synchronizing time of day information between and among communication adapters. Time of day information, which is desired for proper message packet ordering and delivery, is recovered in a process in which a master adapter, connected to a master node, periodically broadcasts current time of day information to slave adapters which operate to determine whether or not drift correction is to be applied.

Abstract: A system and method of maintaining consistent cached copies of memory in a multiprocessor system having a main memory, includes a memory directory having entries mapping the main memory, an access history information in the memory directory entries, and a directory cache having records corresponding to a subset of the memory directory entries. The memory directory may be a full map directory having entries mapping all of the main memory or a sparse directory having entries mapping to a subset of the main memory. The method includes the steps of receiving a signal indicating a processor cache miss, retrieving a memory directory entry from the memory directory, updating the access history of the memory directory entry, selecting a directory cache line based on its access history and allocating the directory cache line for replacement, and writing the memory directory entry into the directory cache.

Abstract: Method and system aspects for automated generation and distribution of certificates in a computer network of computer systems are described. These aspects include generating a request by a first computer system for a certificate from a second computer system, and responding to the request in the second computer system by automatically generating the certificate and distributing the certificate to the first computer system. Further, generating a request includes issuing a POST/CERTREQ request, and sending a self-signed certificate from the first computer system to the second computer system using HTTP. Automatically generating the certificate includes sending a sequence of certificates to the first computer system, the sequence of certificates including the newly generated certificate of the first computer system with a signature from the second computer system and a self-signed certificate from the second computer system.

Abstract: A method, system, and program product for managing result information in a multi-node networked data processing system is provided. In one embodiment, first results of execution from a task executed on a second node in the networked data processing system are received at a first node. The results comprise an array of result messages, wherein each result message contains a unique message identifier and associated message text content. The result messages are modified, if necessary, to create second results, wherein the second results comprise an array of result messages. The second results are sent to a requesting client node.

Abstract: A device certificate identifies a particular device using a globally-unique device identifier and contains a public key associated therewith. A private key stored in protected storage of the device is used to digitally sign outbound messages, enabling communicating devices to authenticate one another using the associated device certificate and public key, before returning a response. Devices functioning as servers can thereby securely participate in dynamic, automatic address assignment services using a service such as a Boot Protocol or Dynamic Host Configuration Protocol, and/or to update address information stored in a Domain Name System (DNS) server, ensuring that the update is authentic, and when the DNS is also authenticated, ensuring that a legitimate DNS has been contacted.

Abstract: In accordance with the first object of this invention soluble derivatives of sexithiophene in which terminal carbons are substituted with various polar groups such as phosphonic esters, phosphonic acids, phosphonates, carboxylic acids, carboxylates, amines, amides, carbamates, and alcohols, each separated from the terminal thiophene rings by one or more methylene groups, are synthesized. An TFT device in accordance with the second objective of this invention employs films of the above sexithiophene derivatives as the semiconducting component. These organic semiconductors are dissolved in common organic solvents and applied to the surface of a substrate using inexpensive, low-temperature solution-based processing such as spin-coating, dip-coating, drop-casting, or microcontact printing.

Abstract: A system for configuring a first printer according to the grayscale printing characteristics of a second printer is described. Grayscale printing characteristics of a first and a second printer are characterized, and a transform between the grayscale printing characteristics of the first printer and the grayscale printing characteristics of the second printer is generated. This transform is used to modify the first printer grayscale commands so as to emulate the grayscale printing characteristics of the second printer.

Abstract: The present invention relates to dynamic Client configuration and more particularly to a system and a method for automatically configuring a Client to access each desired SNA Application through an appropriate Server. A configuration feature (also called Automatic Server Configuration option) in a Client automatically retrieves a configuration code (also called Autoserver code, in order to configure the Client to access desired SNA Applications through appropriate Servers. A CGI (Common Gateway Interface, program on an Autoserver URL (Universal Resource Locator) system dynamically creates an Autoserver code (also called TN client configuration code). The Autoserver code is used by the Client to associate to each desired SNA Application an appropriate Server. The automatic configuration of the Client allows the user to directly access an SNA Application without having first to connect to an Intermediate Selection Application and Selection Screen.

Abstract: A method and apparatus for making phase shift masks are provided wherein an anti-reflective coating used on an opaque pattern layer of the mask fully covers the opaque pattern layer and has not been etched in the etching process to form the phase shift mask. A two-exposure method to form the phase shift mask is used wherein a photoresist having a defined dose-to-clear level is coated on the surface of the mask and the lower surface of the mask is exposed to a blanket exposure in an energy amount less than the dose-to-clear level. The open areas of the upper surface of the mask to be etched are exposed to an energy dose in an amount less than the dose-to-clear level, with the sum of the amounts of the lower surface energy and upper surface energy being at least the dose-to-clear level. The method and apparatus minimizes and/or avoids etching of the anti-reflective coating.

Abstract: An improved cell circuit for data readout with reduced number of read wordlines is provided in a memory block of a multiport memory array. The number of read wordlines is significantly reduced by using a decoder between the read wordlines and a multiplexer in the cell circuit. The memory block has a plurality of address inputs and stores a plurality of write data signals. In the cell circuit, the decoder receives as decoder inputs a subset of the address inputs and outputs a plurality of select signals. The multiplexer is coupled to the decoder to receive the select signals and select one of the write data signals based on the select signals. Additionally, the read wordlines are coupled to the decoder for carrying the subset of the address inputs to the decoder.