Patents Assigned to International Business Machines Corporations
  • Patent number: 7960836
    Abstract: An integrated circuit including a first wire of a first level of wiring tracks, a second wire of a second level of wiring tracks, a third wire of a third level of wiring tracks, and a fourth wire located a first distance from the second wire in the second level of wiring tracks. A first via connects the first and second wires at a first location of the second wire. A second via connects the second and third wires at the first location, the second via is substantially axially aligned with the first via. A third via connecting the third and fourth wires at a second location of the fourth wire. A fourth via connecting the first and fourth wires at the second location, the fourth via is substantially axially aligned with the third via. The second, third, and fourth vias, and the third and Fourth wires form a path between the first and second wires redundant to the first via.
    Type: Grant
    Filed: March 10, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Jeanne P. Bickford, Markus Buehler, Jason D. Hibbeler, Juergen Koehl, Edward J. Nowak
  • Patent number: 7962880
    Abstract: A method for minimizing coupling capacitance between wires in a bus comprising shifting by rearranging the order of said wires in said bus so that, aside from said first and last wires in said arrangement, the coupling capacitance across said bus is uniform and minimized relative to the original arrangement. Alternatively, a method for minimizing coupling capacitance between wires in a bus comprising shifting by rearranging the order of said wires in said bus so that, aside from said first and last wires in said arrangement, one of said wires incurs the smallest possible amount of coupling capacitance and then the coupling capacitance across the rest of said wires in said bus gets progressively worse relative to the original arrangement.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Daniel Lipetz, Joshua M. Weinberg
  • Patent number: 7962700
    Abstract: Compressed memory systems are provided to reduce latency associated with accessing compressed memory using stratified compressed memory architectures and memory organization protocols in which a region of compressed main memory is allocated as a direct access memory (DAM) region for storing uncompressed data items. The uncompressed data items in the DAM region can be directly accessed, speculatively, to serve access requests to main memory, requiring access to compressed memory in the event of a DAM miss.
    Type: Grant
    Filed: September 6, 2006
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Peter Anthony Franaszek, Luis Alfonso Lastras-Montano, Robert Brett Tremaine
  • Patent number: 7961996
    Abstract: An optical waveguide device comprises a plurality of mirrors, wherein at least one mirror comprises a first and second reflective end that reflect and transmit light. The plurality of mirrors comprises at least one first material having at least one first refractive index; an axis line; a first cladding comprising a second material having a second refractive index; a second cladding, formed above the first, comprising a third material having a third refractive index; a core comprising a fourth material; and a plurality of core parts formed within at least one of the first or second claddings. The fourth material has a fourth refractive index that is greater than the second and third refractive indices and the core parts have a plurality of core part ends coupled to one of the reflective ends where at least one core part end is approximately parallel to one of the reflective ends.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Roger F. Dangel, Folkert Horst, Tobias P. Lamprecht, Bert Jan Offrein
  • Patent number: 7962306
    Abstract: Methods, apparatus, and products for detecting an increase in thermal resistance of a heat sink in a computer system, the heat sink dissipating heat for a component of the computer system, the computer system including a fan controlling airflow across the heat sink, the computer system also including a temperature monitoring device, including: measuring, by a monitoring module through use of the temperature monitoring device during operation of the computer system, thermal resistance of the heat sink; determining whether the measured thermal resistance of the heat sink is greater than a threshold thermal resistance, the threshold thermal resistance stored in a thermal profile in non-volatile memory, and if the measured thermal resistance of the heat sink is greater than the threshold thermal resistance, notifying a system administrator.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Justin P. Bandholz, Zachary B. Durham, Clifton E. Kerr, Joseph E. Maxwell, Kevin M. Reinberg, Kevin S. D. Vernon, Philip L. Weinstein, Christopher C. West
  • Patent number: 7962610
    Abstract: An embodiment of the invention provides a technique that allows the collection, storage, and manipulation of data collected in a computer network.
    Type: Grant
    Filed: March 7, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Lisa Ellen Lippincott, John Edward Firebaugh, Dennis Sidney Goodrow
  • Patent number: 7960795
    Abstract: Metal-oxide semiconductor (MOS) devices and techniques for the fabrication thereof are provided. In one aspect, a metal-oxide semiconductor device is provided comprising a substrate; and at least one n-channel field effect transistor (NFET) having a gate stack over the substrate. The NFET gate stack comprises an NFET gate stack metal gate layer; a first NFET gate stack silicon layer over the NFET gate stack metal gate layer; a second NFET gate stack silicon layer over a side of the first NFET gate stack silicon layer opposite the NFET gate stack metal gate layer, wherein an interface is defined between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer; and an NFET gate stack silicide region that extends through the interface between the first NFET gate stack silicon layer and the second NFET gate stack silicon layer.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Leland Chang, Renee Tong Mo, Jeffrey W. Sleight
  • Patent number: 7962558
    Abstract: The identity of the sender of an e-mail message is verified by performing a plurality of tests on DNS information. The DNS information is based on a client IP address or a sender address. Each test performed has a corresponding intrinsic confidence value representing the degree of confidence the test provides of the sender identity relationship. If multiple tests are successful the test result with the highest confidence value of the hierarchy of confidence values is used. The confidence value is optionally used in subsequent identity tests as specified by the subsequent test.
    Type: Grant
    Filed: March 3, 2009
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mathew A. Nelson, Matthew N. Roy
  • Patent number: 7961559
    Abstract: A circuit and method for measuring duty cycle uncertainty in an on-chip global clock. A global clock is provided to a delay line at a local clock buffer. Delay line taps (inverter outputs) are inputs to a register that is clocked by the local clock buffer. The register captures clock edges, which are filtered to identify a single location for each edge. Imbalance in space between the edges indicated imbalance in duty cycle. Up/down signals are generated from any imbalance and passed to a phase locked loop to adjust the balance.
    Type: Grant
    Filed: August 12, 2009
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Robert C. Dixon, Robert L. Franch, Phillip J. Restle
  • Patent number: 7962564
    Abstract: A computer program product, apparatus and method for identifying processors in a multi-tasking multiprocessor network, the computer program product including a tangible storage medium readable by a processing circuit and storing instructions for execution by the processing circuit for performing a method including storing a service record for a port to which an LID has been assigned, retrieving service records for nodes to which channel paths may connect, retrieving path records that provide address destinations for the nodes identified in the service records, initiating channel initialization for the channel paths defined for the port and removing the service record for the port.
    Type: Grant
    Filed: February 25, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Richard K. Errickson, Welela Haileselaissie, Leornard W. Helmer, Jr., John S. Houston, An Zhu
  • Patent number: 7962913
    Abstract: Methods, systems, and computer program products are provided for scheduling threads in a multiprocessor computer. Embodiments include selecting a thread in a ready queue to be dispatched to a processor and determining whether an interrupt mask flag is set in a thread control block associated with the thread. If the interrupt mask flag is set in the thread control block associated with the thread, embodiments typically include selecting a processor, setting a current processor priority register of the selected processor to least favored, and dispatching the thread from the ready queue to the selected processor. In some embodiments, setting the current processor priority register of the selected processor to least favored is carried out by storing a value associated with the highest interrupt priority in the current processor priority register.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jos Manuel Accapadi, Mathew Accapadi, Andrew Dunshea, Mark Elliott Hack, Agustin Mena, III, Mysore Sathyanarayana Srinivas
  • Patent number: 7961076
    Abstract: Methods, systems, and media for remote control of a vehicle device and vehicle lockout notification are disclosed. Embodiments comprise a method of creating a secure bidirectional communication link between a remote access device and a central locking unit (CLU) of a vehicle, enabling the central locking unit to authenticate a user of the remote access device to manipulate a device of the vehicle. In some embodiments, the CLU may wait for an access attempt from a mobile device. In other embodiments, the CLU monitor vehicle conditions, detect a lockout condition, and alert the user before authenticating and granting vehicle access. Embodiments utilize private and shared key encryption methods to facilitate securely passing an access code between the CLU and the remote access device. Some embodiments authenticate the user by voice verification, while other embodiments may use personal identification numbers.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Nia L. Kelley, Guillermo J. Silva
  • Patent number: 7961612
    Abstract: An improved solution for limiting the transmission rate of data over a network is provided according to an aspect of the invention. In particular, the transmission rate for a port is limited by rate limiting one of a plurality of queues (e.g., class/quality of service queues) for the port, and directing all data (e.g., packets) for transmission through the port to the single rate limited queue. In this manner, the transmission rate for the port can be effectively limited to accommodate, for example, a lower transmission rate for a port on a destination node.
    Type: Grant
    Filed: December 4, 2006
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mitchell L. Loeb, Harry Cheselka, William G. Holland, Norman C. Strole, Edward S. Suffern
  • Patent number: 7962506
    Abstract: A system in which an initial distribution list is dynamically modified using criteria determined from the current entries in the list. After an originator generates a distribution list and prior to submission of the message to entries on the generated list, the entries in the created distribution list are examined. From this list, features of the entries are identified. From these features, criteria are generated that can be used to generate additional entries that may be included in the list. In one approach, the generated criteria are presented to the user for review and approval. If the originator approves the criteria, the generated list is modified to add additional entries to the distribution based on the generated criteria. If the originator rejects the criteria, the initially generated list is submitted and the message is sent to the entries on the initial list.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Rick Allen Hamilton, Jenny S. Li, Brian Marshall O'Connell, Keith Raymond Walker, Susan Marie Williams
  • Patent number: 7961473
    Abstract: An integrated circuit is disposed on a circuit board. A heat sink retention module includes a bracket, members, and coil springs. The members extend through the coil springs and corresponding holes within the bracket to attach to the board. A heat sink is removably installed within the bracket in a toolless manner, such that the heat sink comes into contact with the integrated circuit. The heat sink and the bracket join together to become a single entity that is permitted to float along an axis perpendicular to a surface of the circuit board. The coil springs are tuned to define a predetermined force at which the heat sink is pushed against the integrated circuit. The module can include a latch having tabs bent at different angles relative to one another to balance forces applied by the tabs against the heat sink while the latter is being installed within the bracket.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Mark S. Bohannon, Derek I. Schmidt, Pat Gallarelli
  • Patent number: 7962496
    Abstract: Methods, and systems for migrating personality of a computing environment from a source machine platform to a target machine platform through a CIM-based system management infrastructure. A system includes: database wherein migration rules of CIM objects between a plurality of platforms are recorded; and migration tool for implementing migration according to the migration rules in the database, which includes: migration rule extractor, CIM object extractor, migration task producer and migration task executor. The extractor extracts CIM objects related to personality of the computing environment from source machine platform according to migration rule extracted from the database by rule extractor, and extracts from the target machine platform objects corresponding to the extracted CIM objects of the source machine platform. The migration task producer generates the migration tasks according to extracted migration rules.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Guang Dao Gu, Hui Su, Zhe Peng Wang, Xiao Bing Guo
  • Patent number: 7962650
    Abstract: Method, system and computer usable program code for dynamic component placement in an event processing system having producers, consumers, a plurality of nodes between the producers and the consumers, and a flow graph representing computational components to be executed between the producers and the consumers. A description of a change to the system is received. At each node, next-hop neighbor nodes for each consumer are identified. A routing value is assigned to each next-hop neighbor node for each consumer. Using the routing values in a context of the change, a performance cost of the system is estimated based on hypothetical changed placements of the computational components at nodes along paths from a producer to a consumer through the next-hop neighbor nodes for each consumer, and a changed placement of the computational components that minimizes performance cost of the system relative to the hypothetical changed placements is selected.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Geetika Tewari Lakshmanan, Chitra Dorai, Robert Evan Strom
  • Patent number: 7960264
    Abstract: An anisotropic wet etch of a semiconductor layer generates facets joined by a ridge running along the center of a pattern in a dielectric hardmask layer on the semiconductor layer. The dielectric hardmask layer is removed and a conformal masking material layer is deposited. Angled ion implantation of Ge, B, Ga, In, As, P, Sb, or inert atoms is performed parallel to each of the two facets joined by the ridge causing damage to implanted portions of the masking material layer, which are removed selective to undamaged portions of the masking material layer along the ridge and having a constant width. The semiconductor layer and a dielectric oxide layer underneath are etched selective to the remaining portions of the dielectric nitride. Employing remaining portions of the dielectric oxide layer as an etch mask, the gate conductor layer is patterned to form gate conductor lines having a constant width.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventor: Huilong Zhu
  • Patent number: 7962473
    Abstract: Techniques are provided for performing structural joins for answering containment queries. Such inventive techniques may be used to perform efficient structural joins of two interval lists which are neither sorted nor pre-indexed. For example, in an illustrative aspect of the invention, a technique for performing structural joins of two element sets of a tree-structured document, wherein one of the two element sets is an ancestor element set and the other of the two element sets is a descendant element set, and further wherein each element is represented as an interval representing a start position and an end position of the element in the document, comprises the following steps/operations. An index is dynamically built for the ancestor element set. Then, one or more structural joins are performed by searching the index with the interval start position of each element in the descendant element set.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Shyh-Kwei Chen, Kun-Lung Wu, Philip Shi-Lung Yu
  • Patent number: 7960442
    Abstract: Substantially or roughly spherical micellar structures useful in the formation of nanoporous materials by templating are disclosed. A roughly spherical micellar structure is formed by organization of one or more spatially unsymmetric organic amphiphilic molecules. Each of those molecules comprises a branched moiety and a second moiety. The branched moiety can form part of either the core or the surface of the spherical micellar structure, depending on the polarity of the environment. The roughly spherical micellar structures form in a thermosetting polymer matrix. They are employed in a templating process whereby the amphiphilic molecules are dispersed in the polymer matrix, the matrix is cured, and the porogens are then removed, leaving nanoscale pores.
    Type: Grant
    Filed: April 20, 2005
    Date of Patent: June 14, 2011
    Assignee: International Business Machines Corporation
    Inventors: Jennifer Nam Cha, Geraud Jean-Michel Dubois, James Lupton Hedrick, Ho-Cheol Kim, Victor Yee-Way Lee, Teddie Peregrino Magbitang, Robert Dennis Miller, Willi Volksen