Patents Assigned to International Business Machines Corporations
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Patent number: 7962617Abstract: For optimizing Internet access resources, a system for billing network access capacities shared across Internet service providers is disclosed. A Client Service Provider (CSP) may rent access on Points Of Presence belonging to a Master Service Provider (MSP) while maintaining a constant security level and providing connection accounting. When a CSP's subscriber sends an access request to a MSP, the MSP analyzes the subscriber's realm and checks the capacities allocated to the subscriber's CSP. If connection is allowed, the MSP sends an authentication request to the CSP. If the subscriber is authenticated, the MSP launches an accounting process based on the subscriber's realm while the CSP may launch an accounting process associated with the subscriber identifier. The cost of rented Points Of Presence capacity is based on total connection time and on the number of simultaneous connections established by the MSP for the CSP, combined with predetermined thresholds.Type: GrantFiled: January 12, 2009Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Denis Chevalier, Gérard Marmigere, Sophie Martin, Zsolt Szalai
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Patent number: 7962726Abstract: A pipelined microprocessor configured for long operand instructions is disclosed. The microprocessor includes a memory unit and a load-store unit. The load store unit is coupled to the memory unit and includes a data formatter receiving information from the memory unit and including an operand selector and a shift register portion. The microprocessor also includes an execution unit coupled to the load-store unit and receiving operand information there from. The execution unit includes output latches coupled to a storage location within the execution unit for storing output information from the execution unit.Type: GrantFiled: March 19, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Edward T. Malley, Khary J. Alexander, Fadi Y. Busaba, Vimal M. Kapadia, Jeffrey S. Plate, John G. Rell, Jr., Chung-Lung Kevin Shum
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Patent number: 7962425Abstract: A method and system for responding to an alert pertaining to an event. A unique processor of a first micro grid apparatus of at least one micro grid apparatus detects an alert data packet that includes the alert. Each micro grid apparatus includes at least two processors that contain a unique processor. Each processor of each micro grid apparatus has its own operating system. The unique processor of each micro grid apparatus has a unique operating system. Each unique processor selects at least one processor from each micro grid apparatus. Each selected processor is designated as a macro grid processor of a respective macro grid by altering the operating system of each selected processor. An artificial intelligence is generated for each macro grid. The event is responded to and quenched by implementing the artificial intelligence of each macro grid, after which each macro grid is extinguished.Type: GrantFiled: November 23, 2010Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventor: Ian Edward Oakenfull
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Patent number: 7962451Abstract: A method, system, and computer program product to transfer data between two application data structures by copying a data gather scatter program (DGSP) from an exporting process address space where a first data structure is located, to a location in shared memory visible to an importing process address space; assembling a parameter set identifying the data structure; starting a data gather scatter-redistribution machine (DGS-RM) in an importing process space where a second application data structure is located; passing the first parameter set, the DGSP copy, and a second parameter set identifying a second application data structure and a second DGSP to the DGS-RM; and creating master and worker stack machines. The master stack machine identifies a contiguous chunk of the first data structure.Type: GrantFiled: May 28, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Bin Jia, Richard R. Treumann
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Patent number: 7962555Abstract: A system for discussion thread management using tag-based categorization, in which three types of tags are provided together to enable effective categorization of discussion threads, based on both automated and manual tagging. The three tag types are 1) user-defined tags, 2) moderator-promoted tags, and 3) system-generated tags. User-defined tags are arbitrarily defined by individual users and associated by users with posts to meet specific user needs. System-generated tags are automatically generated for each sub-thread to summarize a post and all the replies beneath it. System-generated tags can be promoted to a moderator-promoted tags when a moderator user verifies the correctness of a system-generated tag. The disclosed system detects topic changes in discussion threads based on the tags associated with each post in the thread. A moderator can manually examine sub-threads that have been determined to be off topic, and take appropriate actions.Type: GrantFiled: September 29, 2006Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Nishanth R. Sastry, Alexander Kordun
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Patent number: 7961104Abstract: A computer implemented method, apparatus, and computer program product for communicating the shelf position of an item within a storage unit. An item to be located in the storage unit is identified. The storage unit system determines the shelf position of the identified item. The system then communicates the shelf position of the identified item to the user. If the user requests multiple items, the optimal sequence of retrieval for the items is determined based on a user configurable algorithm.Type: GrantFiled: December 22, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: William Kress Bodin, Michael Lee Masterson, Stephen James Watt
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Patent number: 7962793Abstract: A method, apparatus, and computer instructions for self-diagnosing remote I/O enclosures with enhanced FRU callouts. When a failure is detected on a RIO drawer, a data processing system uses the bulk power controller to provide an alternate path, rather than using the existing RIO links, to access registers on the I/O drawers. The system logs onto the bulk power controller, which provides a communications path between the data processing system and the RIO drawer. The communications path allows the data processing system to read all of the registers on the I/O drawer. The register information in the I/O drawer is then analyzed to diagnose the I/O failure. Based on the register information, the data processing system identifies a field replacement unit to repair the I/O failure.Type: GrantFiled: October 8, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Mike C. Duron, Mark D. McLaughlin
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Patent number: 7962365Abstract: Techniques for using transactional and visual event information to facilitate loss prevention are provided. The techniques include obtaining video of one or more visual events at a point of sale environment and one or more transaction log entries that correspond to the video, wherein the one or more transaction log entries comprise one or more transactional events, categorizing each event as one of one or more model events, using each categorized event to create a revised transaction log, wherein the revised transaction log comprises a sequence of categorized events, wherein each categorized event is a combination of the one or more transactional events and the one or more visual events, examining the revised transaction log to correct one or more mis-categorizations, if any, and revise one or more model event categories with the one or more corrected mis-categorizations, if any, and using the revised transaction log to facilitate loss prevention.Type: GrantFiled: October 31, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Russell Patrick Bobbitt, Quanfu Fan, Arun Hampapur, Frederik Kjeldsen, Sharathchandra Umapathirao Pankanti, Akira Yanagawa, Yun Zhai
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Patent number: 7962695Abstract: A method of integrating a hybrid architecture in a set associative cache having a first type of memory structure for one or more ways in each congruence class, and a second type of memory structure for the remaining ways of the congruence class, includes determining whether a memory access request results in a cache hit or a cache miss; in the event of a cache miss, determining whether LRU way of the first type memory structure is also the LRU way of the entire congruence class, and if not, then copying the contents of the LRU way of the first type memory structure into the LRU way of the entire congruence class, and filling the LRU way of the first type memory structure with a new cache line in the event of a cache miss; and updating LRU bits, depending upon the results of the memory access request.Type: GrantFiled: December 4, 2007Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Marc R. Faucher, Hillery C. Hunter, William R. Reohr, Peter A. Sandon, Vijayalakshmi Srinivasan, Arnold S. Tran
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Patent number: 7962539Abstract: Some demonstrative embodiments of the invention include a method, apparatus and system of generating a random number. A random number generator may include, for example, a plurality of different random-number-generation modules adapted to generate random bits at a plurality of bit paths; and a combiner adapted to combine the bits of the plurality of paths. Other embodiments are described and claimed.Type: GrantFiled: April 30, 2007Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Assaf Barak, Eli Bloch, Elazar Kachir, Anastasia Ester Kapchits, Oded Katz, Moshe Leibowitz, Dan Ramon, Israel A. Wagner
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Patent number: 7962442Abstract: The present invention generally relates to data processing, and more specifically to executing queries against a partitioned database. One embodiment provides a computer-implemented method of managing execution of a query against a partitioned database having a plurality of data partitions. The method comprises receiving a query having conditional filtering logic to restrict the data records in the partitioned database to a result set satisfying the conditional filtering logic. On the basis of an indication that only a subset of the result set is to be returned, a subset of data partitions is determined from the plurality of data partitions from which the subset of the result set can be retrieved. Then, the query is executed only against the subset of data partitions.Type: GrantFiled: August 31, 2006Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Eric L. Barsness, John M. Santosuosso
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Patent number: 7962957Abstract: A computer implemented method, apparatus, and computer program product for port scan protection. A reply data packet having a modified transmission control protocol header is generated to form a modified reply data packet, in response to detecting a port scan. The modified reply data packet will elicit a response from a recipient of the modified data packet. The reply data packet is sent to a first Internet protocol address associated with the port scan. A second Internet protocol address is identified from a header of the response to the modified reply data packet. The second Internet protocol address is an actual Internet protocol address of a source of the port scan. All network traffic from the second Internet protocol address may be blocked to prevent an attack on any open ports from the source of the port scan.Type: GrantFiled: April 23, 2007Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Susann Marie Keohane, Gerald Francis McBrearty, Shawn Patrick Mullen, Jessica Carol Murillo, Johnny Meng-Han Shieh
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Patent number: 7962302Abstract: Techniques for estimating a quality of one or more wafers are presented. One or more first wafers comprising one or more first dies are tested. A probability of wafer failure is determined in accordance with one or more first test measurements of the one or more first dies. A pass status and/or a fail status of one or more second wafers is inferred by testing a select one or more second dies of the one or more second wafers and evaluating one or more second test measurements of the select one or more second dies in accordance with the determined probability of wafer failure.Type: GrantFiled: December 8, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Robert Jeffrey Baseman, Susan G. Conti, William A. Muth, Michal Rosen-Zvi, Frederick A. Scholl
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Patent number: 7962849Abstract: A method and system for processing a user input character string entered by a user into a computer system that comprises a browser. The user input character string is received. The user input character string conforms to a native character set and encoding of the browser for a language selected by the user. The user input character string is converted to a converted character string consisting of characters of a Universal Character Set (UCS) which are independent of platform and language. Any leading and any trailing whitespace characters in the converted character string are removed. Following the removal of any leading and any trailing whitespace characters in the converted character string, any remaining whitespace characters of the converted character string are converted to a single value, resulting in the converted character string being a resultant character string.Type: GrantFiled: March 9, 2006Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventor: Glynn Farrow
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Patent number: 7962472Abstract: A self-optimizing algorithm for real-time problem resolution using historical data. Upon receiving failure symptom characteristics for a product or process failure, the algorithm queries historical failure data to locate historical failure symptoms and corrective actions matching the failure symptom characteristics. If a total number of the historical corrective actions identified meets a minimum match threshold, the algorithm selectively prunes a failure symptom characteristic having the lowest priority level to form an adjusted search query. The algorithm may repeat the querying, identifying, and determining steps using the adjusted search query until the total number of historical corrective actions identified meets the minimum match threshold. Once the threshold is met, the algorithm sorts the historical corrective actions to form a list of recommended corrective actions for the failure symptom characteristics and provides the list of recommended corrective actions to an end user.Type: GrantFiled: September 29, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Steven C. Erickson, Ivory Wellman Knipfer, Jeffrey George Komatsu
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Patent number: 7962357Abstract: System and method for determining maximal price for projects are provided. A project scope of a project based on a plurality of selected criteria is defined, and total cost of the project is estimated. A value model of the project is generated and estimated value of the project is determined using the value model. A composite object function that includes cumulative distributive functions of the total cost and of the estimated value is computed to determine potential maximal price or share rate or combinations thereof.Type: GrantFiled: February 29, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Rong Z. Cao, Wei Ding, Shun Jiang, Juhnyoung Lee, Gregory C. Morris, Chunhua Tian
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Patent number: 7961025Abstract: In one illustrative embodiment, an apparatus for a current-mode phase rotator with partial input phase switching comprises a mixer, wherein the mixer is a four quadrant current-mode mixer comprised of four interpolation buffers, wherein each interpolation buffer receives as input a clock phase from a set of four equidistant clock phases, and a set of two-output current-steering digital to analog converters that supply tail currents to the mixer wherein a first digital to analog converter has additional switches to connect each of two outputs to one of two polarities of a given clock while each remaining digital to analog converter has no additional switches and has two outputs supplying current only to two different polarities of a same clock phase wherein steering the current during incremental rotation about a phase circle defines an octagonal shaped phase envelope.Type: GrantFiled: August 4, 2009Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventor: Sergey Vladimirovich Rylov
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Patent number: 7961732Abstract: A method and apparatus are provided for implementing frame alteration commands in a communications network processor. A set of frame alteration instruction templates is defined. A frame alteration instruction template is identified based upon the packet type recognition result of a received packet. A frame alteration instruction stream is generated utilizing the frame alteration instruction template. Each of the frame alteration instruction templates includes different frame alteration commands to be performed on a packet. Pointers to indirect data bytes to be inserted in a packet are stored in the frame alteration instruction templates. The generated frame alteration instruction stream is used by hardware to provide frame alterations.Type: GrantFiled: March 9, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: John David Irish, Ibrahim Abdel-Rahman Ouda, James A. Steenburgh, Jason Andrew Thompson
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Patent number: 7960276Abstract: A conductor-dielectric interconnect structure is fabricated by providing a structure comprising a dielectric layer having a patterned feature therein; depositing a plating seed layer on the dielectric layer in the patterned feature; depositing a sacrificial seed layer on the plating seed layer in the via; reducing the thickness of the sacrificial seed layer by reverse plating; and plating a conductive metal on the sacrificial seed layer in the patterned feature. Also provided is a dielectric layer having a via therein; a plating seed layer on the dielectric layer in the patterned feature; and a discontinuous sacrificial seed layer located in the patterned feature.Type: GrantFiled: May 29, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Shom Ponoth, David L. Rath, Chih-Chao Yang, Keith Kwong Hon Wong
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Patent number: 7962447Abstract: Techniques for replicating modified data to a hierarchical database. A first list comprises records included in a set of records before at least one modification thereto. A second list comprises records included in the set of records after the at least one modification thereto. For each pre-modification record included in the first list and each post-modification record included in the second list having equal identifying values, a target record at the database and having a matching identifying value is modified. Specifically, if both records include corresponding indexes, information about a structure pointed to by the pre-modification record is removed from an index included in the target record, and information about a structure pointed to by the post-modification record is added to the index. If neither record includes an index, the target record is modified to contain at least one changed value included in the post-modification record.Type: GrantFiled: December 30, 2008Date of Patent: June 14, 2011Assignee: International Business Machines CorporationInventors: Shawfu Chen, Adris E. Hoyos, Kevin T. Jones, Bernard Klos, Aleksandr Krymer