Abstract: A processor-implemented method for determining scan compression ratio based on fault density. The processor-implemented method may include calculating, by a processor, a fault density value for each of a plurality of partitions of an integrated circuit. The fault density is computed by the processor based on a ratio of a total number of faults per partition to a total number of flip-flops per partition. The processor-implemented method further includes the processor determining a compression ratio for each of the plurality of partitions based on the fault density value for each of the plurality of partitions and applying the compression ratio to each of the plurality of the partitions of the integrated circuit.

Abstract: An incompatible software level of an information technology infrastructure component is determined by comparing collected inventory information to a minimum recommended software level. If a knowledge base search finds that the incompatible software level is associated with a prior infrastructure outage event, an outage count score is determined for the incompatible software level by applying an outage rule to a historic count of outages caused by a similar incompatible software level, and combined with an average outage severity score assigned to the incompatible software level based on a level of severity of an actual historic failure of the component within a context of the infrastructure to generate a normalized historical affinity risk score. The normalized historical affinity risk score is provided for prioritizing the correction of the incompatible software level in the context of other normalized historical risk level scores of other determined incompatible software levels.

Abstract: Methods and systems of authenticating electronic identification (ID) documents may provide for receiving a decryption key and an encrypted ID document from a certificate authority server at a mobile device, wherein the encrypted ID document includes a read only document having a photograph of an individual. Additionally, the decryption key may be applied to the encrypted ID document to obtain a decryption result in response to a display request. The decryption result can be output via a display of the mobile device, wherein the encrypted ID document can be sent to a challenge terminal if a challenge request is received.

Abstract: One or more systems, devices, methods, and/or processes described can determine a maximum cache command rate of a processor unit. For example, an interface of the processor unit configured to be coupled to an interconnect of a multiprocessor system and configured such that a first portion of the interface provides a signal to a second portion of the interface, where the first portion of the interface operates utilizing a known frequency and the second portion of the interface operates utilizing a cache frequency of the processor unit; the second portion of the interface circulates the signal; the first portion of the interface receives the signal from the second portion of the interface; the first portion of the interface determines a cache command rate based on the known frequency, the frequency of the cache, and the signal; and the interface provides information indicating the cache command rate to the interconnect.

Abstract: A multi layer interconnecting substrate has at least two spaced apart metal layers with a conductive pad on each one of the metal layers. Two different types of insulating layers are placed between the metal layers. The placement is such that one of the two different types of insulating layers is placed between the conductive pads and the other type of insulating layer is placed between the two spaced apart metal layers.

Abstract: For wiring web widgets of a web mashup application, a web widget registry may be generated based on one or more properties of the web widgets of the web mashup application. Based on the web widget registry, the web widgets of the web mashup application may be wired together, without requiring input from a user. Cycles among the web widgets may also be detected and removed.

Abstract: A disposable dielectric spacer is formed on sidewalls of a disposable material stack. Raised source/drain regions are formed on planar source/drain regions by selective epitaxy. The disposable dielectric spacer is removed to expose portions of a semiconductor layer between the disposable material stack and the source/drain regions including the raised source/drain regions. Dopant ions are implanted to form source/drain extension regions in the exposed portions of the semiconductor layer. A gate-level dielectric layer is deposited and planarized. The disposable material stack is removed and a gate stack including a gate dielectric and a gate electrode fill a cavity formed by removal of the disposable material stack. Optionally, an inner dielectric spacer may be formed on sidewalls of the gate-level dielectric layer within the cavity prior to formation of the gate stack to tailor a gate length of a field effect transistor.

Abstract: A microelectronic structure and a method for fabricating the microelectronic structure provide a plurality of voids interposed between a plurality of conductor layers. The plurality of voids is also located between a liner layer and an inter-level dielectric layer. The voids provide for enhanced electrical performance of the microelectronic structure.

Abstract: A processor-implemented method for a concurrent software service upgrade is provided. The processor implemented method may include receiving a type of service request corresponding to the software service upgrade, determining, by the processor, the type of service request and then generating a plurality of subpartitions corresponding to a hypervisor. The method may further include applying the service request to at least one subpartition within the plurality of subpartitions, wherein the service request is applied to the at least one subpartition based on the type of service request and balancing the system resources among the plurality of subpartitions upon the applying of the service request to the at least one subpartition.

Abstract: Disclosed is a computer system (100) comprising a processor unit (110) adapted to run a virtual machine in a first operating mode; a cache (120) accessible to the processor unit, said cache comprising a plurality of cache rows (1210), each cache row comprising a cache line (1214) and an image modification flag (1217) indicating a modification of said cache line caused by the running of the virtual machine; and a memory (140) accessible to the cache controller for storing an image of said virtual machine; wherein the processor unit comprises a replication manager adapted to define a log (200) in the memory prior to running the virtual machine in said first operating mode; and said cache further includes a cache controller (122) adapted to periodically check said image modification flags; write only the memory address of the flagged cache lines in the defined log and subsequently clear the image modification flags.

Abstract: High-voltage LDMOS devices with voltage linearizing field plates and methods of manufacture are disclosed. The method includes forming an insulator layer of varying depth over a drift region and a body of a substrate. The method further includes forming a control gate and a split gate region by patterning a layer of material on the insulator layer. The split gate region is formed on a first portion of the insulator layer and the control gate is formed on a second portion of the insulator layer, which is thinner than the first portion.

Abstract: Methods and arrangements for optimizing streaming of a group of videos. Throughput of video streams through a common link to at least two different destinations is permitted. An effective flow rate for each video stream is ascertained, and a playout lead for each video stream is estimated. The playout leads are equalized via dynamically changing the effective flow rates of the video streams.

Abstract: A method for fabricating an optical modulator includes forming n-type layer, a first oxide portion on a portion of the n-type layer, and a second oxide portion on a second portion of the n-type layer, patterning a first masking layer over the first oxide portion, portions of a planar surface of the n-type layer, and portions of the second oxide portion, implanting p-type dopants in the n-type layer to form a first p-type region and a second p-type region, removing the first masking layer, patterning a second masking layer over the first oxide portion, a portion of the first p-type region, and a portion of the n-type layer, and implanting p-type dopants in exposed portions of the n-type layer, exposed portions of the first p-type region, and regions of the n-type layer and the second p-type region disposed between the substrate and the second oxide portion.

Abstract: A semiconductor device having a doped well area includes a doped substrate layer formed on a substrate portion of the semiconductor device. The doped substrate layer extends along a first direction to define a length and a second direction perpendicular to the first direction to define a width. A plurality of fins is formed on the doped substrate layer and an oxide substrate layer is formed between each fin. At least one gate is formed on the oxide substrate layer and extends across at least one fin among the plurality of fins.

Abstract: A system and computer program product for solving a two-stage non-linear stochastic formulation for the economic dispatch problem under renewable-generation uncertainty. Certain generation decisions are made only in the first stage and fixed for the subsequent (second) stage, where the actual renewable generation is realized. The uncertainty in renewable output is captured by a finite number of scenarios. Any resulting supply-demand mis-match must then be alleviated using high marginal-cost power sources that can be tapped in short time frames. The solution implements two outer approximation algorithms to solve this nonconvex optimization problem to optimality. Under certain conditions the sequence of optimal solutions obtained under both alternatives has a limit point that is a globally-optimal solution to the original two-stage nonconvex program. A further decomposition approach derived from the Alternating Direction Method of Multipliers algorithm is implemented.

Abstract: Some examples are directed to selecting at least one candidate solution from a first plurality of candidate solutions that has converged on a suboptimal solution during a computer simulation. The computer simulation tests fitness of the first plurality of candidate solutions for an optimization problem. Some examples are further direct to storing a copy of the at least one candidate solution, performing a cataclysm on the first plurality of candidate solutions, and generating a second plurality of candidate solutions. Some examples are further direct to integrating the copy of the at least one candidate solution into the second plurality of candidate solutions after performing of one or more additional computer simulations that test the fitness of the second plurality of candidate solutions for the optimization problem.

Abstract: A mechanism is provided for handling incidents occurring in a managed environment. An incident is detected in a resource in the managed environment. A set of incident handling actions are identified based on incident handling rules for an incident type of the incident. From the set of incident handling actions, one incident handling action is identified to be executed based on a set of impact indicators associated with the set of incident handling rules. The identified incident handling action is then executed to address the failure of the resource.

Abstract: A cable management apparatus includes a flexible planar body and a plurality of channels aligned along a longitudinal axis on a surface of the flexible planar body. The flexible planar body has a plurality of fasteners aligned along a first edge and a second edge of the flexible planar body, the flexible planar body capable of forming a substantially circular bundle along the longitudinal axis. Each channel of the plurality of channels is configured to secure an individual cable to keep the cable from intersecting with another cable.

Abstract: Implementing security access includes mapping input elements of an input device to a coordinate system. Each of the input elements is assigned to a point on the coordinate system that is defined by respective coordinate values. The security access also includes receiving a number of inputs via corresponding input elements. An input element assigned to a first input of the number of inputs is denoted as a starting point for a sequence. Beginning with an input in the sequence that immediately follows the first input in the sequence, the security access further includes identifying a directional orientation of each of the input elements as compared to an input element immediately preceding the input element in the sequence, creating a directional pattern sequence from the directional orientation identified for each of the input elements, and providing access to an information source using the directional pattern sequence as an authentication mechanism.

Abstract: A method of forming an inorganic light emitting diode (LED) with a via contact scheme for large-area display and backlighting applications is provided. An inorganic LED stack comprising, from bottom to top, a first contact layer, an active layer, and a second contact layer having a polarity different from the first contact layer is removed from the underlying base substrate by a controlled spalling or chemical liftoff process. A via contact scheme that can provide ohmic contacts to both the first contact layer and the second contact layer is then formed on the released LED stack.