Abstract: A circuit for transitioning between a discontinuous and a fixed frequency continuous conduction mode (DCM) and (CCM) of a power converter having a driver receiving PWM signals and controlling a switching stage comprises a control switch and a sync switch connected at a common switching node for driving a load.

Abstract: A compact fluorescent lamp package is devised to have the same appearance and dimensions as a conventional incandescent light bulb. The compact fluorescent lamp package includes a base, a fluorescent lamp, a ballast circuit contained entirely in the base, and a diffuser cover.

Abstract: In one embodiment a method enabling in situ dopant implantation during growth of a III-nitride semiconductor body, comprises establishing a growth environment for the III-nitride semiconductor body in a composite III-nitride chamber having a dopant implanter and a growth chamber, growing the III-nitride semiconductor body in the growth chamber, and implanting the III-nitride semiconductor body in situ in the growth chamber using the dopant implanter. A semiconductor device produced using the disclosed method comprises a III-nitride semiconductor body having a first conductivity type formed over a support substrate, and at least one doped region produced by in situ dopant implantation of the III-nitride semiconductor body during its growth, that at least one doped region having a second conductivity type.

Abstract: A structure and a manufacturing method providing improved coplanarity accommodation and heat dissipation in a multi-chip module. One of the components in a multi-chip module (MCM) is provided with a recess formed in its respective top surface; and a film is applied so as to cover the top surfaces of the components and so that any excess film can enter into the recess. The recess is preferably a peripheral groove. Then when molding material is injected, it may surround and seal the side surfaces of the components, while not substantially covering the top surfaces that are covered by the film. Since the recess receives any excess film material that may be present, it may prevent such excess film material from covering the respective side surfaces of the corresponding component and creating a void between the component and the molding material.

Abstract: A semiconductor device package includes a substrate with one or more pads and at least one semiconductor device that has one or more of its electrodes electrically connected to the substrate pads. The package also includes one or more terminals in electrical connection with the substrate pads and that provide for external connection to the device.

Abstract: An enhancement mode III-nitride heterojunction device that includes a region between the gate and the drain electrode thereof that is at the same potential as the source electrode thereof when the device is operating.

Abstract: A circuit for preventing inductor saturation during a step-up load transient in a multi-phase converter circuit where phases are turned ON sequentially by a shared clock signal with a fixed phase shift, each phase having high- and low-side switches series connected at a switching node, the circuit including at least one closed loop connected to at least one phase for providing ripple current cancellation in input and output sides of the multi-phase converter circuit; an oscillator circuit for providing a signal to turn ON and OFF the high- and low-side switches of each of the phases of the multi-phase converter circuit; and a detection circuit to detect the transient. The detect circuit includes an error amplifier circuit to receive input signals from an output of the multi-phase converter and to provide an error signal; and a clock oscillator frequency changing circuit receiving the error signal for increasing the clock oscillation frequency when said detection circuit detects a step-up load transient.

Abstract: An N-polar III-nitride heterojunction JFET which includes a P-type III-nitride body under the gate electrode thereof.

Abstract: A semiconductor package that includes a lead frame riveted to pillars electrically connect to an electrode of a semiconductor die.

Abstract: Method and apparatus for providing a hollow, elongated construction element, for example for use as a vehicle front axle. The method includes (1) directing a first blank through a furnace (2) for heating the blank to a working temperature. The blank is directed between a pair of rollers (3, 4) having profiled surfaces, the blank being preformed in one or more steps to form an intermediate product having a predetermined profile along its longitudinal extent. The blank is fed to a forging press having a number of cooperating die pads, the blank being worked in a plurality of steps (5, 8, 11) to form a substantially finished product, having a cross section substantially in the form of a hat profile of predetermined varying height, width and material thickness along its length. A second blank (14), having essentially the same profile as the hat profile of the first blank in the dividing plane of the cooperating die pads, is placed in connection with the hat profile.

Abstract: A ballast controller integrated circuit which executes a specific set of instructions via an integrated state diagram architecture to control a fluorescent lamp or high intensity discharge lamp and protect the ballast. The state diagram architecture controls powering up and down of the IC and the half-bridge circuit driven by the IC, preheating and striking of the lamp, running of the lamp, sensing for numerous possible fault conditions, and recovering from these fault conditions based on the normal maintenance of a lamp, while requiring fewer internal and external components than previous electronic ballasts.

Abstract: A dead-time generator for incorporation in an integrated circuit wherein the integrated circuit includes a high side and low side gate driver and wherein the high side and low side gate driver drive output switches such that a dead-time is provided between on times of the output switches, the dead-time generator comprising a circuit internal to the integrated circuit having an external terminal at which a dead-time setting component is connected, and wherein the dead-time generator comprises a circuit for providing a discrete dead-time for a range of dead-time setting values at the dead-time setting terminal and wherein, for a plurality of ranges of dead-time setting values at the dead-time setting terminal, the dead-time generator generates an associated plurality of discrete dead-times.

Abstract: A substrate on which a silicon device is mounted in accordance with an embodiment of the present invention includes a plurality of protrusions extending upward from a top surface of the substrate and a solder layer formed on the top of the substrate such that the plurality of protrusions extends through the solder layer and a top portion of each protrusion of the plurality of protrusions is stamped down to be level with a top surface of the solder layer such that the silicon device is supported on the plurality of protrusions when placed on the substrate. The protrusions are preferably gouged up from the surface of the substrate with a needle like tool. A stamper tool is used to stamp the protrusions down to their desired height such that they are properly positioned to support the silicon device. The solder layer may be a solder pre-form or may be a layer of solder paste.

Abstract: A low contact resistance ohmic contact for a III-Nitride or compound semiconductor wafer or die consists of 4 layers of Ti, AlSi, Ti and TiW. The AlSi has about 1% Si. The layers are sequentially deposited as by sputtering, are patterned and plasma etched and then annealed in a rapid thermal anneal process. The use of AlSi in place of pure Al reduces contact resistance by about 15% to 30%.

Abstract: A circuit for indirectly measuring a sign of a current flowing in an inverter stage coupled to a phase of a motor or indirectly measuring the sign of the voltage induced by a counter Electromotive Force (EMF) in a coil of the phase of the motor, the inverter stage being connected between a power supply and the ground. The circuit includes a gate driver circuit coupled to the inverter stage for alternatively connecting the phase of the motor to the power supply and to ground, the gate driver circuit having a current sign detection circuit, wherein the current sign detection circuit senses the sign of the current flowing in the inverter stage, or the sign of the counter EMF for controlling the commutation of switches in the inverter stage.

Abstract: According to one exemplary embodiment, a semiconductor package includes a substrate having lower and upper surfaces. The semiconductor package further includes at least one passive component coupled to first and second conductive pads on the upper surface of the substrate. The semiconductor package further includes at least one semiconductor device coupled to a first conductive pad on the lower surface of the substrate. The at least one semiconductor device has a first electrode for electrical and mechanical connection to a conductive pad external to the semiconductor package. The at least one semiconductor device can have a second electrode electrically and mechanically coupled to the first conductive pad on the lower surface of the substrate.

Abstract: A high voltage durability III-nitride semiconductor device comprises a support substrate including a first silicon body, an insulator body over the first silicon body, and a second silicon body over the insulator body. The high voltage durability III-nitride semiconductor device further comprises a III-nitride semiconductor body characterized by a majority charge carrier conductivity type, formed over the second silicon body. The second silicon body has a conductivity type opposite the majority charge carrier conductivity type. In one embodiment, the high voltage durability III-nitride semiconductor device is a high electron mobility transistor (HEMT) comprising a support substrate including a <100> silicon layer, an insulator layer over the <100> silicon layer, and a P type conductivity <111> silicon layer over the insulator layer.

Abstract: A short channel trench MOSFET which has a lower peak concentration of dopants and a substantially uniform concentration of dopants compared to a conventional short channel device.

Abstract: An end of life (EOL) detection circuit for a gas discharge lamp. The circuit includes a comparator for comparing an input voltage to first and second threshold voltages and providing an EOL signal; a sensing circuit for sensing a DC offset in the lamp-voltage during the EOL of the lamp; and a reference voltage setting circuit responsive to the DC offset including a reference diode for setting an adjustable reference voltage as said input voltage to the comparator.

Abstract: A MOSgated trench device has a reduced on resistance by forming a less than about a 13 nm thick strained SiGe layer on the silicon surface of the trenches and forming a thin (30 nm or less) layer of epitaxially deposited silicon on the SiGe layer which epi layer is converted to a gate oxide layer. The conduction channel formed by the SiGe layer is permanently strained to increase its mobility particularly hole mobility.