Abstract: Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

Abstract: Systems and methods for efficient transfer of elements are disclosed. A film which supports a plurality of diced integrated device dies can be provided. The plurality of diced integrated device dies can be disposed adjacent one another along a surface of the film. The film can be positioned adjacent the support structure such that the surface of the film faces a support surface of the support structure. The film can be selectively positioned laterally relative to the support structure such that a selected first die is aligned with a first location of the support structure. A force can be applied in a direction nonparallel to the surface of the film to cause the selected first die to be directly transferred from the film to the support structure.

Abstract: A stacked and electrically interconnected structure is disclosed. The stacked structure can include a first element comprising a first contact pad and a second element comprising a second contact pad. The first contact pad and the second contact pad can be electrically and mechanically connected to one another by an interface structure. The interface structure can comprise a passive equalization circuit that includes a resistive electrical pathway between the first contact pad and the second contact pad and a capacitive electrical pathway between the first contact pad and the second contact pad. The resistive electrical pathway and the capacitive electrical pathway form an equivalent parallel resistor-capacitor (RC) equalization circuit.

Abstract: A method of bonding includes using a bonding layer having a fluorinated oxide. Fluorine may be introduced into the bonding layer by exposure to a fluorine-containing solution, vapor or gas or by implantation. The bonding layer may also be formed using a method where fluorine is introduced into the layer during its formation. The surface of the bonding layer is terminated with a desired species, preferably an NH2 species. This may be accomplished by exposing the bonding layer to an NH4OH solution. High bonding strength is obtained at room temperature. The method may also include bonding two bonding layers together and creating a fluorine distribution having a peak in the vicinity of the interface between the bonding layers. One of the bonding layers may include two oxide layers formed on each other. The fluorine concentration may also have a second peak at the interface between the two oxide layers.

Abstract: A method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed.

Abstract: A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

Abstract: A structure can include a first element and a carrier bonded to the first element along an interface. A waveguide can be defined at least in part along the interface between the first element and the carrier. The waveguide can comprise an effectively closed metallic channel and a dielectric material within the effectively closed metallic channel, as viewed from a side cross-section of the structure. Various millimeter-wave or sub-terahertz components or circuit structures can also be created based on the waveguide structures disclosed herein.

Abstract: Representative implementations provide techniques and systems for processing integrated circuit (IC) dies. Dies being prepared for intimate surface bonding (to other dies, to substrates, to another surface, etc.) may be processed with a minimum of handling, to prevent contamination of the surfaces or the edges of the dies. The techniques include processing dies while the dies are on a dicing sheet or other device processing film or surface. Systems include integrated cleaning components arranged to perform multiple cleaning processes simultaneously.

Abstract: A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.

Abstract: A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Abstract: In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

Abstract: A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first contact structure is bonded to a second element having a second contact structure. First and second contact structures can be exposed at bonding and electrically interconnected as a result of the bonding. A via may be etched and filled after bonding to expose and form an electrical interconnect to interconnected first and second contact structures and provide electrical access to this interconnect from a surface.

Abstract: A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads formed by contact bonding of the first non-metallic region to the second non-metallic region. At least one of the first and second substrates may be elastically deformed.

Abstract: A bonded structure can include a first element having a first conductive interface feature and a second element having a second conductive interface feature. An integrated device can be coupled to or formed with the first element or the second element. The first conductive interface feature can be directly bonded to the second conductive interface feature to define an interface structure. The interface structure can be disposed about the integrated device in an at least partially annular profile to connect the first and second elements.

Abstract: A method for forming a direct hybrid bond and a device resulting from a direct hybrid bond including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, capped by a conductive barrier, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of metallic bonding pads capped by a second conductive barrier, aligned with the first set of metallic bonding pads, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the metallic bonding pads on the second substrate, and a contact-bonded interface between the first and second set of metallic bonding pads capped by conductive barriers formed by contact bonding of the first non-metallic region to the second non-metallic region.

Abstract: A bonded device structure including a first substrate having a first set of conductive contact structures, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the contact structures on the first substrate, a second substrate having a second set of conductive contact structures, preferably connected to a device or circuit, and having a second non-metallic region adjacent to the contact structures on the second substrate, and a contact-bonded interface between the first and second set of contact structures formed by contact bonding of the first non-metallic region to the second non-metallic region. The contact structures include elongated contact features, such as individual lines or lines connected in a grid, that are non-parallel on the two substrates, making contact at intersections. Alignment tolerances are thus improved while minimizing dishing and parasitic capacitance.