Abstract: A solid state spectrometer unit cell or plurality of cells for sensing different wavelengths of electromagnetic radiation at different depths within the substrate of the device. Variable bias voltages on one or more p-n junctions in the device are used so that the depth of the depletion regions are selectively varied. By varying the depletion region thickness of the p-n junctions in the device, the wavelengths absorbed by the semiconductor device and resultant electron-hole pairs collected by the p-n junctions are varied. In one embodiment, the outputs of each of two unit cell p-n junctions are sensed and the difference calculated and output to suitable circuitry for display as representative of a particular range or frequency of the electromagnetic spectrum.

Abstract: A method for using a depletion region in a solid state spectrometer unit cell or plurality of cells for sensing different wavelengths of electromagnetic radiation at different depths within the substrate of the device. Variable bias voltages on one or more p-n junctions in the device are used so that the depth of the depletion regions are selectively varied. By varying the depletion region thickness of the p-n junctions in the device, the wavelengths absorbed by the semiconductor device and resultant electron-hole pairs collected by the p-n junctions are varied. In one embodiment, the outputs of each of two unit cell p-n junctions are sensed and the difference calculated and output to suitable circuitry for display as representative of a particular range or frequency of the electromagnetic spectrum.

Abstract: A multilayer electronic imaging module and sensor system incorporating a micro-lens layer for imaging and collimating a received image from a field of regard, a photocathode layer for detecting photons from the micro-lens layer and generating an electron output, a micro-channel plate layer for receiving the output electrons emitted from the photocathode in response to the photon input and amplifying same and stacked readout circuitry for processing the electron output of the micro-channel plate. The sensor system of the invention may be provided in the form of a Cassegrain telescope assembly and includes electromagnetic imaging and scanning means and beam-splitting means for directed predetermined ranges of the received image to one or more photo-detector elements which may be in the form of the micro-channel imaging module of the invention.

Abstract: A targeting sight having viewing optics, a focal plane array and an alignment frame having an aperture that defines a target area that is mounted proximal the muzzle of a weapon. Electronic processing means is provided to define a crosshair in the viewing optics. The alignment frame is illuminated with a beam and the reflected portion of the beam is received by the focal plane array and is processed to position the crosshair with respect to the aperture.

Abstract: A method for defining an electrically conductive metalized structure, which may comprise an electrode or trace, on the surface of a three-dimensional element. The three-dimensional element may comprise a glass microsphere or shell resonator. A laser direct write grayscale photolithographic process is used in conjunction with electrically conductive metal deposition processes to define one or more electrically conductive metal structures on the surfaces of the three dimensional element.

Abstract: An opposing first plate and second plate are slideably disposed with respect to each other using self-aligning plate registration means. Circuit board registration means and component registration means are provided for the initial X-Y alignment and registration of the circuit board and socket contact elements with one or more electrically conductive leads of an electronic component such as a focal plane array (FPA). A non-contact portion is provided on the first plate to eliminate plate contact with the first component surface which may comprise the lens of an FPA. The first and second plates are urged together such that an even, controlled and substantially planar compressive force is applied, permitting the efficient insertion of the electrically conductive leads into the socket contacts.

Abstract: A process and product made from the process is disclosed to minimize solder collapse during solder reflow. Predetermined bond pads on a layer or component have a solder paste such as Sn63 solder paste with a first lower reflow temperature applied and a spacer element such as an SAC solder ball or stud bump having a predetermined geometry with a second higher reflow temperature applied. The SAC solder balls or stud bumps act as spacing elements but do not interact with the solder paste such that the solder paste may be reflowed while precisely maintaining the space between the layers.

Abstract: A stackable integrated circuit chip layer and module device that avoids the use of electrically conductive elements on the external surfaces of a layer containing an integrated circuit die by taking advantage of conventional wire bonding equipment to provide an electrically conductive path defined by a wire bond segment that is encapsulated in a potting material so as to define an electrically conductive wire bond “through-via” accessible from at least the lower or second surface of the layer.

Abstract: A method for fabricating a stackable integrated circuit layer and a device made from the method are disclosed. A stud bump is defined on the contact pad of an integrated circuit die and the stud-bumped die encapsulated in a potting material to define a potted assembly. A predetermined portion of the potting material is removed whereby a portion of the stud bump is exposed. One or more electrically conductive traces are defined on the layer surface and in electrical connection with the stud bump to reroute the integrated circuit contacts to predetermined locations on the layer to provide a stackable neolayer.

Abstract: A method for providing a known good integrated circuit die having enhanced planarity from a prepackaged integrated circuit die having a surface warpage such as in a ball grid array (BGA) package is provided. A partially-depackaged integrated circuit package is affixed to a substrate with a spacer element there between such that the active surface of the die within the partially depackaged integrated circuit die is “bowed” slightly upwardly to define a convex surface. The exposed encapsulant on the now-convex surface of the mounted, partially-depackaged integrated circuit package is then lapped or ground away to a predetermined depth so that an integrated circuit die is provided having an enhanced planarity and surface uniformity.

Abstract: A conformal, multilayer micro-channel structure having a wear-resistant interior micro-channel surface coating of an ALD deposited conformal alumina (Al2O3) ceramic of about 1000 ? in thickness and a titanium nitride (TiN) of about 300 ? to about 1000 ? in thickness. The Al2O3/TiN multilayer structure is resistant to erosion and to electro-chemical corrosion as is found in prior art micro-channel coolers and structures.

Abstract: A LIDAR sensor element and system for wide field-of-view applications such as autonomous UAS landing site selection is disclosed. The sensor element and system have an imaging source such as a SWIR laser for imaging a field of regard or target with a beam having a predefined wavelength. The beam is scanned over the field of regard or target with a beam steering device such as Risley prism. The reflected beam is captured by the system by receiving optics which may comprise a Risley prism for receiving and imaging the reflected beam upon a photodetector array such as a focal plane array. The focal plane array may be bonded to and a part of a three-dimensional stack of integrated circuits, a plurality of which may comprise one or more read out integrated circuits.

Abstract: An anti-tampering device and method to inhibit or prevent unauthorized probing of an electronic circuit. Propriety target circuitry transmits a distinct signature in the form of an RF signal which is received by the RF anti-tampering detection circuitry. The transmitted RF signature is monitored by the RF anti-tampering detection circuitry for user-defined changes. In the event an unauthorized attempt is made to probe the target system electronics, the mass of the probe alters the RF transmission characteristics of the RF transmission media, changing the RF signature. The altered RF signature is received by the receiving antenna and RF receiver and is processed by signal processing electronics. The change in the RF signature indicates a tamper event and a predefined anti-tamper event is generated.

Abstract: A switched tracking power supply circuit that monitors an input power source and modifies the output based on the characteristics of the input source. A power source is input into a switching power supply. A plurality of gain networks and feedback paths from Vref of the switching power supply are in connection whereby the invention monitors the input power source and modifies the output based on the characteristics of the input source. In one embodiment, a smart controller monitors the discharge curve of a power source and translates the output to emulate the discharge curve of a second power source.

Abstract: A device and method using one or more electrically conductive nano-structures defined on one or more surfaces of a microelectronic circuit such as an integrated circuit die, microelectronic circuit package a stacked microelectronic circuit package, or on the surface of one or more layers in a stack of layers containing one or more ICs. The nano-structure is in connection with a monitoring circuit and acts as a “trip wire” to detect unauthorized tampering with the device or module. Such a monitoring circuit may include a power source such as an in-circuit or in-module battery and a “zeroization” circuit within the chip or package to erase the contents of a memory when the nano-structure is breached or altered. One or more electrically conductive nano-structures interconnect and reroute one or more electrical connections between one or more ICs to create an “invisible” set of electrical connections on the chip or stack to obfuscate an attempt to reverse engineer the device. microscope.

Abstract: In a preferred embodiment of the invention, a mirror compiler is provided for each protected device or circuit resulting in a program that is embedded into the protected device's source code. The mirror compiler can be configured to have multiple selectable compilation parameters offering the programmer flexible options for mirrored power cancellations. In the preferred embodiment, the mirror compiler comprises a digital-to-analog converter and a digital-to-analog load to sink current. These elements serve to define a complement of the normal (i.e., unprotected) programmed device's output current. The digital-to-analog load currents are output and thus act to cancel the expected variations in the currents of the protected programmed device.

Abstract: A micro-lamellar grating interferometer for deriving the spectrum of an incident beam from a scene of interest from a generated interferogram is disclosed with a method for using the same. The interferometer comprises a lamellar grating defined by two interleaved reflective mirror set; a first stationary set of electromagnetically reflective elements and a second moveable set of electromagnetically reflective elements. The first and second set of electromagnetically reflective elements are referred to as mirror elements herein. The second mirror element set is disposed on a moveable platform supported by flexures that are driven with a high stiffness magnetic, thermal or piezoelectric actuator designed have a predetermined vertical displacement that is perpendicular to the first mirror set.

Abstract: The invention is comprised of one or more variably conductive thermal switches. The thermal switches are sandwiched between two thermal conductors (e.g., heat pipes). Within each thermal switch is an array of micro-switches with a number of finger-like structures that are electrically actuated to form one or more thermal connection between two thermally conductive layers. The net thermal conductance of the switch is scalable based on the number of activated micro-switches. By changing the thermal conductance between the source and the sink, the temperature of the source may be adjusted based on the needs of the system in which it is employed.

Abstract: An unmanned aerial surveillance and reconnaissance system are disclosed wherein an unmanned aerial vehicle is launchable from a launch tube, for instance, the bore of an existing weapons system mounted on a mobile vehicle, such as a weapon barrel of a tank or armored combat vehicle and which the launch may be remotely initiated from the protected armored compartment of the mobile vehicle.

Abstract: In a preferred embodiment of the invention, a high density interconnect structure is provided comprised of a dielectric structure and one or more compressible conductive member for the electrical connection of a plurality of inputs and outputs of a three-dimensional module to external circuitry using a compression frame and a flex connector. The compression frame has a surface equal to or less than the surface area of the module surface upon which it is mounted and permits a plurality of modules to be “butted” together to provide, for instance, a buttable focal plane array module comprising a mosaic of buttable focal plane arrays.