Patents Assigned to IT Technologies, Inc.
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Patent number: 9503222Abstract: A first frame and a second frame are combined into an extended frame. The extended frame is encapsulated and transmitted over a channel as an extended physical digital. A transmission error notification is received, indicating error in a reception of the transmitted extended physical digital. In response, a re-transmission encapsulates the first frame into a first physical digit, transmits the first physical digit over the channel, encapsulates the second frame into a second physical digit, and transmits the second physical digit over the channel.Type: GrantFiled: December 7, 2012Date of Patent: November 22, 2016Assignee: Qualcomm Technologies, Inc.Inventors: Philippe Martin, Jonah Probell, Jean-Jacques Lecler
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Patent number: 9501552Abstract: Entity resolution in a database comprises receiving imported data comprising imported data entities each having properties each having values; receiving first user input that selects the imported data entities for resolution to existing data entities in a database; receiving second user input that specifies matching criteria for matching the imported data entities to the existing data entities, wherein each of the matching criteria comprises a matching technique; matching the imported data entities to the existing data entities using the matching criteria, resulting in creating and storing matched entity information, wherein the matched entity information is organized in matched entity data sets associated with subsets of the matching criteria that were matched; consolidating the imported data entities into the existing data entities; storing the first user input and second user input as a named criteria set for use in subsequent entity resolution operations.Type: GrantFiled: August 29, 2013Date of Patent: November 22, 2016Assignee: Palantir Technologies, Inc.Inventors: Robert McGrew, Stephen Cohen
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Patent number: 9503332Abstract: A method comprising storing identification information in a memory medium of a portable computing device, communicating with a network access point to gain access to a network, sending the identification information from the portable computing device to the network access point, and receiving at the portable computing device access to the network through the network access point based on the identification information.Type: GrantFiled: November 12, 2012Date of Patent: November 22, 2016Assignee: Cisco Technology, Inc.Inventors: Brett B. Stewart, James Thompson, Kathleen E. McClelland
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Patent number: 9503451Abstract: Techniques for maintaining potentially compromised authentication information for a plurality of accounts may be provided. An individual piece of authentication information may be associated with one or more tags that indicate access rights with respect to requestors that also provide and maintain other potentially compromised authentication information. A subset of the potentially compromised authentication information may be determined based on the one or more tags in response to a request from a requestor for the potentially compromised authentication information. In an embodiment, the subset of the potentially compromised authentication information may be provided to the requestor.Type: GrantFiled: December 15, 2014Date of Patent: November 22, 2016Assignee: Amazon Technologies, Inc.Inventors: David James Kane-Parry, Darren Ernest Canavor, Jesper Mikael Johansson
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Patent number: 9502968Abstract: An apparatus for converting voltage includes terminals coupled to external circuits at corresponding voltages and a switching network having driving circuits and semiconductor switches that interconnect capacitors in successive states to one another and to the terminals. The switches interconnect some capacitors to one another through a series of switches when an activation pattern causes them to be activated. Each driving circuit has power connections, a control input, and a drive output coupled to and controlling at least one switch. A drive output of one of them couples to and drives each switch. Some of the driving circuits are powered via corresponding power connections from at least one of the capacitors such that a voltage across the corresponding power connections is less than a highest of the corresponding voltages. The terminals and the switching network are constituents of a switched capacitor converter.Type: GrantFiled: May 13, 2014Date of Patent: November 22, 2016Assignee: ARCTIC SAND TECHNOLOGIES, INC.Inventors: David Giuliano, Gregory Szczeszynski, Raymond Barrett, Jr.
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Patent number: 9501131Abstract: A device includes a state machine. The state machine includes a plurality of blocks, where each of the blocks includes a plurality of rows. Each of these rows includes a plurality of programmable elements. Furthermore, each of the programmable elements are configured to analyze at least a portion of a data stream and to selectively output a result of the analysis. Each of the plurality of blocks also has corresponding block activation logic configured to dynamically power-up the block.Type: GrantFiled: August 31, 2012Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventor: Harold B Noyes
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Patent number: 9503351Abstract: Deployment feedback for updates to resources implemented in a private network may be implemented. Feedback codes may be generated and included in deployments sent to a private network for deployment at resources implemented in the private network. One or more of the included feedback codes may be selected based on the performance of the deployment and provided via a feedback communication channel that is disconnected and distinct from the private network. Once received, a current status of the deployment may be determined based on the one or more feedback codes provided via the feedback communication channel.Type: GrantFiled: December 9, 2014Date of Patent: November 22, 2016Assignee: Amazon Technologies, Inc.Inventors: Jacob Adam Gabrielson, Jean-Paul Bauer, Michael Phillip Quinn, Weizhong Hua, Casey Thomas Huggins
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Patent number: 9501415Abstract: A system for image caching is described. The system may include a non-volatile memory to store encoded images, a volatile memory including an image cache, and a processing device to retrieve one or more of the encoded images from the non-volatile memory using a fetching thread, distribute the retrieved images to multiple decoding threads to decode the retrieved images, and store the decoded images in the image cache for use by a rendering application.Type: GrantFiled: October 9, 2012Date of Patent: November 22, 2016Assignee: Amazon Technologies, Inc.Inventor: Jean-Olivier Racine
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Patent number: 9503097Abstract: A circuit includes a magnetic logic unit including input terminals, output terminals, a field line, and magnetic tunnel junctions (MTJs). The field line electrically connects a first and a second input terminal, and is configured to generate a magnetic field based on an input to at least one of the first and the second input terminal. The input is based on a first analog input to the circuit. Each MTJ is electrically connected to a first and a second output terminal, and is configured such that an output of at least one of the first and the second output terminal varies in response to a combined resistance of the MTJs. The resistance of the MTJs varies based on the magnetic field. The circuit is configured to mix the first analog input and a second analog input to generate an analog output based on the output of the second output terminal.Type: GrantFiled: January 27, 2015Date of Patent: November 22, 2016Assignee: Crocus Technology Inc.Inventors: Douglas J. Lee, Yaron Oren-Pines, Stuart Desmond Rumley, Seyed A. Tabatabaei, Bertrand F. Cambou
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Patent number: 9503374Abstract: A controller having an application optimally routing traffic to balance fluctuating traffic loads in a SDN network. A processor is configured to control the data plane to establish routing through the plurality of routers, wherein the processor is configured to establish hybrid routing comprising both explicit routing and destination-based routing. The processor utilizes a set of traffic matrices representing the fluctuating traffic load over time. A destination-based multi-path routing algorithm is configured to improve load balancing of the traffic load based on the set of representative traffic matrices. The destination based routing is calculated based on linear programming. The processor comprises a traffic categorization algorithm configured to identify a set of key flows, wherein the processor is configured to explicitly route the set of key flows.Type: GrantFiled: January 22, 2014Date of Patent: November 22, 2016Assignee: FUTUREWEI TECHNOLOGIES, INC.Inventors: Min Luo, H. Jonathan Chao, Wu Chou, Junjie Zhang, Kang Xi
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Patent number: 9502369Abstract: Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a centerline between the semiconductor dice and operably coupled with integrated circuitry of the first and second semiconductor dice. Another group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the first semiconductor die. A further group of solder bumps is laterally offset from the centerline and operably coupled only with integrated circuitry of the second semiconductor die. Methods of forming semiconductor device packages include aligning first and second semiconductor dice with active surfaces facing each other, the first and second semiconductor dice each including bond pads along a centerline thereof and additional bond pads laterally offset from the centerline thereof.Type: GrantFiled: February 4, 2015Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventors: Anthony D. Veches, William R. Stephenson, Walter L. Moden
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Patent number: 9502207Abstract: An ion source filament clamp has a clamp member having first and second ends. The first end has one of a cam surface and a cam follower, and has first and second portions that are opposed to one another and separated by a slot having a lead opening defined therein to receive a lead of an ion source filament. An actuator pin extends along an actuator pin axis and has first and second sections. The first section is coupled to the first portion of the clamp member. The actuator pin extends through, and is in sliding engagement with, a thru-hole in the second portion of the clamp member. A cam member is operably coupled to the second section of the actuator pin. The cam member has a handle and the other of the cam surface and cam follower and is configured to rotate between a clamped position and an unclamped position. The cam follower slidingly contacts the cam surface.Type: GrantFiled: August 26, 2015Date of Patent: November 22, 2016Assignee: AXCELIS TECHNOLOGIES, INC.Inventors: John F. Baggett, Jason R. Beringer
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Patent number: 9502086Abstract: A logic analyzer and method of logic analysis: detect via one or more probes a plurality of signals associated with a double data rate (DDR) random access memory (RAM); analyze the detected signals to identify a plurality of Transactions for the DDR RAM pertaining to a plurality of Operations for the DDR RAM; select one of the plurality of Operations for the DDR RAM; identify all of the Transactions for the DDR RAM which pertain to the selected Operation; and display indications of all of the Transactions for the DDR RAM which pertain to the selected Operation together on a display window of a display device.Type: GrantFiled: November 23, 2015Date of Patent: November 22, 2016Assignee: Keysight Technologies, Inc.Inventors: Frank D. Simon, Michael Shaun Backsen
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Patent number: 9502256Abstract: Atomic layer deposition (ALD) can be used to form a dielectric layer of zirconium aluminum oxynitride (ZrAlON) for use in a variety of electronic devices. Forming the dielectric layer may include depositing zirconium oxide using atomic layer deposition and precursor chemicals, followed by depositing aluminum nitride using precursor chemicals, and repeating. The dielectric layer may be used as the gate insulator of a MOSFET, a capacitor dielectric, and a tunnel gate insulator in flash memories.Type: GrantFiled: January 7, 2016Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventors: Kie Y. Ahn, Leonard Forbes
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Patent number: 9503180Abstract: Presented herein are techniques for detection and avoidance of interference in a telecommunications network. In one example, a cable modem termination system (CMTS) is configured to receive upstream traffic from a plurality of cable modems. The CMTS detects collision characteristics resulting from substantially simultaneous transmissions from different combinations of the cable modems. Based on the detected collision characteristics, the CMTS designates/identifies collision groups for each of a plurality of the cable modems. After designation of the collision groups, the CMTS schedules upstream transmissions by the plurality of cable modems such that cable modems within the same collision group do not transmit within a same time frame and such that two or more cable modems that are not within the same collision group may transmit within a same time frame.Type: GrantFiled: September 4, 2014Date of Patent: November 22, 2016Assignee: Cisco Technology, Inc.Inventors: Hang Jin, Tong Liu, Pawel Sowinski, De Fu Li, John Skrobko
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Patent number: 9503677Abstract: The quality of stereoscopic imaging using cameras with wide angle lenses can be improved using various calibration approaches to determine distortions or misalignments between the cameras. A calibration object such as a checkered grid with a determined inclination between portions can be used to provide lateral calibration as well as depth information. Intersections of the checkered regions can be used to determine intersection points for the calibration object in the image. Regions about at least a portion of these points can be analyzed, where the regions are sized such that features of the calibration object are substantially linear. Nearest neighbor points can be identified, and a local orientation determined in order to determine a relationship of each of the nearest points. Once identified, the points in each image can be correlated to corresponding points of the calibration object.Type: GrantFiled: November 29, 2012Date of Patent: November 22, 2016Assignee: Amazon Technologies, Inc.Inventors: Sharadh Ramaswamy, Volodymyr V. Ivanchenko
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Patent number: 9502734Abstract: Various embodiments are directed to flexible battery structures comprising a flexible hinge region. For example, a flexible battery structure may comprise a plurality of battery layers. A first portion of the layers may be continuous across the hinge region and one or more cell regions. A second portion of the layers may be discontinuous at the hinge region.Type: GrantFiled: March 24, 2014Date of Patent: November 22, 2016Assignee: Amazon Technologies, Inc.Inventors: James Robert Lim, Yuting Yeh, Erik Avy Vaknine, David Wang
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Patent number: 9500031Abstract: A rotary steering apparatus for a drill string in which a bending section induces a bend in a portion of the bottom hole assembly of the drill string by using the rotation of the drive shaft that drives the drill bit during normal drilling, while operating at a reduced or zero drilling mud flow rate, to drive a reduction gear that rotates a nut or cam so as to place a tension tube into tension. The tension tube abuts a flexible housing and places the flexible housing in compression. The flexible housing has a local weakening formed in it that causes it to preferentially bend in a predetermined direction. Compression in the flexible housing causes the housing to bend, which bends a portion of the bottom hole assembly so as to alter the direction of drilling. Rotation of the drive shaft at reduced or zero mud flow rate also causes the drive shaft to drive rotation of a second reduction gear the output of which rotates the bent portion of the bottom hole assembly thereby altering its tool face angle.Type: GrantFiled: November 12, 2012Date of Patent: November 22, 2016Assignee: APS Technology, Inc.Inventors: David A. Coull, Malcolm George Vie
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Patent number: 9499907Abstract: A method of forming a material over a substrate includes performing at least one iteration of the following temporally separated ALD-type sequence. First, an outermost surface of a substrate is contacted with a first precursor to chemisorb a first species onto the outermost surface from the first precursor. Second, the outermost surface is contacted with a second precursor to chemisorb a second species different from the first species onto the outermost surface from the second precursor. The first and second precursors include ligands and different central atoms. At least one of the first and second precursors includes at least two different composition ligands. The two different composition ligands are polyatomic or a lone halogen. Third, the chemisorbed first species and the chemisorbed second species are contacted with a reactant which reacts with the first species and with the second species to form a reaction product new outermost surface of the substrate.Type: GrantFiled: June 25, 2013Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventors: Zhe Song, Chris M. Carlson
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Patent number: 9502314Abstract: Disclosed herein is a method for manufacturing a tested apparatus that includes forming a stacked structure that includes a plurality of first semiconductor chips stacked over a semiconductor wafer. The semiconductor wafer comprises a plurality of second semiconductor chips that are arranged in matrix of a plurality of rows and columns. Each of the first semiconductor chips is stacked over and electrically connected to a different one of the second semiconductor chips. The method further includes contacting a probe card to at least one of the first semiconductor chips to perform a first test operation on a corresponding one of the second semiconductor chips with an intervention of the at least one of the first semiconductor chips so that a plurality of tested apparatus each comprising a pair of first and second semiconductor chips stacked with each other is derived.Type: GrantFiled: July 29, 2014Date of Patent: November 22, 2016Assignee: Micron Technology, Inc.Inventors: Tetsuji Takahashi, Toru Ishikawa, Kazuya Takakura