Abstract: Fault tolerant topology for passive optical networks essentially based on a "tree configuration" with branch points or nodes (16, 17) made up of passive optical splitters, in which each node (16, 17) of a specific level is connected to the same number of nodes (16, 17) of the level immediately below by two or more branches (Rd, Rs) and a supplementary connection (S1, S2 . . . ) is provided between each pair of nodes of the same level (FIG. 1).

Abstract: A pulse width modulated DC/AC converter includes an input circuit galvanically insulated from an output circuit. The input circuit includes two branches connected in parallel to a pair of input terminals which receive a direct current voltage. Each branch includes an inductor, and a bidirectional switching element which may include a transistor in parallel with a diode. The output circuit has a similar configuration with the addition of two filtering capacitors connected across the output terminals. The converter has a wide range of applications, such as a ringing generator in a telephone system, an emergency supply for a computer system, or as a driving stage for a AC motor.

Abstract: A comparator circuit includes a first amplifier stage whose input can be selectively connected to an input voltage and to a reference voltage. A second amplifier stage is connected to the output of the first amplifier and a final stage is connected to the output of the second amplifier stage, at which a rectangular signal is output. The rectangular signal represents times in which the input signal is higher or lower than the reference signal. Both amplifier stages include a first input capacitance having one plate connected to the input of that stage. The other plate of the capacitance is connected to the gate of a transistor and a control switch. Low power dissipation is realized in the circuit by including a follower cascaded with an inverter. This structure allows the same operation as the prior art but offers a better design flexibility since all design parameters are free to be rearranged to achieve the required performance.

Abstract: The process for the conversion of a digital code involves the construction of two positive unipolar voltages (Vo+, Vo-) ranging between the analog ground level (Vgnd) and an upper full scale level (Vref), and the shifting downward of the second one (Vo-) of these voltages by a quantity equal to its maximum range, so to obtain two unipolar voltages (Vo+, Vo-) and with an amplitude equal to the halved module of the final stage.

Abstract: Process and device to decode a shortened cyclic binary code, able to correct single errors bursts of given length t or shorter, specially for an F(n-b,k-b) shortened Fire code. It is based on the calculation of two syndrome polynomials, s1(x) and s2(x), in two specific registers (SR1, SR2), on the shifting in a first direction of the polynomial s1(x) .GAMMA.1 times until the errors burst is trapped in the t less significant positions of the first (SR1) register and on the shifting of the syndrome polynomial s2(x) .GAMMA.2 times in an opposite second directon in a third (MEL) register until it becomes equal to the t less significant positions of the first (SR1) register. Alternatively the second register can be a bidirectional shift register (SRb) where the shifting takes place also in the second direction. Moreover all computations in the process are made as simple as possible.

Abstract: Printed circuit boards are wavesoldered by a method featuring the use of a plurality of elementary jets of molten solder to form a single flat soldering wave. Such a single flat wave is achieved by revolving those jets in an orbital motion such that the orbital motion is in a horizontal plane substantially parallel to the printed circuit board. Such a method allows the removal of air/gas bubbles during wavesoldering from any side of a component that is attached to a printed circuit board.

Abstract: In one receiver for phase modulated digital signals, bit packet transmitted with known preamble, of the type foreseeing a maximum likelihood estimation circuit for distortion corrections, it is performed the cancellation of isofrequency interfering signals, having the same frequency of the useful signal and the same modulation type as well.This is obtained making an estimation of amplitude (A), phase (.PHI.) and time synchronism (.tau.) parameters of the interfering signal in correspondence of each bit packet and reconstructing the useful signal with a maximum likelihood estimation process employing these parameters (FIG. 1).

Abstract: Synchronization is provided between a mobile radio station and a base station in a digital radiomobile system TDMA where the base station transmits a timeslot containing a preset frequency sinusoid. The method samples (according to different embodiments) the baseband demodulated signals and measures the phase increases between two subsequent samplings. Increases are compared with an intermediate threshold value between 0.degree. and 180.degree. to construct a vector formed by a series of values, the current sum of which is calculated. The minimum value of this sum is then identified to approximately synchronize the mobile station with the timeslot containing the sinusoid. Afterwards, the frequency offset between the local oscillator frequency and the base station oscillator frequency is calculated and corrected in order to correctly identify the timeslot containing the preamble for fine synchronization. Then the decoding of the message containing the station and the frame data is performed.

Abstract: In a digital mobile system, to avoid distortions and fadings due to multiple propagation and the doppler shift, adaptive gain of the amplifier of a demodulator must be controlled with information derived from the signal at a high frequency. This is accomplished without the use of intermediate frequency selection filters by first demodulating the signal to base band, filtering out the desired signal and remodulating the desired signal to a higher frequency. From this remodulated signal the adjustable gain is controlled.

Abstract: A base station in a mobile digital system (TDMA/FDMA) utilizes a frequency hopping technique. The interconnection among receiver/transmitters (RT1-RTm) and process nodal points (NP1-NPm) takes place in base band using a common medium as distribution means of data relevant to the different users, which are entered on and sensed from at least one bus (B, B'). According to one embodiment two separate bus are foreseen, one for transmission and the other one for reception.

Abstract: A basic element for the interconnection network of a fast packet switching node, where a synchronization is made at bit input stream level, the cell beginning is identified and a stream conversion from the serial form to a word parallel form is performed. Cells are thus transformed in a completely parallel form and in the same form they are cyclically discharged in the subsequent cell time in a memory, where cells are written and read in a shared way on the basis of instructions given by a control unit, thus performing the switching function. The control unit is essentially based on the use of a content-addressed associative memory, where a fraction of the routing header and a code indicating the time sequence on which the cells are stored. Memory outgoing cells are reconverted from a completely parallel form to a form having the length of one word and therefore in a completely serial form at a bitrate equal to the input one.

Abstract: In a radio mobile system in which the radio signals are received by at least two antenna, the signals are filtered, weighted and then combined before being sent to an equalizer. The weighting coefficients are calculated as a function of signals corresponding to the power level received by each antenna and signals which is represent the quality of reception of each antenna. Furthermore, an equalizer control signal is generated from the combination of signals, weighted by the weighting coefficients, corresponding to the time response of the transmission channel to a single impulse.

Abstract: A fully differential CMOS power amplifier having a folded-cascode input stage, an AB class output stage, a first common mode feedback circuit that stabilizes the input stage, and a second common mode feedback circuit that stabilizes the output stage. Each feedback circuit feeds back to an internal node of its particular stage. The power amplifier also includes a power dissipation reduction circuit that shuts down the power amplifier's output first and then the rest of the power amplifier, when the power amplifier is idle for a certain period. This reduction circuit activates the power amplifier in the reverse order.

Abstract: It is described a wide band communication system suitable to allow the exchange of audio signals, video signals and data among a plurality of users (U.sub.1, U.sub.2, . . . , U.sub.i), either the same are abutted to a same switching node (NC) or to switching nodes distant among them from the geographical point of view.Solutions suitable to allow a particularly simple and economic realization of the means for the control of the signalling relevant to the video link, suitable to allow a particularly simple and cheap realization of the switching matrix, as well as to align audio signals to video signals are foreseen (FIG. 2).

Abstract: A circuit arrangement is provided for allowing the bidirectional exchange of received and transmitted signals over a single monomodal optical fiber. The light transmitter (usually a laser or a LED), the receiver of optical signals and an optical system suitable for directing the optical signal to be transmitted to the monomodal optical fiber ad for directing the optical signal from the monomodal optical fiber to the receiver collects the signals in one passage. The optical system uses an optical transceiver employing a light transmitter and a light receiver. This optical transceiver is formed in a unitary housing. The optical system includes first and second lenses which may be graded-index waveguide sections and a planar filter disposed therebetween, the planar filter typically being an interferential filter. The optical system is formed on a support which allows the light transmitter which is typically a laser to be disposed directly adjacent one of the lenses.

Abstract: The present invention is applicable for inverter-type power plants where the electric distribution line is used as stand-by unit. The present invention is composed of a ballast impedance and an electric mesh including an energizing circuit of a first section suitable for insulating a power plant from the distribution line; contacts of a second section which are monitored by a supervisory control circuit of the power plant; and an electric probe for making available a voltage or a current measurement when current flows through the distribution line.

Abstract: A network for switching messages between a plurality of processing units, each of the processing units being connected to a transmission channel. The network includes a plurality of input interface devices which can memorize a plurality of messages and furthermore is also adapted to output and access requests onto a common bus. When one of the input interface apparatuses receives a consent signal, it outputs a message onto the bus. This message is memorized by the output interface devices with an indicator that coincides with one specified in a predetermined byte of the message. In addition, a scanning apparatus is provided for forwarding address bits to a multiplexing device.

Abstract: A switched telephone exchange that comprises a plurality of modules designed to use a connection network of the "mesh" type to implement medium--low potential exchanges (i.e. 20,000 users) or a connection network of the centralized type--by means of adaption circuits--to implement high potential exchanges (i.e. 100,000 users). This characteristic permits the installation of medium to low capacity exchanges, which have low costs as they do not have any centralized organs, and their subsequent "conversion" into high potential exchanges when there is a large increase in user traffic. The adaption circuits comprise parallel to serial conversion facilities(IFT) for the voice signals, line facilities (ULL), signalling processing facilities (USI) for the signalling exchanged between the individual modules of the switched exchange, serial to parallel conversion facilities (IFR) for the voice signals.

Abstract: A power system includes as many synchronizing units as the number of the power units. Each synchronizing unit has been designed to receive an activation signal at its input and to be connected to the other units through of a first and a second discs. Each synchronizing unit delivers to its output a synchronizing clock signal for the respective power units. The first synchronizing unit which receives the activation signal is qualified as the master unit. This master unit applies a predetermined polarity to the first bus and a clock signal to the second bus in order to synchronize the other units in response to the detection of the polarity on the first bus, the other units are characterized as slave unit.

Abstract: Modular supply systems usually include a plurality of n elementary power units, connected in parallel to each other. Control unit (RV) and selective breakaway unit (DS) are associated with each elementary power unit. The monitoring circuit (CP) includes a first device (PM) which calculates the entity of the deviation (E) between a signal (Iu.sub.i) that is proportional to the current supplied by the relevant power unit (UA.sub.i) and a signal (I.sub.med) that is proportional to the average value of the currents supplied by the n power units. Also, a second device (SM) algebraically sums the deviation (E) to a signal (Vu.sub.i) that is proportional to the voltage available on the output of the relevant power unit. The signal (Vc) that is available on the output of the second device is delivered to the control unit (RV) and the selective breakaway unit (DS).