Patents Assigned to KABUSHIKI KAISHA TOSHIBA and
  • Patent number: 7843194
    Abstract: A magnetic resonance imaging apparatus includes a generation unit configured to generate a magnetic field, a reconstruction unit configured to reconstruct an image for a subject on the basis of a magnetic resonance signal radiated from the subject in the magnetic field, a presumption unit configured to presume a distribution of an image quality deterioration degree occurring in the image on the basis of a precision at which the generation unit generates the magnetic field, and a creation unit configured to create a display image showing the distribution of the image quality deterioration degree on the image.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: November 30, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventor: Yoshimori Kassai
  • Patent number: 7842982
    Abstract: A semiconductor device includes a semiconductor substrate having, on a surface thereof, a (110) surface of Si1-xGex (0.25?x?0.90), and n-channel and p-channel MISFETs formed on the (110) surface, each MISFET having a source region, a channel region and a drain region. Each MISFET has a linear active region which is longer in a [?110] direction than in a [001] direction and which has a facet of a (311) or (111) surface, the source region, the channel region and the drain region are formed in this order or in reverse order in the [?110] direction of the linear active region, the channel region of the n-channel MISFET is formed of Si and having uniaxial tensile strain in the [?110] direction, and the channel region of the p-channel MISFET being formed of Si1-yGey (x<y?1) and having uniaxial compressive strain in the [?110] direction.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshihiko Moriyama, Naoharu Sugiyama
  • Patent number: 7842996
    Abstract: A memory cell of a nonvolatile semiconductor memory includes a semiconductor region, source/drain areas arranged separately from each other in the semiconductor region, a tunnel insulating film arranged on a channel region between the diffusion areas, a floating gate electrode arranged on the tunnel insulating film, an inter-electrode insulator arranged on the floating gate electrode, and a control gate electrode arranged on the inter-electrode insulator. The inter-electrode insulator includes lanthanoid-based metal Ln, aluminum Al, and oxygen O, and a composition ratio Ln/(Al+Ln) between the lanthanoid-based metal and the aluminum takes a value within the range of 0.33 to 0.39.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shoko Kikuchi, Akira Takashima, Naoki Yasuda, Koichi Muraoka
  • Patent number: 7843613
    Abstract: The subject application is directed to a system and method for the automated configuration for document input devices. A document processing device first receives a document, which is scanned to detect an indicia on one of the sheets of the document. The indicia, in the form of a barcode or watermark, are then decoded to generate job data representing a desired device configuration for processing the received document. The job data is then used to program a job processor and the document processing device outputs the document in accordance with the job data.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: November 30, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Tec Kabushiki Kaisha
    Inventors: Jianxin Wang, Hongfeng Wei, William Su
  • Patent number: 7844433
    Abstract: A system for designing a utility facility includes a state analyzer analyzing operational states of tools included in a production line, an extraction module extracting an operational period and a standby period of each of the tools, a calculator calculating changes in a quantity of utilities consumed by the tools in operation and in standby, based on the operational periods and the standby periods, and a facility design module designing at least any of a utility facility for supplying utilities to the tools and a utility facility for disposing of utilities discharged from the tools.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshikatsu Masuda, Toshinori Shinki, Shuichi Samata, Yuuichi Mikata
  • Patent number: 7844850
    Abstract: According to one embodiment, an information processor comprises a flush memory which stores a main program for executing information processing by using time data acquired through the clock count operation and a sub-program for upgrading a version of the main program of the information processing, a storage memory which stores the time data, and an arithmetic processing unit which executes the main program in starting the processor and executes the sub-program in upgrading the version, wherein the arithmetic processing unit executes the sub-program so as to continue the clock count operation even during execution of the version upgrading, and when the upgrading has completed, restarts the main program so as to restart the clock count operation by using the time data stored in the storage upon an execution start caused by restarting the main program.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Masashi Yasuzato
  • Patent number: 7844029
    Abstract: An X-ray diagnostic apparatus includes an X-ray generating unit which generates X rays, an X-ray detecting unit which detects X rays transmitted through a subject, an X-ray exposure operating unit which is operated by an operator, and a system control unit which controls the X-ray generating unit in order to start the generation of the X rays from the X-ray generating unit at a time point when a heart rate phase of the subject reaches a specified phase after the X-ray exposure operating unit is operated.
    Type: Grant
    Filed: October 29, 2009
    Date of Patent: November 30, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventor: Satoru Ohishi
  • Patent number: 7843764
    Abstract: A plurality of signal transmitters are respectively configured to produce a pulse current by repeatedly switching the connection state of a switching element. A plurality of ultrasonic transducers are respectively configured to transmit an ultrasonic pulse to a subject to be examined upon receiving said pulse current, and to produce a receiving current upon receiving the reflected wave. A signal receiver is configured to receive said receiving current. A test signal generator is configured to produce a test signal and to output said test signal to a connection point of said signal transmitter, said ultrasonic transducer, and said signal receiver by switching said connection state of said switching element to a state through which said test signal is conducted.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: November 30, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventor: Hironobu Hongou
  • Publication number: 20100299541
    Abstract: A multi-core processor system includes: a plurality of processor cores; a power supply unit that stops supplying or supplies power to each of the processor cores individually; and a thread queue that stores threads that the multi-core processor system causes the processor cores to execute. Each of the processor cores includes: a power-supply stopping unit that causes the power supply unit to stop power supply to an own processor core when a number of threads stored in the thread queue is equal to or smaller than a first threshold; and a power-supply resuming unit that causes the power supply unit to resume power supply to the other stopped processor cores when the number of threads stored in the thread queue exceeds a second value equal to or lager than the first threshold.
    Type: Application
    Filed: November 2, 2009
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yuji Ishikawa, Toshiki Kizu, Ryuichiro Ohyama
  • Publication number: 20100299472
    Abstract: In a multiprocessor system including a plurality of processors, the processors execute, at a time of migration a task operating in own processor to another processor, a transmitting task for transmitting the migration target task to a destination processor, and when an interrupt request to be received and executed by an interrupt handler accompanying the migration target task is generated during transmission of the migration target task, the transmitting task receives the interrupt request instead of the interrupt handler and starts the interrupt handler.
    Type: Application
    Filed: November 6, 2009
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hiroaki Tanaka, Takeshi Kodaka
  • Publication number: 20100295013
    Abstract: A semiconductor device according to an embodiment includes: a semiconductor substrate; a resistance element of a first conductivity type formed in one region of the semiconductor substrate; a field effect transistor of a second conductivity type formed in another region of the semiconductor substrate; and a field effect transistor of the first conductivity type formed in still another region of the semiconductor substrate. The resistance element includes: an insulating film formed in an upper layer portion of the semiconductor substrate; and a well of the first conductivity type formed immediately below the insulating film, an impurity concentration at an arbitrary depth position in the well of the first conductivity is lower than an impurity concentration at the same depth position in a channel region of the field effect transistor of the second conductivity type.
    Type: Application
    Filed: May 24, 2010
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Hanae ISHIHARA, Mitsuhiro Noguchi
  • Publication number: 20100295131
    Abstract: A buried insulating layer is buried at a position lower than a surface of a semiconductor substrate, and a cap insulating layer, which is made of a material different from the buried insulating layer, is formed on the buried insulating layer not to protrude into a shoulder portion of a step between the semiconductor substrate and the buried insulating layer.
    Type: Application
    Filed: March 16, 2010
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Kentaro Eda
  • Publication number: 20100296342
    Abstract: When bit lines or sense amplifiers are checked whether they are defective during a test performed to check whether the bit lines are defectively open, an electrical current supplied from one sense amplifier is detected by another sense amplifier. Thus, if plural bit lines are defectively open, they can be detected simultaneously. Consequently, the test time can be shortened greatly.
    Type: Application
    Filed: May 18, 2010
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Makoto TAKIZAWA, Shoichi Ozaki, Katsumi Abe
  • Publication number: 20100294044
    Abstract: An electromagnetic flow meter provided with a resin lining portion in which resin is lined in a measuring pipe by pressure molding, including the measuring pipe to flow liquid to be measured, a lining locking frame provided in the measuring pipe composed of a cylindrical plate with openings and a plurality of divided belt-like ring plates, and the resin lining portion formed by embedding the lining locking frame. Here, in case of pressure molding the resin lining portion, the resin to be lined can be filled easily in gaps between the measuring pipe and the lining locking frame via gaps formed by a first gap provided between the inner face of the measuring pipe and the outer circumference face of the cylindrical plate with openings and second gaps of the adjacent divided belt-like ring plates in the outer circumference direction of the measuring pipe.
    Type: Application
    Filed: May 18, 2010
    Publication date: November 25, 2010
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takuya IIJIMA
  • Patent number: D628174
    Type: Grant
    Filed: February 19, 2010
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Koji Nagase
  • Patent number: D628294
    Type: Grant
    Filed: December 3, 2008
    Date of Patent: November 30, 2010
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Medical Systems Corporation
    Inventor: Noriaki Baba
  • Patent number: D628316
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: November 30, 2010
    Assignees: Toshiba Lighting & Technology Corporation, Kabushiki Kaisha Toshiba
    Inventors: Junichiro Yamamoto, Makoto Sakai
  • Patent number: D628319
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 30, 2010
    Assignees: Toshiba Lighting & Technology Corporation, Kabushiki Kaisha Toshiba
    Inventors: Masayuki Yoshinobu, Aiko Hiraga, Jiann-Hung Lee
  • Patent number: RE41969
    Abstract: An EEPROM having a memory cell array in which electrically programmable memory cells are arranged in a matrix and each of the memory cells has three storage states, includes a plurality of data circuits for temporarily storing data for controlling write operation states of the plurality of memory cells, a write circuit for performing a write operation in accordance with the contents of the data circuits respectively corresponding to the memory cells, a write verify circuit for confirming states of the memory cells set upon the write operation, and a data updating circuit for updating the contents of the data circuits such that a rewrite operation is performed to only a memory cell, in which data is not sufficiently written, on the basis of the contents of the data circuits and the states of the memory cells set upon the write operation.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tomoharu Tanaka, Gertjan Hemink
  • Patent number: RE41975
    Abstract: An interconnector line of thin film comprising 0.001 to 30 at % of at least one kind of a first element capable of constituting an intermetallic compound of aluminum and/or having a higher standard electrode potential than aluminum, for example, at least one kind of the first element selected from Y, Sc, La, Ce, Nd, Sm, Gd, Tb, Dy, Er, Th, Sr, Ti, Zr, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Co, Ni, Pd, Ir, Pt, Cu, Ag, Au, Cd, Si, Pb and B; and one kind of a second element selected from C, O, N and H in a proportion of 0.01 at ppm to 50 at % of the first element, with the balance comprising substantially Al. In addition to having low resistance, such an Al interconnector line of thin film can prevent the occurrence of hillocks and the electrochemical reaction with an ITO electrode. The interconnector line of thin film can be obtained by sputtering in a dust-free manner by using a sputter target having a similar composition.
    Type: Grant
    Filed: October 14, 1996
    Date of Patent: November 30, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ishigami, Koichi Watanabe, Akihisa Nitta, Toshihiro Maki, Noriaki Yagi