Abstract: A Flash memory controller includes a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

Abstract: A retractable memory drive in accordance with the present invention comprises a top casing, a middle carrier, an electronic device such as a USB thumb drive, and a bottom casing. There are guide rails that allow the middle carrier to remain in an appropriate position. There is also a metal spring clip coupled to the middle carrier for contacting a connector of a device coupled to the drive to provide for improved EMI and ESD protection.

Abstract: Method and system for expanding the memory capacity of devices that use flash memory cards. In one aspect, a memory card expander assembly includes an adaptor shaped to be connected to a memory card slot of a host device, and a receptacle assembly in communication with the adaptor and operative to be attached to the host device. The receptacle assembly includes an expanded memory card slot operative to connect to a memory card such that the host device can communicate with the connected memory card when the adaptor is connected to the memory card slot.

Abstract: A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface, the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

Abstract: A multi-standard flash-memory-card carrier is about the same size as a thick credit card and fits into a wallet. The multi-standard flash-memory-card carrier has bays that accept flash-memory cards. Larger bays on one side receive SD cards and a Memory Stick Duo card, while micro bays on another side of the carrier receive microSD cards and Memory Stick Micro cards. A carrier spine sandwiched between top and bottom covers has openings forming the bays. Spring-clip tabs on spring-clip fingers fit into notches on the side of the flash-memory cards to secure the flash-memory cards into the multi-standard flash-memory-card carrier to prevent loss. The spring-clip fingers are movable parts of the carrier spine that are deformed during insertion of the flash-memory cards. Both micro and standard flash-memory cards can be carried in the same multi-standard flash-memory-card carrier that can be placed in plastic sleeves for credit cards in a person's wallet.

Abstract: A FLASH memory controller is disclosed. The controller comprises a microcontroller. The microcontroller including firmware for providing different mappings for different types of FLASH memory chips. The controller also includes FLASH control logic for communicating with the microcontroller and adapted to communicate via a FLASH data bus to at least one FLASH memory chip. The FLASH control logic including mapping logic for configuring the FLASH data bus based upon the type of FLASH memory chip coupled thereto. A method and system in accordance with the present invention provides the following advantages: Configurable data bus on the FLASH memory controller through software to simplify routing complexity. Configurable chip select and control bus for flexibility of FLASH memory placement. Elimination of external resistor network for layout simplicity. A scalable architecture for higher data bus bandwidth support. Auto-detection of FLASH memory type and capacity configuration.

Abstract: A retractable memory drive in accordance with the present invention comprises a top casing, a middle carrier, an electronic device such as a USB thumb drive, and a bottom casing. There are guide rails that allow the middle carrier to remain in an appropriate position. There is also a metal spring clip coupled to the middle carrier for contacting a connector of a device coupled to the drive to provide for improved EMI and ESD protection.

Abstract: An apparatus for use within an electrical devices is disclosed. The apparatus comprises a casing having an upper body and a lower body, the casing including a tab disposed on a surface thereof and an adjustable base having a plurality of tab cavities adjacent to the tab. The tab engagingly couples to one of the plurality of tab cavities to secure the adjustable base. The apparatus also includes a connector system coupled to the adjustable base.

Abstract: A method is disclosed for making a leadframe package stand having application in semiconductor packaging and microelectronic assembly in which an IC device (e.g., a bare chip IC, a wafer level package, or a chipscale package) is received for electrical connection to a PWB or for vertical package over package stacking. Electrically conductive leadframe traces are arranged in an area array circuit pattern between outer leads at the periphery of the mold body of a leadframe for connection to the PWB to inner leads for connection to the IC device. The inner lead tips terminate at each side of the IC device in groups of parallel aligned rows and columns to facilitate connection to the IC device without using intermediate bonding wires. Prior to molding, the inner leads of the conductive traces are secured by sacrificial tie-bars or adhesive tape to prevent movement of the inner leads and possible short circuits during molding. A cavity is formed in the mold body during molding so as to lie above the inner leads.

Abstract: A thin, small outline IC leadframe plastic package to be used to assemble high performance, high speed semiconductor memory IC devices such as dynamic random access memories (DRAM) having a high data transfer rate in the range of 1 GigaHertz. The package leadframe is electrically interconnected to the IC device input-output pads by either electrically conductive (e.g. solder) bumps that are flip-chip bonded to the IC device or by of an interposer. The interposer contains integral curled micro-spring contacts at opposite ends of conductive fan out traces. The interposer is attached to the leadframe bonding pads by way of tape automated bonding, soldering, or adhesive bonding. The leadframe that is interconnected to the IC device by the aforementioned flip-chip bumps or the interposer is encapsulated and trimmed to form either gull-wing style perimeter leads as a standard thin small outline package (TSOP) or wrap around leads as a micro-leadframe (MLF) package.

Abstract: A Flash memory controller is disclosed. The Flash memory controller comprises a host interface, a Flash memory interface, controller logic coupled between the host interface the controller logic handling a plurality of voltages. The controller also includes a mechanism for allowing a multiple voltage host to interface with a high voltage or a multiple voltage Flash memory. A multiple voltage Flash memory controller in accordance with the present invention provides the following advantages over conventional Flash memory controllers: (1) a voltage host is allowed to interface with multiple Flash memory components that operate at different voltages in any combination; (2) power consumption efficiency is improved by integrating the programmable voltage regulator, and voltage comparator mechanism with the Flash memory controller; (3) External jumper selection is eliminated for power source configuration; and (4) Flash memory controller power source interface pin-outs are simplified.

Abstract: A multi-standard flash-memory-card carrier is about the same size as a thick credit card and fits into a wallet. The multi-standard flash-memory-card carrier has bays that accept flash-memory cards. Larger bays on one side receive SD cards and a Memory Stick Duo card, while micro bays on another side of the carrier receive microSD cards and Memory Stick Micro cards. A carrier spine sandwiched between top and bottom covers has openings forming the bays. Spring-clip tabs on spring-clip fingers fit into notches on the side of the flash-memory cards to secure the flash-memory cards into the multi-standard flash-memory-card carrier to prevent loss. The spring-clip fingers are movable parts of the carrier spine that are deformed during insertion of the flash-memory cards. Both micro and standard flash-memory cards can be carried in the same multi-standard flash-memory-card carrier that can be placed in plastic sleeves for credit cards in a person's wallet.

Abstract: A FLASH memory controller is disclosed. The controller comprises a microcontroller. The microcontroller including firmware for providing different mappings for different types of FLASH memory chips. The controller also includes FLASH control logic for communicating with the microcontroller and adapted to communicate via a FLASH data bus to at least one FLASH memory chip. The FLASH control logic including mapping logic for configuring the FLASH data bus based upon the type of FLASH memory chip coupled thereto. A method and system in accordance with the present invention provides the following advantages: Configurable data bus on the FLASH memory controller through software to simplify routing complexity. Configurable chip select and control bus for flexibility of FLASH memory placement. Elimination of external resistor network for layout simplicity. A scalable architecture for higher data bus bandwidth support. Auto-detection of FLASH memory type and capacity configuration.

Abstract: An apparatus for use within an electrical devices is disclosed. The apparatus comprises a casing having an upper body and a lower body, the casing including a tab disposed on a surface thereof and an adjustable base having a plurality of tab cavities adjacent to the tab. The tab engagingly couples to one of the plurality of tab cavities to secure the adjustable base. The apparatus also includes a connector system coupled to the adjustable base.

Abstract: A Flash memory card is disclosed comprising a substrate, a Flash memory die on top of the substrate, a controller die on top of the Flash memory die, and an interposer coupled to with the controller die and on top of the Flash memory die wherein the interposer results in substantial reduced wire bonding to the substrate. The interposer can surround or be placed side by side with the controller die. A system and method in accordance with the present invention achieves the following objectives: (1) takes advantage of as large of a Flash memory die as possible, to increase the density of the Flash card by reducing the number of wire bond pads on the substrate and enabling insertion of the largest die possible that can fit inside a given card interior boundary; (2) more efficiently stacks Flash memory dies to increase density of the Flash card; and (3) has a substantially less number of bonding wires to the substrate as possible, to improve production yield.

Abstract: A data storage device and methods of manufacture are provided which tend to protect the device against moisture and shock. The device includes a circuit board, a coating, a housing, and preferably a sealant. The circuit board is in electrical communication with an electrical interface. The coating is disposed at least on the circuit board to generally encapsulate the circuit board. The housing is sized and configured to generally encompass the circuit board and the coating. The housing includes a housing opening being sized and configured with the electrical interface being at least partially exposed therethrough. The sealant is preferably disposed within the housing substantially intermediate the interior surface of the housing and the coating on the circuit board. Further, at least one of the coating and the sealant may be disposed substantially intermediate the electrical interface and the housing opening.

Abstract: A special USB connector which can accommodate PCBA with discrete components soldered on the frontal portion of PCBA is disclosed. The components can be positioned inside the USB connector. A carrier is utilized for PCBA support within a special USB connector used for compact USB devices and sliding motion.

Abstract: Provided is a memory device comprising a circuit assembly including a flexible substrate and at least one flash memory chip mounted thereupon. The flexible substrate has upper and lower surfaces and a flash memory chip is preferably mounted on at least one the upper and lower surfaces. The flash memory chip may be configured as one of a thin small outline package (TSOP) package device, a very very small outline package (WSOP) package device, and a chip on board (COB) device. The memory device may further comprise a hollow housing body having a hollow interior compartment sized and configured to receive the circuit assembly therewithin. A universal series bus (USB) connector may be mounted on a free end of the flexible substrate and is preferably configured to electrically connect the memory device to an electric device.