Abstract: Resistivity probes can be used to test integrated circuits. In one example, a resistivity probe has a substrate with multiple vias and multiple metal pins. Each of the metal pins is disposed in one of the vias. The metal pins extend out of the substrate. Interconnects provide an electrical connection to the metal pins. In another example, a resistivity probe has a substrate with a top surface and multiple elements extending from the substrate. Each of the elements curves from the substrate to a tip of the element such that each of the elements is non-parallel to the top surface of the substrate.

Abstract: Metrology methods and targets are provided, that expand metrological procedures beyond current technologies into multi-layered targets, quasi-periodic targets and device-like targets, without having to introduce offsets along the critical direction of the device design. Machine learning algorithm application to measurements and/or simulations of metrology measurements of metrology targets are disclosed for deriving metrology data such as overlays from multi-layered target and corresponding configurations of targets are provided to enable such measurements. Quasi-periodic targets which are based on device patterns are shown to improve the similarity between target and device designs. Offsets are introduced only in non-critical direction and/or sensitivity is calibrated to enable, together with the solutions for multi-layer measurements and quasi-periodic target measurements, direct device optical metrology measurements.

Abstract: Wafer inspection with stable nuisance rates and defect of interest capture rates are disclosed. This technique can be used for discovery of newly appearing defects that occur during the manufacturing process. Based on a first wafer, defects of interest are identified based on the classified filtered inspection results. For each remaining wafer, the defect classifier is updated and defects of interest in the next wafer are identified based on the classified filtered inspection results.

Abstract: A device and method for expediting spectral measurement in metrological activities during semiconductor device fabrication through interferometric spectroscopy of white light illumination during calibration, overlay, and recipe creation.

Abstract: Real-time job distribution software architectures for high bandwidth, hybrid processor computation systems for semiconductor inspection and metrology are disclosed. The imaging processing computer architecture can be scalable by changing the number of CPUs and GPUs to meet computing needs. The architecture is defined using a master node and one or more worker nodes to run image processing jobs in parallel for maximum throughput. The master node can receive input image data from a semiconductor wafer or reticle. Jobs based on the input image data are distributed to one of the worker nodes. Each worker node can include at least one CPU and at least one GPU. The image processing job can contain multiple tasks, and each of the tasks can be assigned to one of the CPU or GPU in the worker node using a worker job manager to process the image.

Abstract: A method of measuring misregistration in the manufacture of semiconductor devices including providing a multilayered semiconductor device, using a scatterometry metrology tool to perform misregistration measurements at multiple sites on the multilayered semiconductor device, receiving raw misregistration data for each of the misregistration measurements, thereafter providing filtered misregistration data by removing outlying raw misregistration data points from the raw misregistration data for each of the misregistration measurements, using the filtered misregistration data to model misregistration for the multilayered semiconductor device, calculating correctables from the modeled misregistration for the multilayered semiconductor device, providing the correctables to the scatterometry metrology tool, thereafter recalibrating the scatterometry metrology tool based on the correctables and measuring misregistration using the scatterometry metrology tool following the recalibration.

Abstract: Systems and methods for inspection of a specimen are provided. One system includes an illumination subsystem configured to illuminate the specimen by scanning a spot across the specimen. The system also includes a non-imaging detection subsystem configured to generate output signals responsive to light specularly reflected from the spot scanned across the specimen. In addition, the system includes a processor configured to generate images of the specimen using the output signals and to detect defects on the specimen using the images. In one embodiment, the non-imaging detection subsystem includes an objective and a detector. An NA of the objective does not match a pixel size of the detector. In another embodiment, the non-imaging detection subsystem includes an objective having an NA of greater than about 0.05. The system may be configured for multi-spot illumination and multi-channel detection. Alternatively, the system may be configured for single spot illumination and multi-channel detection.

Abstract: Defects from a hot scan can be saved, such as on persistent storage, random access memory, or a split database. The persistent storage can be patch-based virtual inspector virtual analyzer (VIVA) or local storage. Repeater defect detection jobs can determined and the wafer can be inspected based on the repeater defect detection jobs. Repeater defects can be analyzed and corresponding defect records to the repeater defects can be read from the persistent storage. These results may be returned to the high level defect detection controller.

Abstract: Methods and systems for combining information present in measured images of semiconductor wafers with additional measurements of particular structures within the measured images are presented herein. In one aspect, an image-based signal response metrology (SRM) model is trained based on measured images and corresponding reference measurements of particular structures within each image. The trained, image-based SRM model is then used to calculate values of one or more parameters of interest directly from measured image data collected from other wafers. In another aspect, a measurement signal synthesis model is trained based on measured images and corresponding measurement signals generated by measurements of particular structures within each image by a non-imaging measurement technique.

Abstract: Techniques and systems to achieve more accurate design alignment to an image by improved pixel-to-design alignment (PDA) target selection are disclosed. PDA targets in an image frame of a die can be biased to include a hotspot location in one of the PDA targets. The PDA targets can be evaluated for repetitive patterns by analyzing the uniqueness of the points used as the PDA targets.

Abstract: Methods and systems for training a machine learning model using synthetic defect images are provided. One system includes one or more components executed by one or more computer subsystems. The one or more components include a graphical user interface (GUI) configured for displaying one or more images for a specimen and image editing tools to a user and for receiving input from the user that includes one or more alterations to at least one of the images using one or more of the image editing tools. The component(s) also include an image processing module configured for applying the alteration(s) to the at least one image thereby generating at least one modified image and storing the at least one modified image in a training set. The computer subsystem(s) are configured for training a machine learning model with the training set in which the at least one modified image is stored.

Abstract: A parameterized geometric model of a structure can be determined based on spectra from a wafer metrology tool. The structure can have geometry-induced anisotropic effects. Dispersion parameters of the structure can be determined from the parameterized geometric model. This can enable metrology techniques to measure nanostructures that have geometries and relative positions with surrounding structures that induce non-negligible anisotropic effects. These techniques can be used to characterize process steps involving metal and semiconductor targets in semiconductor manufacturing of, for example, FinFETs or and gate-all-around field-effect transistors.

Abstract: A method of determining overlay (“OVL”) in a pattern in a semiconductor wafer manufacturing process comprises capturing images from a cell in a metrology target formed in at least two different layers in the wafer with parts of the target offset in opposing directions with respect to corresponding parts in a different layer. The images may be captured using radiation of multiple different wavelengths, each image including +1 and ?1 diffraction patterns. A first and second differential signal may be determined for respective pixels in each image by subtracting opposing pixels from the +1 and ?1 diffraction orders for each of the multiple wavelengths. An OVL for the respective pixels may be determined based on analyzing the differential signals from multiple wavelengths simultaneously. Then an OVL for the pattern may be determined as a weighted average of the OVL of the respective pixels.

Abstract: Common events between layers on a semiconductor wafer are filtered. Common events should contain the majority of defects of interest. Only nuisance events that are common between layers on the semiconductor wafer remain, which reduces the nuisance rate. Defects that are common across layers can be filtered based on, for example, defect coordinates, a difference image, or defect attributes.

Abstract: Methods and systems for estimating values of process parameters, structural parameters, or both, based on x-ray scatterometry measurements of high aspect ratio semiconductor structures are presented herein. X-ray scatterometry measurements are performed at one or more steps of a fabrication process flow. The measurements are performed quickly and with sufficient accuracy to enable yield improvement of an on-going semiconductor fabrication process flow. Process corrections are determined based on the measured values of parameters of interest and the corrections are communicated to the process tool to change one or more process control parameters of the process tool. In some examples, measurements are performed while the wafer is being processed to control the on-going fabrication process step. In some examples, X-ray scatterometry measurements are performed after a particular process step and process control parameters are updated for processing of future devices.

Abstract: A system, method, and non-transitory computer readable medium are provided for tuning sensitivities of, and determining a process window for, a modulated wafer. The sensitivities for dies of the modulated wafer are tuned dynamically based on a single set of parameters. Further, the process window is determined for the modulated wafer from prior determined parameter-specific nominal process windows.

Abstract: Metrology targets, design methods and measurement methods thereof are provided with periodic structure(s) which are oblique with respect to orthogonal production axes X and Y of the lithography tool—enabling more accurate overlay measurements of devices having diagonal (oblique, tilted) elements such as DRAM devices. One or more oblique periodic structure(s) may be used to provide one- or two-dimensional signals, with respect to one or more layers, possibly providing overlay measurements for multiple steps applied to one layer. The oblique periodic structure(s) may be used to modify current metrology target designs (e.g., imaging targets and/or scatterometry targets) or to design new targets, and measurement algorithms may be adjusted respectively to derive signals from the oblique periodic structure(s) and/or to provide pre-processed images thereof. The disclosed targets are process compatible and reflect more accurately the device overlays with respect to various process steps.

Abstract: Methods and systems for enhanced defect detection based on images collected by at least two imaging detectors at different times are described. In some embodiments, the time between image measurements is at least 100 microseconds and no more than 10 milliseconds. In one aspect, one or more defects of interest are identified based on a composite image of a measured area generated based on a difference between collected images. In a further aspect, measurement conditions associated with the each imaged location are adjusted to be different for measurements performed by at least two imaging detectors at different times. In some embodiments, the measurement conditions are adjusted during the time between measurements by different imaging detectors. Exemplary changes of measurement conditions include environmental changes at the wafer under measurement and changes made to the optical configuration of the inspection system.

Abstract: In one embodiment, disclosed are apparatus, methods, and targets for determining a phase shift of a photomask having a phase-shift target. An inspection or metrology system is used to direct an incident beam towards the target and then detect a plurality of intensity measurements that are transmitted through the target in response to the incident beam. A phase shift value for the target may then be determined based on the intensity measurements.

Abstract: A target for use in the optical measurement of misregistration in the manufacture of semiconductor devices, the target including a first periodic structure formed on a first layer of a semiconductor device and having a first pitch along an axis and a second periodic structure formed on a second layer of the semiconductor device and having a second pitch along the axis, different from the first pitch, the second periodic structure extending beyond the first periodic structure along the axis.